diff -ruw linux-5.4.60/arch/arm64/boot/dts/amlogic/Makefile linux-5.4.60-fbx/arch/arm64/boot/dts/amlogic/Makefile --- linux-5.4.60/arch/arm64/boot/dts/amlogic/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/amlogic/Makefile 2021-03-04 13:20:57.000838854 +0100 @@ -1,4 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 +DTC_FLAGS += -@ +dtb-$(CONFIG_ARCH_MESON) += fbxwmr.dtb fbxwmr-r1.dtb fbxwmr-r2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb diff -ruw linux-5.4.60/arch/arm64/boot/dts/broadcom/Makefile linux-5.4.60-fbx/arch/arm64/boot/dts/broadcom/Makefile --- linux-5.4.60/arch/arm64/boot/dts/broadcom/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/broadcom/Makefile 2021-03-04 13:20:57.004172187 +0100 @@ -6,3 +6,4 @@ subdir-y += northstar2 subdir-y += stingray +subdir-y += bcm63xx diff -ruw linux-5.4.60/arch/arm64/boot/dts/marvell/armada-ap806.dtsi linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/armada-ap806.dtsi --- linux-5.4.60/arch/arm64/boot/dts/marvell/armada-ap806.dtsi 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/armada-ap806.dtsi 2021-03-04 13:20:57.010838855 +0100 @@ -274,6 +274,11 @@ }; }; + ap_hwmon: ap806-hwmon@6f8084 { + compatible = "marvell,ap806-hwmon"; + reg = <0x6f8084 0xc>; + }; + ap_syscon1: system-controller@6f8000 { compatible = "syscon", "simple-mfd"; reg = <0x6f8000 0x1000>; diff -ruw linux-5.4.60/arch/arm64/boot/dts/marvell/armada-cp110.dtsi linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/armada-cp110.dtsi --- linux-5.4.60/arch/arm64/boot/dts/marvell/armada-cp110.dtsi 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/armada-cp110.dtsi 2021-03-04 13:20:57.010838855 +0100 @@ -134,10 +134,13 @@ reg = <0x120000 0x6000>; marvell,system-controller = <&CP110_LABEL(syscon0)>; clocks = <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>, - <&CP110_LABEL(clk) 1 18>; - clock-names = "mg_clk", "mg_core_clk", "axi_clk"; + <&CP110_LABEL(clk) 1 18>, <&CP110_LABEL(clk) 1 9>; + clock-names = "mg_clk", "mg_core_clk", "axi_clk", "gop_clk"; #address-cells = <1>; #size-cells = <0>; + marvell,cp_mgmt = <&CP110_LABEL(syscon1)>; + /* always use Master CP S@R */ + marvell,sar = <&cp0_syscon1>; CP110_LABEL(comphy0): phy@0 { reg = <0>; @@ -322,6 +325,14 @@ }; }; + CP110_LABEL(utmi): utmi@580000 { + compatible = "marvell,cp110-utmi-phy"; + #phy-cells = <1>; + reg = <0x580000 0x2000>; + reg-names = "utmi-unit"; + marvell,system-controller = <&CP110_LABEL(syscon0)>; + }; + CP110_LABEL(xor0): xor@6a0000 { compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; reg = <0x6a0000 0x1000>, <0x6b0000 0x1000>; @@ -364,6 +375,11 @@ status = "disabled"; }; + CP110_LABEL(hwmon): cp110-hwmon@0x400070 { + compatible = "marvell,cp110-hwmon"; + reg = <0x400070 0xc>; + }; + CP110_LABEL(i2c0): i2c@701000 { compatible = "marvell,mv78230-i2c"; reg = <0x701000 0x20>; @@ -388,6 +404,16 @@ status = "disabled"; }; + CP110_LABEL(mss_i2c): i2c@211000 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x211000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + CP110_LABEL(uart0): serial@702000 { compatible = "snps,dw-apb-uart"; reg = <0x702000 0x100>; @@ -457,8 +483,8 @@ CP110_LABEL(trng): trng@760000 { compatible = "marvell,armada-8k-rng", - "inside-secure,safexcel-eip76"; - reg = <0x760000 0x7d>; + "inside-secure,safexcel-eip150"; + reg = <0x760000 0x10000>; interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 25>, @@ -492,6 +518,19 @@ <&CP110_LABEL(clk) 1 17>; dma-coherent; }; + + CP110_LABEL(tdm0): tdmmc@7a0000 { + compatible = "marvell,armada-a8k-tdm"; + reg = <0x7a0000 0x20000>, + <0x440400 0x20>; + reg-names = "tdm_regs", "pll_regs"; + interrupts = <111 IRQ_TYPE_LEVEL_HIGH>, + <112 IRQ_TYPE_LEVEL_HIGH>, + <113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CP110_LABEL(clk) 1 1>; + clock-names = "gateclk"; + status = "disabled"; + }; }; CP110_LABEL(pcie0): pcie@CP110_PCIE0_BASE { diff -ruw linux-5.4.60/arch/arm64/boot/dts/marvell/Makefile linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/Makefile --- linux-5.4.60/arch/arm64/boot/dts/marvell/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/Makefile 2021-03-04 13:20:57.010838855 +0100 @@ -10,3 +10,17 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin-singleshot.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8080-db.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp1_dsl_lte.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp1_ftth_p2p.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp2_ftth_p2p.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp2_ftth_pon.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp1_test_module.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp2_test_module.dtb + +dtb-$(CONFIG_ARCH_MVEBU) += jbxgw7r.dtb +dtb-$(CONFIG_ARCH_MVEBU) += jbxgw7r_exp1_ftth_p2p.dtb +dtb-$(CONFIG_ARCH_MVEBU) += jbxgw7r_exp2_ftth_p2p.dtb + +# export symbols in DTBs file to allow overlay usage +DTC_FLAGS += -@ diff -ruw linux-5.4.60/arch/arm64/include/asm/cputype.h linux-5.4.60-fbx/arch/arm64/include/asm/cputype.h --- linux-5.4.60/arch/arm64/include/asm/cputype.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/include/asm/cputype.h 2021-03-04 13:20:57.027505522 +0100 @@ -94,6 +94,7 @@ #define HISI_CPU_PART_TSV110 0xD01 #define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53) +#define MIDR_CORTEX_B53 MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, ARM_CPU_PART_CORTEX_A53) #define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57) #define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) #define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73) diff -ruw linux-5.4.60/arch/arm64/include/asm/memory.h linux-5.4.60-fbx/arch/arm64/include/asm/memory.h --- linux-5.4.60/arch/arm64/include/asm/memory.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/include/asm/memory.h 2021-03-04 13:20:57.030838855 +0100 @@ -84,7 +84,7 @@ #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL) #define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) \ + KASAN_SHADOW_OFFSET) -#define KASAN_THREAD_SHIFT 1 +#define KASAN_THREAD_SHIFT 2 #else #define KASAN_THREAD_SHIFT 0 #define KASAN_SHADOW_END (_PAGE_END(VA_BITS_MIN)) diff -ruw linux-5.4.60/arch/arm64/include/asm/pgtable-hwdef.h linux-5.4.60-fbx/arch/arm64/include/asm/pgtable-hwdef.h --- linux-5.4.60/arch/arm64/include/asm/pgtable-hwdef.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/include/asm/pgtable-hwdef.h 2021-03-04 13:20:57.030838855 +0100 @@ -147,7 +147,11 @@ #define PTE_TABLE_BIT (_AT(pteval_t, 1) << 1) #define PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */ #define PTE_RDONLY (_AT(pteval_t, 1) << 7) /* AP[2] */ +#ifdef CONFIG_ARCH_BCM63XX_SHARED_OSH +#define PTE_SHARED (_AT(pteval_t, 2) << 8) /* SH[1:0], outer shareable */ +#else #define PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ +#endif #define PTE_AF (_AT(pteval_t, 1) << 10) /* Access Flag */ #define PTE_NG (_AT(pteval_t, 1) << 11) /* nG */ #define PTE_DBM (_AT(pteval_t, 1) << 51) /* Dirty Bit Management */ @@ -263,12 +267,19 @@ #define TCR_SH0_SHIFT 12 #define TCR_SH0_MASK (UL(3) << TCR_SH0_SHIFT) +#define TCR_SH0_OUTER (UL(2) << TCR_SH0_SHIFT) #define TCR_SH0_INNER (UL(3) << TCR_SH0_SHIFT) #define TCR_SH1_SHIFT 28 #define TCR_SH1_MASK (UL(3) << TCR_SH1_SHIFT) +#define TCR_SH1_OUTER (UL(2) << TCR_SH1_SHIFT) #define TCR_SH1_INNER (UL(3) << TCR_SH1_SHIFT) + +#ifdef CONFIG_ARCH_BCM63XX_SHARED_OSH +#define TCR_SHARED (TCR_SH0_OUTER | TCR_SH1_OUTER) +#else #define TCR_SHARED (TCR_SH0_INNER | TCR_SH1_INNER) +#endif #define TCR_TG0_SHIFT 14 #define TCR_TG0_MASK (UL(3) << TCR_TG0_SHIFT) diff -ruw linux-5.4.60/arch/arm64/Kconfig.platforms linux-5.4.60-fbx/arch/arm64/Kconfig.platforms --- linux-5.4.60/arch/arm64/Kconfig.platforms 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/arch/arm64/Kconfig.platforms 2021-03-04 13:20:57.000838854 +0100 @@ -51,6 +51,22 @@ help This enables support for Broadcom iProc based SoCs +config ARCH_BCM63XX + bool "Broadcom BCM63XX family" + select PINCTRL + select GPIOLIB + select PINCTRL_BCM63138 + help + This enables support for Broadcom BCM63XX Family + +config ARCH_BCM63XX_SHARED_OSH + bool "Make shared pages and translation table walks outer shareable" + depends on ARCH_BCM63XX + default y + help + This is required for HW coherency on bcm63158. Say Y here if + you are compiling a kernel for a bcm63158 board. + config ARCH_BERLIN bool "Marvell Berlin SoC Family" select DW_APB_ICTL diff -ruw linux-5.4.60/block/blk-core.c linux-5.4.60-fbx/block/blk-core.c --- linux-5.4.60/block/blk-core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/block/blk-core.c 2021-03-04 13:20:57.497505542 +0100 @@ -1319,7 +1319,7 @@ } } -void blk_account_io_done(struct request *req, u64 now) +void blk_account_io_done(struct request *req, u64 now, blk_status_t error) { /* * Account IO completion. flush_rq isn't accounted as a @@ -1333,6 +1333,10 @@ part_stat_lock(); part = req->part; + if (error) { + int rw = rq_data_dir(req); + part_stat_inc(part, io_errors[rw]); + } update_io_ticks(part, jiffies); part_stat_inc(part, ios[sgrp]); part_stat_add(part, nsecs[sgrp], now - req->start_time_ns); diff -ruw linux-5.4.60/block/blk-flush.c linux-5.4.60-fbx/block/blk-flush.c --- linux-5.4.60/block/blk-flush.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/block/blk-flush.c 2021-03-04 13:20:57.497505542 +0100 @@ -165,10 +165,21 @@ rq->flush.seq |= seq; cmd_flags = rq->cmd_flags; - if (likely(!error)) + if (likely(!error)) { seq = blk_flush_cur_seq(rq); - else + } else { seq = REQ_FSEQ_DONE; + printk_once(KERN_ERR "%s: flush failed: data integrity problem\n", + rq->rq_disk ? rq->rq_disk->disk_name : "?"); + /* + * returning an error to the FS is wrong: the data is all + * there, it just might not be written out in the expected + * order and thus have a window where the integrity is suspect + * in a crash. Given the small likelihood of actually + * crashing, we should just log a warning here. + */ + error = 0; + } switch (seq) { case REQ_FSEQ_PREFLUSH: diff -ruw linux-5.4.60/block/blk.h linux-5.4.60-fbx/block/blk.h --- linux-5.4.60/block/blk.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/block/blk.h 2021-03-04 13:20:57.500838876 +0100 @@ -187,7 +187,7 @@ void blk_account_io_start(struct request *req, bool new_io); void blk_account_io_completion(struct request *req, unsigned int bytes); -void blk_account_io_done(struct request *req, u64 now); +void blk_account_io_done(struct request *req, u64 now, blk_status_t error); /* * Internal elevator interface diff -ruw linux-5.4.60/block/blk-mq.c linux-5.4.60-fbx/block/blk-mq.c --- linux-5.4.60/block/blk-mq.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/block/blk-mq.c 2021-03-04 13:20:57.497505542 +0100 @@ -552,7 +552,7 @@ if (rq->internal_tag != -1) blk_mq_sched_completed_request(rq, now); - blk_account_io_done(rq, now); + blk_account_io_done(rq, now, error); if (rq->end_io) { rq_qos_done(rq->q, rq); diff -ruw linux-5.4.60/block/partition-generic.c linux-5.4.60-fbx/block/partition-generic.c --- linux-5.4.60/block/partition-generic.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/block/partition-generic.c 2021-03-04 13:20:57.500838876 +0100 @@ -128,6 +128,7 @@ "%8lu %8lu %8llu %8u " "%8u %8u %8u " "%8lu %8lu %8llu %8u" + "%8lu %lu" "\n", part_stat_read(p, ios[STAT_READ]), part_stat_read(p, merges[STAT_READ]), @@ -143,7 +144,9 @@ part_stat_read(p, ios[STAT_DISCARD]), part_stat_read(p, merges[STAT_DISCARD]), (unsigned long long)part_stat_read(p, sectors[STAT_DISCARD]), - (unsigned int)part_stat_read_msecs(p, STAT_DISCARD)); + (unsigned int)part_stat_read_msecs(p, STAT_DISCARD), + part_stat_read(p, io_errors[READ]), + part_stat_read(p, io_errors[WRITE])); } ssize_t part_inflight_show(struct device *dev, struct device_attribute *attr, @@ -345,7 +348,7 @@ queue_limit_discard_alignment(&disk->queue->limits, start); p->nr_sects = len; p->partno = partno; - p->policy = get_disk_ro(disk); + p->policy = get_disk_ro(disk) || (flags & ADDPART_FLAG_RO); if (info) { struct partition_meta_info *pinfo = alloc_part_info(disk); diff -ruw linux-5.4.60/block/partitions/check.c linux-5.4.60-fbx/block/partitions/check.c --- linux-5.4.60/block/partitions/check.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/block/partitions/check.c 2021-03-04 13:20:57.500838876 +0100 @@ -24,6 +24,7 @@ #include "acorn.h" #include "amiga.h" #include "atari.h" +#include "dt.h" #include "ldm.h" #include "mac.h" #include "msdos.h" @@ -40,6 +41,10 @@ int warn_no_part = 1; /*This is ugly: should make genhd removable media aware*/ static int (*check_part[])(struct parsed_partitions *) = { +#ifdef CONFIG_OF_PARTITION + dt_partition, +#endif + /* * Probe partition formats with tables at disk address 0 * that also have an ADFS boot block at 0xdc0. diff -ruw linux-5.4.60/block/partitions/Kconfig linux-5.4.60-fbx/block/partitions/Kconfig --- linux-5.4.60/block/partitions/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/block/partitions/Kconfig 2021-03-04 13:20:57.500838876 +0100 @@ -268,3 +268,11 @@ help Say Y here if you want to read the partition table from bootargs. The format for the command line is just like mtdparts. + +config OF_PARTITION + bool "Device tree partition support" if PARTITION_ADVANCED + depends on OF + +config OF_PARTITION_IGNORE_RO + bool "ignore read-only flag" + depends on OF_PARTITION diff -ruw linux-5.4.60/block/partitions/Makefile linux-5.4.60-fbx/block/partitions/Makefile --- linux-5.4.60/block/partitions/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/block/partitions/Makefile 2021-03-04 13:20:57.500838876 +0100 @@ -21,3 +21,4 @@ obj-$(CONFIG_EFI_PARTITION) += efi.o obj-$(CONFIG_KARMA_PARTITION) += karma.o obj-$(CONFIG_SYSV68_PARTITION) += sysv68.o +obj-$(CONFIG_OF_PARTITION) += dt.o diff -ruw linux-5.4.60/drivers/ata/ahci.h linux-5.4.60-fbx/drivers/ata/ahci.h --- linux-5.4.60/drivers/ata/ahci.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/ata/ahci.h 2021-03-04 13:20:57.567505546 +0100 @@ -368,6 +368,9 @@ /* only required for per-port MSI(-X) support */ int (*get_irq_vector)(struct ata_host *host, int port); + + u32 comreset_u; + u32 comwake; }; extern int ahci_ignore_sss; diff -ruw linux-5.4.60/drivers/ata/ahci_mvebu.c linux-5.4.60-fbx/drivers/ata/ahci_mvebu.c --- linux-5.4.60/drivers/ata/ahci_mvebu.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/ata/ahci_mvebu.c 2021-03-04 13:20:57.567505546 +0100 @@ -17,6 +17,7 @@ #include #include #include + #include "ahci.h" #define DRV_NAME "ahci-mvebu" @@ -67,6 +68,41 @@ writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA); } +#define PORT_INDIRECT_PHY_ADDR(__p) ((__p) * 0x80 + 0x178) +#define PORT_INDIRECT_PHY_DATA(__p) ((__p) * 0x80 + 0x17c) + +#define INDIRECT_PHY_CONTROL 0x0a +#define INDIRECT_PHY_CTRL_NEG_RX_CLK (1 << 13) +#define INDIRECT_PHY_CTRL_NEG_TX_CLK (1 << 12) + +static inline void indirect_phy_write(void __iomem *mmio, int port, + u32 value, u32 phy_off) +{ + writel(phy_off, mmio + PORT_INDIRECT_PHY_ADDR(port)); + writel(value, mmio + PORT_INDIRECT_PHY_DATA(port)); +} + +static inline u32 indirect_phy_read(void __iomem *mmio, int port, u32 phy_off) +{ + writel(phy_off, mmio + PORT_INDIRECT_PHY_ADDR(port)); + return readl(mmio + PORT_INDIRECT_PHY_DATA(port)); +} + +static void ahci_mvebu_tune_clk_edge(struct ahci_host_priv *hpriv) +{ + int i; + + for (i = 0; i < hpriv->nports; ++i) { + u32 v; + + pr_debug("inverting RX/TX clk on port %d\n", i); + v = indirect_phy_read(hpriv->mmio, i, INDIRECT_PHY_CONTROL); + v &= ~INDIRECT_PHY_CTRL_NEG_TX_CLK; + v &= ~INDIRECT_PHY_CTRL_NEG_RX_CLK; + indirect_phy_write(hpriv->mmio, i, v, INDIRECT_PHY_CONTROL); + } +} + static int ahci_mvebu_armada_380_config(struct ahci_host_priv *hpriv) { const struct mbus_dram_target_info *dram; @@ -96,6 +132,13 @@ return 0; } +static int ahci_mvebu_armada_8k_config(struct ahci_host_priv *hpriv) +{ + ahci_mvebu_regret_option(hpriv); + ahci_mvebu_tune_clk_edge(hpriv); + return 0; +} + /** * ahci_mvebu_stop_engine * @@ -209,6 +252,18 @@ if (rc) goto disable_resources; + /* + * comreset and comwake parameters, later configured in + * ahci_port_init(). + */ + if (of_property_read_u32(pdev->dev.of_node, "comwake", + &hpriv->comwake)) + hpriv->comwake = 0; + + if (of_property_read_u32(pdev->dev.of_node, "comreset_u", + &hpriv->comreset_u)) + hpriv->comreset_u = 0; + rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info, &ahci_platform_sht); if (rc) @@ -230,6 +285,11 @@ .flags = AHCI_HFLAG_SUSPEND_PHYS, }; +static const struct ahci_mvebu_plat_data ahci_mvebu_armada_8k_plat_data = { + .plat_config = ahci_mvebu_armada_8k_config, + .flags = 0, +}; + static const struct of_device_id ahci_mvebu_of_match[] = { { .compatible = "marvell,armada-380-ahci", @@ -239,6 +299,10 @@ .compatible = "marvell,armada-3700-ahci", .data = &ahci_mvebu_armada_3700_plat_data, }, + { + .compatible = "marvell,armada-8k-ahci", + .data = &ahci_mvebu_armada_8k_plat_data, + }, { }, }; MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match); diff -ruw linux-5.4.60/drivers/ata/libahci.c linux-5.4.60-fbx/drivers/ata/libahci.c --- linux-5.4.60/drivers/ata/libahci.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/ata/libahci.c 2021-03-04 13:20:57.567505546 +0100 @@ -1194,6 +1194,47 @@ return sprintf(buf, "%d\n", emp->blink_policy); } +#define PORT_OOB_INDIRECT_ADDR 0x78 +#define PORT_OOB_INDIRECT_DATA 0x7c + +#define COM_PARAM_REG 0x48 +#define COMWAKE_MASK 0xf +#define COMRST_MASK 0x3f +#define COMWAKE_VAL(x) (((x) & 0xf) << 12) +#define COMRST_VAL(x) (((x) & 0x3f) << 0) + +static void write_phy_indirect(void __iomem *pmmio, u32 v, u32 reg) +{ + writel(reg, pmmio + PORT_OOB_INDIRECT_ADDR); + writel(v, pmmio + PORT_OOB_INDIRECT_DATA); +} + +static u32 read_phy_indirect(void __iomem *pmmio, u32 reg) +{ + writel(reg, pmmio + PORT_OOB_INDIRECT_ADDR); + return readl(pmmio + PORT_OOB_INDIRECT_DATA); +} + +static void comwake_comrst_config(void __iomem *pmmio, u32 comwake, u32 comrst) +{ + u32 v; + + v = read_phy_indirect(pmmio, COM_PARAM_REG); + + if (comwake) { + v &= ~COMWAKE_VAL(COMWAKE_MASK); + v |= COMWAKE_VAL(comwake); + } + + if (comrst) { + v &= ~COMRST_VAL(COMRST_MASK); + v |= COMRST_VAL(comrst); + } + + write_phy_indirect(pmmio, v, COM_PARAM_REG); +} + + static void ahci_port_init(struct device *dev, struct ata_port *ap, int port_no, void __iomem *mmio, void __iomem *port_mmio) @@ -1208,6 +1249,8 @@ if (rc) dev_warn(dev, "%s (%d)\n", emsg, rc); + comwake_comrst_config(port_mmio, hpriv->comwake, hpriv->comreset_u); + /* clear SError */ tmp = readl(port_mmio + PORT_SCR_ERR); VPRINTK("PORT_SCR_ERR 0x%x\n", tmp); diff -ruw linux-5.4.60/drivers/ata/libata-core.c linux-5.4.60-fbx/drivers/ata/libata-core.c --- linux-5.4.60/drivers/ata/libata-core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/ata/libata-core.c 2021-03-04 13:20:57.567505546 +0100 @@ -4478,6 +4478,8 @@ SD7SN6S256G and SD8SN8U256G */ { "SanDisk SD[78]SN*G", NULL, ATA_HORKAGE_NONCQ, }, + { "Boot ROM", NULL, ATA_HORKAGE_NODMA }, + /* devices which puke on READ_NATIVE_MAX */ { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, diff -ruw linux-5.4.60/drivers/ata/libata-scsi.c linux-5.4.60-fbx/drivers/ata/libata-scsi.c --- linux-5.4.60/drivers/ata/libata-scsi.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/ata/libata-scsi.c 2021-03-04 13:20:57.570838879 +0100 @@ -4556,7 +4556,8 @@ */ shost->max_host_blocked = 1; - rc = scsi_add_host_with_dma(shost, &ap->tdev, ap->host->dev); + rc = scsi_add_host_with_dma(shost, + host->dev, host->dev); if (rc) goto err_alloc; } diff -ruw linux-5.4.60/drivers/base/property.c linux-5.4.60-fbx/drivers/base/property.c --- linux-5.4.60/drivers/base/property.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/base/property.c 2021-03-04 13:20:57.590838880 +0100 @@ -17,6 +17,7 @@ #include #include #include +#include struct fwnode_handle *dev_fwnode(struct device *dev) { @@ -838,6 +839,21 @@ { char *res; +#ifdef CONFIG_FBXSERIAL + u32 index; + int ret; + + ret = fwnode_property_read_u32(fwnode, "fbxserial-mac-address", + &index); + if (ret == 0) { + res = (void *)fbxserialinfo_get_mac_addr(index); + if (res) { + memcpy(addr, res, alen); + return res; + } + } +#endif + res = fwnode_get_mac_addr(fwnode, "mac-address", addr, alen); if (res) return res; diff -ruw linux-5.4.60/drivers/base/regmap/internal.h linux-5.4.60-fbx/drivers/base/regmap/internal.h --- linux-5.4.60/drivers/base/regmap/internal.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/base/regmap/internal.h 2021-03-04 13:20:57.590838880 +0100 @@ -294,4 +294,6 @@ return reg >> map->reg_stride_order; } +void *regmap_mmio_ctx_get_base(const void *priv); + #endif diff -ruw linux-5.4.60/drivers/base/regmap/regmap.c linux-5.4.60-fbx/drivers/base/regmap/regmap.c --- linux-5.4.60/drivers/base/regmap/regmap.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/base/regmap/regmap.c 2021-03-04 13:20:57.590838880 +0100 @@ -3110,6 +3110,15 @@ } EXPORT_SYMBOL_GPL(regmap_parse_val); +#ifdef CONFIG_REGMAP_MMIO +void *regmap_get_mmio_base_address(struct regmap *map) +{ + return regmap_mmio_ctx_get_base(map->bus_context); +} + +EXPORT_SYMBOL_GPL(regmap_get_mmio_base_address); +#endif + static int __init regmap_initcall(void) { regmap_debugfs_initcall(); diff -ruw linux-5.4.60/drivers/base/regmap/regmap-mmio.c linux-5.4.60-fbx/drivers/base/regmap/regmap-mmio.c --- linux-5.4.60/drivers/base/regmap/regmap-mmio.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/base/regmap/regmap-mmio.c 2021-03-04 13:20:57.590838880 +0100 @@ -376,4 +376,10 @@ } EXPORT_SYMBOL_GPL(regmap_mmio_detach_clk); +void *regmap_mmio_ctx_get_base(const void *priv) +{ + struct regmap_mmio_context *ctx = (struct regmap_mmio_context *)priv; + return ctx->regs; +} + MODULE_LICENSE("GPL v2"); diff -ruw linux-5.4.60/drivers/bluetooth/Kconfig linux-5.4.60-fbx/drivers/bluetooth/Kconfig --- linux-5.4.60/drivers/bluetooth/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/bluetooth/Kconfig 2021-03-04 13:20:57.607505547 +0100 @@ -211,7 +211,6 @@ depends on BT_HCIUART depends on BT_HCIUART_SERDEV depends on GPIOLIB - depends on ACPI select BT_HCIUART_3WIRE select BT_RTL help diff -ruw linux-5.4.60/drivers/char/hw_random/Kconfig linux-5.4.60-fbx/drivers/char/hw_random/Kconfig --- linux-5.4.60/drivers/char/hw_random/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/char/hw_random/Kconfig 2021-03-04 13:20:57.620838881 +0100 @@ -88,6 +88,11 @@ If unsure, say Y. +config HW_RANDOM_BCM63XX + tristate "Broadcom BCM63xx Random Number Generator support" + depends on ARCH_BCM_63XX || BCM63XX + default HW_RANDOM + config HW_RANDOM_IPROC_RNG200 tristate "Broadcom iProc/STB RNG200 support" depends on ARCH_BCM_IPROC || ARCH_BRCMSTB diff -ruw linux-5.4.60/drivers/char/hw_random/Makefile linux-5.4.60-fbx/drivers/char/hw_random/Makefile --- linux-5.4.60/drivers/char/hw_random/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/char/hw_random/Makefile 2021-03-04 13:20:57.620838881 +0100 @@ -28,6 +28,7 @@ obj-$(CONFIG_HW_RANDOM_POWERNV) += powernv-rng.o obj-$(CONFIG_HW_RANDOM_HISI) += hisi-rng.o obj-$(CONFIG_HW_RANDOM_BCM2835) += bcm2835-rng.o +obj-$(CONFIG_HW_RANDOM_BCM63XX) += bcm63xx-rng.o obj-$(CONFIG_HW_RANDOM_IPROC_RNG200) += iproc-rng200.o obj-$(CONFIG_HW_RANDOM_ST) += st-rng.o obj-$(CONFIG_HW_RANDOM_XGENE) += xgene-rng.o diff -ruw linux-5.4.60/drivers/char/hw_random/omap-rng.c linux-5.4.60-fbx/drivers/char/hw_random/omap-rng.c --- linux-5.4.60/drivers/char/hw_random/omap-rng.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/char/hw_random/omap-rng.c 2021-03-04 13:20:57.620838881 +0100 @@ -67,6 +67,22 @@ #define EIP76_RNG_OUTPUT_SIZE 0x10 /* + * EIP-150 interrupt management registers: + * + * EIP-150 has an EIP-76 (TRNG) and EIP-28 (PKA) in the same block, + * and a couple of registers aggretating interrupt sources from both + * TRNG and PKA. + * + * This doesn't make any attempt at implementing any support for the + * PKA block. This would require another driver and proper interrupt + * sharing between the two. + * + */ +#define EIP150_IRQ_MASK 0x8008 +#define EIP150_IRQ_ACK 0x8010 +#define EIP150_TRNG_MASK (1 << 3) + +/* * EIP76 RNG takes approx. 700us to produce 16 bytes of output data * as per testing results. And to account for the lack of udelay()'s * reliability, we keep the timeout as 1000us. @@ -149,6 +165,7 @@ u32 (*data_present)(struct omap_rng_dev *priv); int (*init)(struct omap_rng_dev *priv); void (*cleanup)(struct omap_rng_dev *priv); + bool hw_is_eip150; }; struct omap_rng_dev { @@ -274,8 +291,21 @@ omap_rng_write(priv, RNG_FRODETUNE_REG, 0x0); omap_rng_write(priv, RNG_FROENABLE_REG, RNG_REG_FROENABLE_MASK); - /* Enable TRNG */ - val = RNG_CONTROL_ENABLE_TRNG_MASK; + /* Setup alarm/shutdown threshold */ + val = RNG_ALARM_THRESHOLD << RNG_ALARMCNT_ALARM_TH_SHIFT; + val |= RNG_SHUTDOWN_THRESHOLD << RNG_ALARMCNT_SHUTDOWN_TH_SHIFT; + omap_rng_write(priv, RNG_ALARMCNT_REG, val); + + /* + * Enable TRNG, we potentially need to preserve + * RNG_SHUTDOWN_OFLO_MASK + */ + if (priv->pdata->regs[RNG_INTMASK_REG]) + val = 0; + else + val = omap_rng_read(priv, RNG_CONTROL_REG) & + RNG_SHUTDOWN_OFLO_MASK; + val |= RNG_CONTROL_ENABLE_TRNG_MASK; omap_rng_write(priv, RNG_CONTROL_REG, val); return 0; @@ -339,6 +369,12 @@ omap_rng_write(priv, RNG_INTACK_REG, RNG_REG_INTACK_SHUTDOWN_OFLO_MASK); + /* + * ack irq at the EIP-150 level + */ + if (priv->pdata->hw_is_eip150) + writel(EIP150_TRNG_MASK, priv->base + EIP150_IRQ_ACK); + return IRQ_HANDLED; } @@ -358,6 +394,15 @@ .cleanup = omap4_rng_cleanup, }; +static struct omap_rng_pdata eip150_rng_pdata = { + .regs = (u16 *)reg_map_eip76, + .data_size = EIP76_RNG_OUTPUT_SIZE, + .data_present = omap4_rng_data_present, + .init = eip76_rng_init, + .cleanup = omap4_rng_cleanup, + .hw_is_eip150 = true, +}; + static const struct of_device_id omap_rng_of_match[] = { { .compatible = "ti,omap2-rng", @@ -371,6 +416,10 @@ .compatible = "inside-secure,safexcel-eip76", .data = &eip76_rng_pdata, }, + { + .compatible = "inside-secure,safexcel-eip150", + .data = &eip150_rng_pdata, + }, {}, }; MODULE_DEVICE_TABLE(of, omap_rng_of_match); @@ -390,7 +439,8 @@ priv->pdata = match->data; if (of_device_is_compatible(dev->of_node, "ti,omap4-rng") || - of_device_is_compatible(dev->of_node, "inside-secure,safexcel-eip76")) { + of_device_is_compatible(dev->of_node, "inside-secure,safexcel-eip76") || + of_device_is_compatible(dev->of_node, "inside-secure,safexcel-eip150")) { irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "%s: error getting IRQ resource - %d\n", @@ -418,6 +468,12 @@ else omap_rng_write(priv, RNG_CONTROL_REG, RNG_SHUTDOWN_OFLO_MASK); + + /* + * unmask IRQ at EIP-150 level + */ + if (priv->pdata->hw_is_eip150) + writel(EIP150_TRNG_MASK, priv->base + EIP150_IRQ_MASK); } return 0; } diff -ruw linux-5.4.60/drivers/char/Kconfig linux-5.4.60-fbx/drivers/char/Kconfig --- linux-5.4.60/drivers/char/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/char/Kconfig 2021-03-04 13:20:57.617505548 +0100 @@ -26,6 +26,15 @@ kind of kernel debugging operations. When in doubt, say "N". +config DEVPHYSMEM + bool "/dev/physmem virtual device support" + default n + help + Say Y here if you want to support the /dev/physmem device. The + /dev/physmem device allows unprivileged access to physical memory + unused by the kernel. + When in doubt, say "N". + source "drivers/tty/serial/Kconfig" source "drivers/tty/serdev/Kconfig" diff -ruw linux-5.4.60/drivers/char/mem.c linux-5.4.60-fbx/drivers/char/mem.c --- linux-5.4.60/drivers/char/mem.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/char/mem.c 2021-03-04 13:20:57.624172215 +0100 @@ -29,6 +29,8 @@ #include #include #include +#include + #include #include #include @@ -434,6 +436,14 @@ return mmap_mem(file, vma); } +static int mmap_physmem(struct file * file, struct vm_area_struct * vma) +{ + if (vma->vm_pgoff < max_pfn && !capable(CAP_SYS_RAWIO)) + return -EPERM; + + return mmap_mem(file, vma); +} + /* * This function reads the *virtual* memory as seen by the kernel. */ @@ -870,6 +880,11 @@ return 0; } +static int open_physmem(struct inode * inode, struct file * filp) +{ + return 0; +} + #define zero_lseek null_lseek #define full_lseek null_lseek #define write_zero write_null @@ -935,6 +950,14 @@ .write = write_full, }; +static const struct file_operations __maybe_unused physmem_fops = { + .mmap = mmap_physmem, + .open = open_physmem, +#ifndef CONFIG_MMU + .get_unmapped_area = get_unmapped_area_mem, +#endif +}; + static const struct memdev { const char *name; umode_t mode; @@ -958,6 +981,9 @@ #ifdef CONFIG_PRINTK [11] = { "kmsg", 0644, &kmsg_fops, 0 }, #endif +#ifdef CONFIG_DEVPHYSMEM + [16] = { "physmem", 0, &physmem_fops, FMODE_UNSIGNED_OFFSET }, +#endif }; static int memory_open(struct inode *inode, struct file *filp) diff -ruw linux-5.4.60/drivers/clk/mvebu/cp110-system-controller.c linux-5.4.60-fbx/drivers/clk/mvebu/cp110-system-controller.c --- linux-5.4.60/drivers/clk/mvebu/cp110-system-controller.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/clk/mvebu/cp110-system-controller.c 2021-03-04 13:20:57.654172217 +0100 @@ -225,6 +225,10 @@ u32 nand_clk_ctrl; int i, ret; char *gate_name[ARRAY_SIZE(gate_base_names)]; + bool ignore_eip150; + + ignore_eip150 = of_property_read_bool(pdev->dev.of_node, + "fbx,ignore-eip150"); regmap = syscon_node_to_regmap(syscon_node); if (IS_ERR(regmap)) @@ -323,6 +327,11 @@ if (gate_name[i] == NULL) continue; + if (ignore_eip150 && i == CP110_GATE_EIP150) { + dev_info(&pdev->dev, "ignoring EIP150 gate clock.\n"); + continue; + } + switch (i) { case CP110_GATE_NAND: parent = nand_name; diff -ruw linux-5.4.60/drivers/cpufreq/Kconfig linux-5.4.60-fbx/drivers/cpufreq/Kconfig --- linux-5.4.60/drivers/cpufreq/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/cpufreq/Kconfig 2021-03-04 13:20:57.690838885 +0100 @@ -327,5 +327,10 @@ This adds the CPUFreq driver support for Freescale QorIQ SoCs which are capable of changing the CPU's frequency dynamically. +config BCM63158_CPUFREQ + tristate "CPU frequency scaling driver for BCM63158 SoC" + depends on ARCH_BCM63XX + endif + endmenu diff -ruw linux-5.4.60/drivers/cpufreq/Makefile linux-5.4.60-fbx/drivers/cpufreq/Makefile --- linux-5.4.60/drivers/cpufreq/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/cpufreq/Makefile 2021-03-04 13:20:57.690838885 +0100 @@ -111,3 +111,5 @@ obj-$(CONFIG_SPARC_US2E_CPUFREQ) += sparc-us2e-cpufreq.o obj-$(CONFIG_SPARC_US3_CPUFREQ) += sparc-us3-cpufreq.o obj-$(CONFIG_UNICORE32) += unicore2-cpufreq.o + +obj-$(CONFIG_BCM63158_CPUFREQ) += bcm63158-cpufreq.o diff -ruw linux-5.4.60/drivers/gpio/gpio-mvebu.c linux-5.4.60-fbx/drivers/gpio/gpio-mvebu.c --- linux-5.4.60/drivers/gpio/gpio-mvebu.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/gpio/gpio-mvebu.c 2021-03-04 13:20:57.777505555 +0100 @@ -66,6 +66,11 @@ #define GPIO_LEVEL_MASK_OFF 0x001c #define GPIO_BLINK_CNT_SELECT_OFF 0x0020 +#define GPIO_CONTROL_SET_OFF 0x0028 +#define GPIO_CONTROL_CLR_OFF 0x002c +#define GPIO_DATAOUT_SET_OFF 0x0030 +#define GPIO_DATAOUT_CLR_OFF 0x0034 + /* * PWM register offsets. */ @@ -110,11 +115,13 @@ struct mvebu_gpio_chip { struct gpio_chip chip; struct regmap *regs; + void __iomem *base; u32 offset; struct regmap *percpu_regs; int irqbase; struct irq_domain *domain; int soc_variant; + int broken_mpp33_dir_wa; /* Used for PWM support */ struct clk *clk; @@ -300,6 +307,18 @@ { struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); + if (mvchip->soc_variant == MVEBU_GPIO_SOC_VARIANT_A8K) { + unsigned int off; + + if (value) + off = GPIO_DATAOUT_SET_OFF; + else + off = GPIO_DATAOUT_CLR_OFF; + + writel(BIT(pin), mvchip->base + off + mvchip->offset); + return; + } + regmap_update_bits(mvchip->regs, GPIO_OUT_OFF + mvchip->offset, BIT(pin), value ? BIT(pin) : 0); } @@ -338,7 +357,7 @@ static int mvebu_gpio_direction_input(struct gpio_chip *chip, unsigned int pin) { struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); - int ret; + int offset, ret; /* * Check with the pinctrl driver whether this pin is usable as @@ -348,7 +367,16 @@ if (ret) return ret; - regmap_update_bits(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, + offset = 0; + if (pin == 1 && mvchip->broken_mpp33_dir_wa) { + /* + * See comment in mvebu_gpio_direction_output(). + */ + offset = -0x40; + } + + regmap_update_bits(mvchip->regs, + GPIO_IO_CONF_OFF + mvchip->offset + offset, BIT(pin), BIT(pin)); return 0; @@ -358,7 +386,7 @@ int value) { struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); - int ret; + int offset, ret; /* * Check with the pinctrl driver whether this pin is usable as @@ -371,7 +399,17 @@ mvebu_gpio_blink(chip, pin, 0); mvebu_gpio_set(chip, pin, value); - regmap_update_bits(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, + offset = 0; + if (pin == 1 && mvchip->broken_mpp33_dir_wa) { + /* + * gpio33 direction bit is not controlled from the + * gpio block 0, but from gpio block 1 instead + */ + offset = -0x40; + } + + regmap_update_bits(mvchip->regs, + GPIO_IO_CONF_OFF + mvchip->offset + offset, BIT(pin), 0); return 0; @@ -380,9 +418,18 @@ static int mvebu_gpio_get_direction(struct gpio_chip *chip, unsigned int pin) { struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); + int offset; u32 u; - regmap_read(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset, &u); + offset = 0; + if (pin == 1 && mvchip->broken_mpp33_dir_wa) { + /* + * See comment in mvebu_gpio_direction_output(). + */ + offset = -0x40; + } + + regmap_read(mvchip->regs, GPIO_IO_CONF_OFF + mvchip->offset + offset, &u); return !!(u & BIT(pin)); } @@ -1046,6 +1093,8 @@ if (IS_ERR(mvchip->regs)) return PTR_ERR(mvchip->regs); + mvchip->base = base; + /* * For the legacy SoCs, the regmap directly maps to the GPIO * registers, so no offset is needed. @@ -1078,6 +1127,8 @@ if (IS_ERR(mvchip->regs)) return PTR_ERR(mvchip->regs); + mvchip->base = regmap_get_mmio_base_address(mvchip->regs); + if (of_property_read_u32(pdev->dev.of_node, "offset", &mvchip->offset)) return -EINVAL; @@ -1095,6 +1146,7 @@ bool have_irqs; int soc_variant; int i, cpu, id; + uint32_t broken_mpp33_dir = 0; int err; match = of_match_device(mvebu_gpio_of_match, &pdev->dev); @@ -1118,6 +1170,12 @@ return -ENODEV; } + of_property_read_u32(pdev->dev.of_node, "marvell,broken-mpp33-dir", + &broken_mpp33_dir); + if (broken_mpp33_dir) + dev_notice(&pdev->dev, "using direction set work around for " + "MPP 33.\n"); + id = of_alias_get_id(pdev->dev.of_node, "gpio"); if (id < 0) { dev_err(&pdev->dev, "Couldn't get OF id\n"); @@ -1129,6 +1187,7 @@ if (!IS_ERR(mvchip->clk)) clk_prepare_enable(mvchip->clk); + mvchip->broken_mpp33_dir_wa = broken_mpp33_dir; mvchip->soc_variant = soc_variant; mvchip->chip.label = dev_name(&pdev->dev); mvchip->chip.parent = &pdev->dev; diff -ruw linux-5.4.60/drivers/hid/hid-quirks.c linux-5.4.60-fbx/drivers/hid/hid-quirks.c --- linux-5.4.60/drivers/hid/hid-quirks.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/hid/hid-quirks.c 2021-03-04 13:20:58.437505585 +0100 @@ -684,6 +684,7 @@ #if IS_ENABLED(CONFIG_HID_ZYDACRON) { HID_USB_DEVICE(USB_VENDOR_ID_ZYDACRON, USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL) }, #endif + { HID_BLUETOOTH_DEVICE(0x10eb, 0x0023) }, { } }; diff -ruw linux-5.4.60/drivers/hid/Kconfig linux-5.4.60-fbx/drivers/hid/Kconfig --- linux-5.4.60/drivers/hid/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/hid/Kconfig 2021-03-04 13:20:58.430838917 +0100 @@ -439,6 +439,11 @@ help Support for ViewSonic/Signotec PD1011 signature pad. +config HID_FBX_REMOTE_AUDIO + tristate "Freebox BLE remote audio driver" + depends on HID && SND + select SND_PCM + config HID_GYRATION tristate "Gyration remote control" depends on HID diff -ruw linux-5.4.60/drivers/hid/Makefile linux-5.4.60-fbx/drivers/hid/Makefile --- linux-5.4.60/drivers/hid/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/hid/Makefile 2021-03-04 13:20:58.430838917 +0100 @@ -50,6 +50,7 @@ obj-$(CONFIG_HID_GFRM) += hid-gfrm.o obj-$(CONFIG_HID_GOOGLE_HAMMER) += hid-google-hammer.o obj-$(CONFIG_HID_GT683R) += hid-gt683r.o +obj-$(CONFIG_HID_FBX_REMOTE_AUDIO) += hid-fbx-remote-audio.o obj-$(CONFIG_HID_GYRATION) += hid-gyration.o obj-$(CONFIG_HID_HOLTEK) += hid-holtek-kbd.o obj-$(CONFIG_HID_HOLTEK) += hid-holtek-mouse.o diff -ruw linux-5.4.60/drivers/hwmon/adt7475.c linux-5.4.60-fbx/drivers/hwmon/adt7475.c --- linux-5.4.60/drivers/hwmon/adt7475.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/hwmon/adt7475.c 2021-03-04 13:20:58.450838918 +0100 @@ -128,7 +128,19 @@ /* Macro to read the registers */ -#define adt7475_read(reg) i2c_smbus_read_byte_data(client, (reg)) +static inline s32 __adt7475_read(const struct i2c_client *client, u8 cmd) +{ + s32 ret; + + ret = i2c_smbus_read_byte_data(client, cmd); + if (ret < 0) { + printk("__adt7475_read error: %d\n", ret); + return 0; + } + return ret; +} + +#define adt7475_read(reg) __adt7475_read(client, (reg)) /* Macros to easily index the registers */ diff -ruw linux-5.4.60/drivers/hwmon/Kconfig linux-5.4.60-fbx/drivers/hwmon/Kconfig --- linux-5.4.60/drivers/hwmon/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/hwmon/Kconfig 2021-03-04 13:20:58.447505585 +0100 @@ -1922,6 +1922,17 @@ If you say yes here you get support for the temperature and power sensors for APM X-Gene SoC. +config SENSORS_KIRKWOOD_CORETEMP + tristate "Kirkwood core temperature censor" + depends on MACH_KIRKWOOD + +config SENSORS_LD6710_FBX + tristate "LD6710 hardware monitoring driver (as seen on Freebox hardware)" + depends on I2C + +config SENSORS_AP806 + tristate "Marvell AP806/CP110 hardware monitoring driver" + if ACPI comment "ACPI drivers" diff -ruw linux-5.4.60/drivers/hwmon/Makefile linux-5.4.60-fbx/drivers/hwmon/Makefile --- linux-5.4.60/drivers/hwmon/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/hwmon/Makefile 2021-03-04 13:20:58.447505585 +0100 @@ -87,6 +87,7 @@ obj-$(CONFIG_SENSORS_JC42) += jc42.o obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o obj-$(CONFIG_SENSORS_K10TEMP) += k10temp.o +obj-$(CONFIG_SENSORS_LD6710_FBX) += ld6710-fbx.o obj-$(CONFIG_SENSORS_LINEAGE) += lineage-pem.o obj-$(CONFIG_SENSORS_LOCHNAGAR) += lochnagar-hwmon.o obj-$(CONFIG_SENSORS_LM63) += lm63.o @@ -177,6 +178,8 @@ obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o obj-$(CONFIG_SENSORS_XGENE) += xgene-hwmon.o +obj-$(CONFIG_SENSORS_KIRKWOOD_CORETEMP)+= kirkwood-coretemp.o +obj-$(CONFIG_SENSORS_AP806) += ap806-hwmon.o obj-$(CONFIG_SENSORS_OCC) += occ/ obj-$(CONFIG_PMBUS) += pmbus/ diff -ruw linux-5.4.60/drivers/i2c/busses/i2c-mv64xxx.c linux-5.4.60-fbx/drivers/i2c/busses/i2c-mv64xxx.c --- linux-5.4.60/drivers/i2c/busses/i2c-mv64xxx.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/i2c/busses/i2c-mv64xxx.c 2021-03-04 13:20:58.480838920 +0100 @@ -22,6 +22,8 @@ #include #include #include +#include +#include #include #include #include @@ -147,6 +149,10 @@ bool irq_clear_inverted; /* Clk div is 2 to the power n, not 2 to the power n + 1 */ bool clk_n_base_0; + struct i2c_bus_recovery_info rinfo; + struct pinctrl *pinctrl; + struct pinctrl_state *pinctrl_pins_default; + struct pinctrl_state *pinctrl_pins_gpio; }; static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = { @@ -312,6 +318,11 @@ case MV64XXX_I2C_STATUS_MAST_WR_NO_ACK: /* 30 */ case MV64XXX_I2C_STATUS_MAST_RD_ADDR_NO_ACK: /* 48 */ /* Doesn't seem to be a device at other end */ + dev_dbg(&drv_data->adapter.dev, + "mv64xxx_i2c_fsm: got no ack -- state: 0x%x, " + "status: 0x%x, addr: 0x%x, flags: 0x%x\n", + drv_data->state, status, drv_data->msg->addr, + drv_data->msg->flags); drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; drv_data->state = MV64XXX_I2C_STATE_IDLE; drv_data->rc = -ENXIO; @@ -562,6 +573,8 @@ "mv64xxx: I2C bus locked, block: %d, " "time_left: %d\n", drv_data->block, (int)time_left); + if (drv_data->adapter.bus_recovery_info) + i2c_recover_bus(&drv_data->adapter); mv64xxx_i2c_hw_init(drv_data); } } else @@ -573,6 +586,34 @@ int is_last) { unsigned long flags; + int limit; + + /* + * wait for (re)start/stop condition to clear from last + * transfer if any + */ + limit = 1000; + do { + u32 val; + + val = readl(drv_data->reg_base + drv_data->reg_offsets.control); + if (!(val & (MV64XXX_I2C_REG_CONTROL_STOP | + MV64XXX_I2C_REG_CONTROL_STOP))) + break; + + udelay(1); + } while (limit-- > 0); + + if (limit < 0) { + dev_err(&drv_data->adapter.dev, + "mv64xxx: start/stop bit won't clear\n"); + } + + /* according to datasheet, controller is buggy when you do + * register polling and it says to always wait for an IRQ + * (clock domain related), since we busywait for START/STOP + * clear, add a small delay */ + udelay(5); spin_lock_irqsave(&drv_data->lock, flags); @@ -580,6 +621,7 @@ drv_data->send_stop = is_last; drv_data->block = 1; + mv64xxx_i2c_send_start(drv_data); spin_unlock_irqrestore(&drv_data->lock, flags); @@ -863,6 +905,61 @@ out: return rc; } + +static void mv64xxx_prepare_recovery(struct i2c_adapter *adap) +{ + struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap); + pinctrl_select_state(drv_data->pinctrl, drv_data->pinctrl_pins_gpio); +} + +static void mv64xxx_unprepare_recovery(struct i2c_adapter *adap) +{ + struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap); + pinctrl_select_state(drv_data->pinctrl, drv_data->pinctrl_pins_default); +} + +static int mv64xxx_init_recovery_info(struct mv64xxx_i2c_data *drv_data, + struct platform_device *pdev) +{ + struct i2c_bus_recovery_info *rinfo = &drv_data->rinfo; + + drv_data->pinctrl = devm_pinctrl_get(&pdev->dev); + if (!drv_data->pinctrl || IS_ERR(drv_data->pinctrl)) { + if (PTR_ERR(drv_data->pinctrl) == -EPROBE_DEFER) + return -EPROBE_DEFER; + dev_info(&pdev->dev, "can't get pinctrl, bus recovery not supported\n"); + return 0; + } + + drv_data->pinctrl_pins_default = pinctrl_lookup_state(drv_data->pinctrl, + PINCTRL_STATE_DEFAULT); + drv_data->pinctrl_pins_gpio = pinctrl_lookup_state(drv_data->pinctrl, + "gpio"); + + rinfo->sda_gpiod = devm_gpiod_get(&pdev->dev, "sda", + GPIOD_IN); + rinfo->scl_gpiod = devm_gpiod_get(&pdev->dev, "scl", + GPIOD_OUT_HIGH_OPEN_DRAIN); + + if (PTR_ERR(rinfo->sda_gpiod) == -EPROBE_DEFER || + PTR_ERR(rinfo->scl_gpiod) == -EPROBE_DEFER) { + return -EPROBE_DEFER; + } else if (IS_ERR(rinfo->sda_gpiod) || + IS_ERR(rinfo->scl_gpiod) || + IS_ERR(drv_data->pinctrl_pins_default) || + IS_ERR(drv_data->pinctrl_pins_gpio)) { + dev_info(&pdev->dev, "recovery information incomplete\n"); + return 0; + } + + rinfo->prepare_recovery = mv64xxx_prepare_recovery; + rinfo->unprepare_recovery = mv64xxx_unprepare_recovery; + rinfo->recover_bus = i2c_generic_scl_recovery; + drv_data->adapter.bus_recovery_info = rinfo; + + return 0; +} + #else /* CONFIG_OF */ static int mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, @@ -870,8 +967,15 @@ { return -ENODEV; } + +static int mv64xxx_init_recovery_info(struct mv64xxx_i2c_data *drv_data, + struct platform_device *pdev) +{ + return 0; +} #endif /* CONFIG_OF */ + static int mv64xxx_i2c_probe(struct platform_device *pd) { @@ -899,6 +1003,10 @@ init_waitqueue_head(&drv_data->waitq); spin_lock_init(&drv_data->lock); + rc = mv64xxx_init_recovery_info(drv_data, pd); + if (rc) + return rc; + /* Not all platforms have clocks */ drv_data->clk = devm_clk_get(&pd->dev, NULL); if (IS_ERR(drv_data->clk) && PTR_ERR(drv_data->clk) == -EPROBE_DEFER) @@ -934,7 +1042,7 @@ drv_data->adapter.dev.parent = &pd->dev; drv_data->adapter.algo = &mv64xxx_i2c_algo; drv_data->adapter.owner = THIS_MODULE; - drv_data->adapter.class = I2C_CLASS_DEPRECATED; + drv_data->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD; drv_data->adapter.nr = pd->id; drv_data->adapter.dev.of_node = pd->dev.of_node; platform_set_drvdata(pd, drv_data); diff -ruw linux-5.4.60/drivers/i2c/busses/Kconfig linux-5.4.60-fbx/drivers/i2c/busses/Kconfig --- linux-5.4.60/drivers/i2c/busses/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/i2c/busses/Kconfig 2021-03-04 13:20:58.474172253 +0100 @@ -473,7 +473,7 @@ config I2C_BRCMSTB tristate "BRCM Settop/DSL I2C controller" depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM_63XX || \ - COMPILE_TEST + ARCH_BCM63XX || COMPILE_TEST default y help If you say yes to this option, support will be included for the @@ -1376,6 +1376,10 @@ to SLIMpro (On chip coprocessor) mailbox mechanism. If unsure, say N. +config I2C_WP3 + tristate "Wintegra WP3 I2C controll" + depends on WINTEGRA_WINPATH3 + config SCx200_ACB tristate "Geode ACCESS.bus support" depends on X86_32 && PCI diff -ruw linux-5.4.60/drivers/i2c/busses/Makefile linux-5.4.60-fbx/drivers/i2c/busses/Makefile --- linux-5.4.60/drivers/i2c/busses/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/i2c/busses/Makefile 2021-03-04 13:20:58.474172253 +0100 @@ -123,6 +123,7 @@ obj-$(CONFIG_I2C_XLP9XX) += i2c-xlp9xx.o obj-$(CONFIG_I2C_RCAR) += i2c-rcar.o obj-$(CONFIG_I2C_ZX2967) += i2c-zx2967.o +obj-$(CONFIG_I2C_WP3) += i2c-wp3.o # External I2C/SMBus adapter drivers obj-$(CONFIG_I2C_DIOLAN_U2C) += i2c-diolan-u2c.o diff -ruw linux-5.4.60/drivers/i2c/i2c-core-base.c linux-5.4.60-fbx/drivers/i2c/i2c-core-base.c --- linux-5.4.60/drivers/i2c/i2c-core-base.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/i2c/i2c-core-base.c 2021-03-04 13:20:58.487505587 +0100 @@ -223,12 +223,14 @@ bri->set_sda(adap, scl); ndelay(RECOVERY_NDELAY / 2); + if (0) { if (scl) { ret = i2c_generic_bus_free(adap); if (ret == 0) break; } } + } /* If we can't check bus status, assume recovery worked */ if (ret == -EOPNOTSUPP) diff -ruw linux-5.4.60/drivers/input/misc/Kconfig linux-5.4.60-fbx/drivers/input/misc/Kconfig --- linux-5.4.60/drivers/input/misc/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/input/misc/Kconfig 2021-03-04 13:20:58.604172259 +0100 @@ -894,4 +894,9 @@ To compile this driver as a module, choose M here: the module will be called stpmic1_onkey. +config INPUT_SMSC_CAP1066 + tristate "SMSC CAP1066 capacitive sensor driver" + select I2C + select INPUT_POLLDEV + endif diff -ruw linux-5.4.60/drivers/input/misc/Makefile linux-5.4.60-fbx/drivers/input/misc/Makefile --- linux-5.4.60/drivers/input/misc/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/input/misc/Makefile 2021-03-04 13:20:58.604172259 +0100 @@ -85,4 +85,4 @@ obj-$(CONFIG_INPUT_XEN_KBDDEV_FRONTEND) += xen-kbdfront.o obj-$(CONFIG_INPUT_YEALINK) += yealink.o obj-$(CONFIG_INPUT_IDEAPAD_SLIDEBAR) += ideapad_slidebar.o - +obj-$(CONFIG_INPUT_SMSC_CAP1066) += smsc_cap1066.o diff -ruw linux-5.4.60/drivers/Kconfig linux-5.4.60-fbx/drivers/Kconfig --- linux-5.4.60/drivers/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/Kconfig 2021-03-04 13:20:57.530838878 +0100 @@ -18,6 +18,8 @@ source "drivers/gnss/Kconfig" +source "drivers/fbxprocfs/Kconfig" + source "drivers/mtd/Kconfig" source "drivers/of/Kconfig" @@ -78,6 +80,10 @@ source "drivers/gpio/Kconfig" +source "drivers/fbxgpio/Kconfig" + +source "drivers/fbxjtag/Kconfig" + source "drivers/w1/Kconfig" source "drivers/power/Kconfig" @@ -86,6 +92,8 @@ source "drivers/thermal/Kconfig" +source "drivers/fbxwatchdog/Kconfig" + source "drivers/watchdog/Kconfig" source "drivers/ssb/Kconfig" diff -ruw linux-5.4.60/drivers/leds/Kconfig linux-5.4.60-fbx/drivers/leds/Kconfig --- linux-5.4.60/drivers/leds/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/leds/Kconfig 2021-03-04 13:20:58.647505594 +0100 @@ -823,6 +823,16 @@ Say Y to enable the LM36274 LED driver for TI LMU devices. This supports the LED device LM36274. +config LEDS_LED1202 + tristate "LED support for STMicroElectronics LED1202" + depends on LEDS_CLASS && I2C && OF + help + This option enables support for the LED1202 12-channel + LED driver. + + To compile this driver as a module, choose M here: the module + will be called leds-led1202. + comment "LED Triggers" source "drivers/leds/trigger/Kconfig" diff -ruw linux-5.4.60/drivers/leds/Makefile linux-5.4.60-fbx/drivers/leds/Makefile --- linux-5.4.60/drivers/leds/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/leds/Makefile 2021-03-04 13:20:58.647505594 +0100 @@ -85,6 +85,7 @@ obj-$(CONFIG_LEDS_TI_LMU_COMMON) += leds-ti-lmu-common.o obj-$(CONFIG_LEDS_LM3697) += leds-lm3697.o obj-$(CONFIG_LEDS_LM36274) += leds-lm36274.o +obj-$(CONFIG_LEDS_LED1202) += leds-led1202.o # LED SPI Drivers obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o diff -ruw linux-5.4.60/drivers/Makefile linux-5.4.60-fbx/drivers/Makefile --- linux-5.4.60/drivers/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/Makefile 2021-03-04 13:20:57.530838878 +0100 @@ -16,7 +16,9 @@ obj-$(CONFIG_GPIOLIB) += gpio/ obj-y += pwm/ +obj-$(CONFIG_FREEBOX_GPIO) += fbxgpio/ obj-y += pci/ +obj-$(CONFIG_FREEBOX_JTAG) += fbxjtag/ obj-$(CONFIG_PARISC) += parisc/ obj-$(CONFIG_RAPIDIO) += rapidio/ @@ -117,6 +119,7 @@ obj-y += power/ obj-$(CONFIG_HWMON) += hwmon/ obj-$(CONFIG_THERMAL) += thermal/ +obj-$(CONFIG_FREEBOX_WATCHDOG) += fbxwatchdog/ obj-$(CONFIG_WATCHDOG) += watchdog/ obj-$(CONFIG_MD) += md/ obj-$(CONFIG_BT) += bluetooth/ @@ -186,3 +189,5 @@ obj-$(CONFIG_GNSS) += gnss/ obj-$(CONFIG_INTERCONNECT) += interconnect/ obj-$(CONFIG_COUNTER) += counter/ + +obj-$(CONFIG_FREEBOX_PROCFS) += fbxprocfs/ diff -ruw linux-5.4.60/drivers/media/dvb-core/dvb_frontend.c linux-5.4.60-fbx/drivers/media/dvb-core/dvb_frontend.c --- linux-5.4.60/drivers/media/dvb-core/dvb_frontend.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/media/dvb-core/dvb_frontend.c 2021-03-04 13:20:58.687505596 +0100 @@ -807,6 +807,7 @@ if (fe->exit != DVB_FE_DEVICE_REMOVED) fe->exit = DVB_FE_NORMAL_EXIT; mb(); + wake_up_all(&fepriv->events.wait_queue); if (!fepriv->thread) return; @@ -2715,6 +2716,9 @@ poll_wait(file, &fepriv->events.wait_queue, wait); + if (fe->exit) + return POLLERR | POLLHUP; + if (fepriv->events.eventw != fepriv->events.eventr) return (EPOLLIN | EPOLLRDNORM | EPOLLPRI); diff -ruw linux-5.4.60/drivers/media/rc/keymaps/Makefile linux-5.4.60-fbx/drivers/media/rc/keymaps/Makefile --- linux-5.4.60/drivers/media/rc/keymaps/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/media/rc/keymaps/Makefile 2021-03-04 13:20:58.817505601 +0100 @@ -91,6 +91,7 @@ rc-pv951.o \ rc-hauppauge.o \ rc-rc6-mce.o \ + rc-rc6-freebox.o \ rc-real-audio-220-32-keys.o \ rc-reddo.o \ rc-snapstream-firefly.o \ diff -ruw linux-5.4.60/drivers/media/usb/dvb-usb/dib0700_devices.c linux-5.4.60-fbx/drivers/media/usb/dvb-usb/dib0700_devices.c --- linux-5.4.60/drivers/media/usb/dvb-usb/dib0700_devices.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/media/usb/dvb-usb/dib0700_devices.c 2021-03-04 13:20:58.840838936 +0100 @@ -3912,6 +3912,7 @@ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096PVR) }, /* 85 */{ USB_DEVICE(USB_VID_HAMA, USB_PID_HAMA_DVBT_HYBRID) }, { USB_DEVICE(USB_VID_MICROSOFT, USB_PID_XBOX_ONE_TUNER) }, + { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_HOOK_DEFAULT_STK7770P) }, { 0 } /* Terminating entry */ }; MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table); @@ -5154,6 +5155,30 @@ { NULL }, }, }, + }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, + .num_adapters = 1, + .adapter = { + { + DIB0700_NUM_FRONTENDS(1), + .fe = {{ + .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF, + .pid_filter_count = 32, + .pid_filter = stk70x0p_pid_filter, + .pid_filter_ctrl = stk70x0p_pid_filter_ctrl, + .frontend_attach = stk7770p_frontend_attach, + .tuner_attach = dib7770p_tuner_attach, + + DIB0700_DEFAULT_STREAMING_CONFIG(0x02), + }}, + }, + }, + .num_device_descs = 1, + .devices = { + { "DiBcom STK7770P reference design no IR", + { &dib0700_usb_id_table[87], NULL }, + { NULL }, + }, + }, }, }; diff -ruw linux-5.4.60/drivers/mfd/Kconfig linux-5.4.60-fbx/drivers/mfd/Kconfig --- linux-5.4.60/drivers/mfd/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mfd/Kconfig 2021-03-04 13:20:58.880838938 +0100 @@ -1967,6 +1967,16 @@ This driver provides common support for accessing the device, additional drivers must be enabled in order to use the functionality of the device. +config MFD_FBXGW7R_PANEL + tristate "Freebox fbxgw7r panel support" + depends on FB + depends on SPI_MASTER + depends on OF + select FB_SYS_FOPS + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select FB_DEFERRED_IO menu "Multimedia Capabilities Port drivers" depends on ARCH_SA1100 diff -ruw linux-5.4.60/drivers/mfd/Makefile linux-5.4.60-fbx/drivers/mfd/Makefile --- linux-5.4.60/drivers/mfd/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mfd/Makefile 2021-03-04 13:20:58.880838938 +0100 @@ -255,4 +255,5 @@ obj-$(CONFIG_MFD_ROHM_BD70528) += rohm-bd70528.o obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o obj-$(CONFIG_MFD_STMFX) += stmfx.o +obj-$(CONFIG_MFD_FBXGW7R_PANEL) += fbxgw7r-panel.o diff -ruw linux-5.4.60/drivers/misc/eeprom/at24.c linux-5.4.60-fbx/drivers/misc/eeprom/at24.c --- linux-5.4.60/drivers/misc/eeprom/at24.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/misc/eeprom/at24.c 2021-03-04 13:20:58.904172272 +0100 @@ -566,7 +566,6 @@ struct at24_data *at24; struct regmap *regmap; bool writable; - u8 test_byte; int err; i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); @@ -587,8 +586,10 @@ page_size = 1; flags = cdata->flags; +#ifndef CONFIG_NVMEM_IGNORE_RO if (device_property_present(dev, "read-only")) flags |= AT24_FLAG_READONLY; +#endif if (device_property_present(dev, "no-read-rollover")) flags |= AT24_FLAG_NO_RDROL; @@ -705,17 +706,6 @@ pm_runtime_set_active(dev); pm_runtime_enable(dev); - /* - * Perform a one-byte test read to verify that the - * chip is functional. - */ - err = at24_read(at24, 0, &test_byte, 1); - pm_runtime_idle(dev); - if (err) { - pm_runtime_disable(dev); - return -ENODEV; - } - dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n", byte_len, client->name, writable ? "writable" : "read-only", at24->write_max); diff -ruw linux-5.4.60/drivers/misc/eeprom/Kconfig linux-5.4.60-fbx/drivers/misc/eeprom/Kconfig --- linux-5.4.60/drivers/misc/eeprom/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/misc/eeprom/Kconfig 2021-03-04 13:20:58.904172272 +0100 @@ -129,4 +129,8 @@ This driver can also be built as a module. If so, the module will be called ee1004. +config EEPROM_EE1004_RAW + tristate "SPD EEPROMs on DDR4 memory modules (non smbus)" + depends on I2C && SYSFS + endmenu diff -ruw linux-5.4.60/drivers/misc/eeprom/Makefile linux-5.4.60-fbx/drivers/misc/eeprom/Makefile --- linux-5.4.60/drivers/misc/eeprom/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/misc/eeprom/Makefile 2021-03-04 13:20:58.904172272 +0100 @@ -8,3 +8,4 @@ obj-$(CONFIG_EEPROM_DIGSY_MTC_CFG) += digsy_mtc_eeprom.o obj-$(CONFIG_EEPROM_IDT_89HPESX) += idt_89hpesx.o obj-$(CONFIG_EEPROM_EE1004) += ee1004.o +obj-$(CONFIG_EEPROM_EE1004_RAW) += ee1004_raw.o diff -ruw linux-5.4.60/drivers/misc/Kconfig linux-5.4.60-fbx/drivers/misc/Kconfig --- linux-5.4.60/drivers/misc/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/misc/Kconfig 2021-03-04 13:20:58.900838939 +0100 @@ -5,6 +5,9 @@ menu "Misc devices" +config WINTEGRA_MMAP + bool "wintegra mmap driver" + config SENSORS_LIS3LV02D tristate depends on INPUT @@ -379,6 +382,18 @@ To compile this driver as a module, choose M here: the module will be called vmw_balloon. +config INTELCE_PIC16PMU + tristate "PIC16 PMU, LED, hwmon support" + select INPUT_POLLDEV + select NEW_LEDS + select I2C + select HWMON + select ARCH_REQUIRE_GPIOLIB + ---help--- + Freebox v6 HD PIC16 PMU interface support, enables + control of the on-board LEDs and reports the power status, + reset status and button status. + config PCH_PHUB tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) PHUB" select GENERIC_NET_UTILS @@ -400,6 +415,15 @@ To compile this driver as a module, choose M here: the module will be called pch_phub. +config FBXSERIAL_OF + bool "read fbxserial through DT chosen node" + depends on OF + select ARCH_HAS_FBXSERIAL + +config RANDOM_OF + bool "get Linux PRNG random through dt chosen node." + depends on OF + config LATTICE_ECP3_CONFIG tristate "Lattice ECP3 FPGA bitstream configuration via SPI" depends on SPI && SYSFS @@ -481,4 +505,6 @@ source "drivers/misc/ocxl/Kconfig" source "drivers/misc/cardreader/Kconfig" source "drivers/misc/habanalabs/Kconfig" +source "drivers/misc/remoti/Kconfig" +source "drivers/misc/hdmi-cec/Kconfig" endmenu diff -ruw linux-5.4.60/drivers/misc/Makefile linux-5.4.60-fbx/drivers/misc/Makefile --- linux-5.4.60/drivers/misc/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/misc/Makefile 2021-03-04 13:20:58.900838939 +0100 @@ -3,6 +3,7 @@ # Makefile for misc devices that really don't fit anywhere else. # +obj-$(CONFIG_WINTEGRA_MMAP) += wintegra_mmap.o obj-$(CONFIG_IBM_ASM) += ibmasm/ obj-$(CONFIG_IBMVMC) += ibmvmc.o obj-$(CONFIG_AD525X_DPOT) += ad525x_dpot.o @@ -23,7 +24,10 @@ obj-$(CONFIG_SENSORS_APDS990X) += apds990x.o obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o obj-$(CONFIG_KGDB_TESTS) += kgdbts.o +obj-$(CONFIG_FBXSERIAL_OF) += fbxserial_of.o +obj-$(CONFIG_RANDOM_OF) += random_of.o obj-$(CONFIG_SGI_XP) += sgi-xp/ +obj-$(CONFIG_INTELCE_PIC16PMU) += pic16-pmu.o obj-$(CONFIG_SGI_GRU) += sgi-gru/ obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o obj-$(CONFIG_HP_ILO) += hpilo.o @@ -38,6 +42,7 @@ obj-y += cb710/ obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o obj-$(CONFIG_PCH_PHUB) += pch_phub.o +obj-y += hdmi-cec/ obj-y += ti-st/ obj-y += lis3lv02d/ obj-$(CONFIG_ALTERA_STAPL) +=altera-stapl/ @@ -57,3 +62,4 @@ obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_HABANA_AI) += habanalabs/ obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o +obj-y += remoti/ diff -ruw linux-5.4.60/drivers/mmc/core/block.c linux-5.4.60-fbx/drivers/mmc/core/block.c --- linux-5.4.60/drivers/mmc/core/block.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mmc/core/block.c 2021-03-04 13:20:58.930838940 +0100 @@ -2319,7 +2319,7 @@ md->parent = parent; set_disk_ro(md->disk, md->read_only || default_ro); md->disk->flags = GENHD_FL_EXT_DEVT; - if (area_type & (MMC_BLK_DATA_AREA_RPMB | MMC_BLK_DATA_AREA_BOOT)) + if (area_type & (MMC_BLK_DATA_AREA_RPMB)) md->disk->flags |= GENHD_FL_NO_PART_SCAN | GENHD_FL_SUPPRESS_PARTITION_INFO; diff -ruw linux-5.4.60/drivers/mmc/host/Kconfig linux-5.4.60-fbx/drivers/mmc/host/Kconfig --- linux-5.4.60/drivers/mmc/host/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mmc/host/Kconfig 2021-03-04 13:20:58.934172273 +0100 @@ -976,7 +976,7 @@ config MMC_SDHCI_BRCMSTB tristate "Broadcom SDIO/SD/MMC support" - depends on ARCH_BRCMSTB || BMIPS_GENERIC + depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM63XX depends on MMC_SDHCI_PLTFM default y help diff -ruw linux-5.4.60/drivers/mtd/Kconfig linux-5.4.60-fbx/drivers/mtd/Kconfig --- linux-5.4.60/drivers/mtd/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/Kconfig 2021-03-04 13:20:58.947505608 +0100 @@ -23,6 +23,9 @@ WARNING: some of the tests will ERASE entire MTD device which they test. Do not use these tests unless you really know what you do. +config MTD_ERASE_PRINTK + bool "write to kernel log when a block is erased" + menu "Partition parsers" source "drivers/mtd/parsers/Kconfig" endmenu diff -ruw linux-5.4.60/drivers/mtd/mtdchar.c linux-5.4.60-fbx/drivers/mtd/mtdchar.c --- linux-5.4.60/drivers/mtd/mtdchar.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/mtdchar.c 2021-03-04 13:20:58.954172274 +0100 @@ -176,6 +176,7 @@ { struct mtd_oob_ops ops; + memset(&ops, 0, sizeof (ops)); ops.mode = MTD_OPS_RAW; ops.datbuf = kbuf; ops.oobbuf = NULL; @@ -270,6 +271,7 @@ { struct mtd_oob_ops ops; + memset(&ops, 0, sizeof (ops)); ops.mode = MTD_OPS_RAW; ops.datbuf = kbuf; ops.oobbuf = NULL; @@ -753,6 +755,11 @@ erase->len = einfo32.length; } +#ifdef CONFIG_MTD_ERASE_PRINTK + printk(KERN_DEBUG "mtd: %s: ERASE offset=@%08llx\n", + mtd->name, erase->addr); +#endif + ret = mtd_erase(mtd, erase); kfree(erase); } diff -ruw linux-5.4.60/drivers/mtd/mtdcore.c linux-5.4.60-fbx/drivers/mtd/mtdcore.c --- linux-5.4.60/drivers/mtd/mtdcore.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/mtdcore.c 2021-03-04 13:20:58.954172274 +0100 @@ -307,6 +307,43 @@ } static DEVICE_ATTR(bbt_blocks, S_IRUGO, mtd_bbtblocks_show, NULL); +static ssize_t mtd_nand_type_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct mtd_info *mtd = dev_get_drvdata(dev); + + return snprintf(buf, PAGE_SIZE, "%s\n", mtd->nand_type); +} +static DEVICE_ATTR(nand_type, S_IRUGO, mtd_nand_type_show, NULL); + +static ssize_t mtd_nand_manufacturer_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct mtd_info *mtd = dev_get_drvdata(dev); + + return snprintf(buf, PAGE_SIZE, "%s\n", mtd->nand_manufacturer); +} +static DEVICE_ATTR(nand_manufacturer, S_IRUGO, mtd_nand_manufacturer_show, NULL); + +static ssize_t mtd_nand_onfi_ecc_bits_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct mtd_info *mtd = dev_get_drvdata(dev); + + return snprintf(buf, PAGE_SIZE, "%d\n", mtd->onfi_ecc_bits); +} +static DEVICE_ATTR(onfi_ecc_bits, S_IRUGO, mtd_nand_onfi_ecc_bits_show, NULL); + +static ssize_t mtd_nand_onfi_model_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct mtd_info *mtd = dev_get_drvdata(dev); + + return snprintf(buf, PAGE_SIZE, "%s\n", + mtd->onfi_model ? mtd->onfi_model : "unknown"); +} +static DEVICE_ATTR(onfi_model, S_IRUGO, mtd_nand_onfi_model_show, NULL); + static struct attribute *mtd_attrs[] = { &dev_attr_type.attr, &dev_attr_flags.attr, @@ -325,6 +362,10 @@ &dev_attr_bad_blocks.attr, &dev_attr_bbt_blocks.attr, &dev_attr_bitflip_threshold.attr, + &dev_attr_nand_type.attr, + &dev_attr_nand_manufacturer.attr, + &dev_attr_onfi_ecc_bits.attr, + &dev_attr_onfi_model.attr, NULL, }; ATTRIBUTE_GROUPS(mtd); diff -ruw linux-5.4.60/drivers/mtd/mtdpart.c linux-5.4.60-fbx/drivers/mtd/mtdpart.c --- linux-5.4.60/drivers/mtd/mtdpart.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/mtdpart.c 2021-03-04 13:20:58.954172274 +0100 @@ -350,6 +350,10 @@ slave->mtd.oobavail = parent->oobavail; slave->mtd.subpage_sft = parent->subpage_sft; slave->mtd.pairing = parent->pairing; + slave->mtd.nand_type = parent->nand_type; + slave->mtd.nand_manufacturer = parent->nand_manufacturer; + slave->mtd.onfi_ecc_bits = parent->onfi_ecc_bits; + slave->mtd.onfi_model = parent->onfi_model; slave->mtd.name = name; slave->mtd.owner = parent->owner; diff -ruw linux-5.4.60/drivers/mtd/nand/raw/Kconfig linux-5.4.60-fbx/drivers/mtd/nand/raw/Kconfig --- linux-5.4.60/drivers/mtd/nand/raw/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/nand/raw/Kconfig 2021-03-04 13:20:58.957505608 +0100 @@ -34,6 +34,14 @@ comment "Raw/parallel NAND flash controllers" +config MTD_FORCE_BAD_BLOCK_ERASE + bool "Force erase on bad blocks (useful for bootloader parts)" + default n + help + Enable this option only when you need to force an erase on + blocks being marked as "bad" by Linux (i.e: other ECC/bad block + marker layout). + config MTD_NAND_DENALI tristate @@ -53,6 +61,10 @@ Enable the driver for NAND flash on platforms using a Denali NAND controller as a DT device. +config MTD_NAND_DENALI_FBX + tristate "NAND Denali controller support" + depends on PCI + config MTD_NAND_AMS_DELTA tristate "Amstrad E3 NAND controller" depends on MACH_AMS_DELTA || COMPILE_TEST diff -ruw linux-5.4.60/drivers/mtd/nand/raw/Makefile linux-5.4.60-fbx/drivers/mtd/nand/raw/Makefile --- linux-5.4.60/drivers/mtd/nand/raw/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/nand/raw/Makefile 2021-03-04 13:20:58.957505608 +0100 @@ -10,6 +10,7 @@ obj-$(CONFIG_MTD_NAND_DENALI) += denali.o obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o +obj-$(CONFIG_MTD_NAND_DENALI_FBX) += denali_nand.o obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o obj-$(CONFIG_MTD_NAND_TANGO) += tango_nand.o diff -ruw linux-5.4.60/drivers/mtd/parsers/Kconfig linux-5.4.60-fbx/drivers/mtd/parsers/Kconfig --- linux-5.4.60/drivers/mtd/parsers/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/parsers/Kconfig 2021-03-04 13:20:58.967505609 +0100 @@ -67,6 +67,10 @@ flash memory node, as described in Documentation/devicetree/bindings/mtd/partition.txt. +config MTD_OF_PARTS_IGNORE_RO + bool "ignore read-only flag" + depends on MTD_OF_PARTS + config MTD_PARSER_IMAGETAG tristate "Parser for BCM963XX Image Tag format partitions" depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST @@ -160,3 +164,14 @@ 'FIS directory' images, enable this option. endif # MTD_REDBOOT_PARTS + +config MTD_FBX6HD_PARTS + tristate "Freebox V6 HD partitioning support" + help + Freebox V6 HD partitioning support + +config MTD_FBX6HD_PARTS_WRITE_ALL + bool "make all partitions writeable" + depends on MTD_FBX6HD_PARTS + help + Freebox V6 HD partitions support diff -ruw linux-5.4.60/drivers/mtd/parsers/Makefile linux-5.4.60-fbx/drivers/mtd/parsers/Makefile --- linux-5.4.60/drivers/mtd/parsers/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/parsers/Makefile 2021-03-04 13:20:58.967505609 +0100 @@ -9,3 +9,4 @@ obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o +obj-$(CONFIG_MTD_FBX6HD_PARTS) += fbx6hd-mtdparts.o diff -ruw linux-5.4.60/drivers/mtd/parsers/ofpart.c linux-5.4.60-fbx/drivers/mtd/parsers/ofpart.c --- linux-5.4.60/drivers/mtd/parsers/ofpart.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/parsers/ofpart.c 2021-03-04 13:20:58.967505609 +0100 @@ -111,8 +111,10 @@ partname = of_get_property(pp, "name", &len); parts[i].name = partname; +#ifndef CONFIG_MTD_OF_PARTS_IGNORE_RO if (of_get_property(pp, "read-only", &len)) parts[i].mask_flags |= MTD_WRITEABLE; +#endif if (of_get_property(pp, "lock", &len)) parts[i].mask_flags |= MTD_POWERUP_LOCK; diff -ruw linux-5.4.60/drivers/mtd/spi-nor/spi-nor.c linux-5.4.60-fbx/drivers/mtd/spi-nor/spi-nor.c --- linux-5.4.60/drivers/mtd/spi-nor/spi-nor.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/mtd/spi-nor/spi-nor.c 2021-03-04 13:20:58.970838942 +0100 @@ -178,6 +178,7 @@ struct flash_info { char *name; + uint32_t ext_id; /* * This array stores the ID bytes. @@ -196,7 +197,8 @@ u16 page_size; u16 addr_width; - u16 flags; + u32 flags; + #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */ #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */ #define SST_WRITE BIT(2) /* use SST byte programming */ @@ -234,6 +236,9 @@ #define USE_CLSR BIT(14) /* use CLSR command */ #define SPI_NOR_OCTAL_READ BIT(15) /* Flash supports Octal Read */ +#define ALT_PROBE BIT(16) /* only match during alt_probe */ +#define ALT_PROBE_ATMEL BIT(17) /* only match during alt_probe_atmel */ + /* Part specific fixup hooks. */ const struct spi_nor_fixups *fixups; }; @@ -2033,6 +2038,7 @@ /* Used when the "_ext_id" is two bytes at most */ #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ + .ext_id = (_ext_id), \ .id = { \ ((_jedec_id) >> 16) & 0xff, \ ((_jedec_id) >> 8) & 0xff, \ @@ -2047,6 +2053,7 @@ .flags = (_flags), #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ + .ext_id = (_ext_id), \ .id = { \ ((_jedec_id) >> 16) & 0xff, \ ((_jedec_id) >> 8) & 0xff, \ @@ -2503,6 +2510,22 @@ /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + + /* Used on Freebox Gateways ... */ + + /* Atmel */ + { "at25f512b", INFO(0x1f6500, 0x1f65, 32 * 1024, 2, + ALT_PROBE_ATMEL) }, + /* Macronix */ + { "mx25l512", INFO(0xc20500, 0xc205, 64 * 1024, 1, + ALT_PROBE | SECT_4K) }, + /* SST */ + { "sst25vf512a", INFO(0xbf4800, 0xbf48, 32 * 1024, 2, ALT_PROBE) }, + + /* EON */ + { "en25f05", INFO(0x1c0500, 0x1c05, 64 * 1024, 1, + ALT_PROBE | SECT_4K) }, + { }, }; @@ -2541,6 +2564,69 @@ return ERR_PTR(-ENODEV); } +static const struct flash_info *spi_nor_alt_read_id(struct spi_nor *nor) +{ + u8 data[2]; + u16 id; + int err, tmp; + const struct flash_info *info; + struct spi_mem_op op = + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID_ALT, 1), + SPI_MEM_OP_ADDR(3, 0, 1), + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(sizeof (data), data, 1)); + + BUG_ON(!nor->spimem); + + err = spi_mem_exec_op(nor->spimem, &op); + if (err < 0) { + dev_err(nor->dev, "error %d reading alt ID\n", err); + return ERR_PTR(err); + } + + id = (data[1] << 8) | data[0]; + + for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) { + info = &spi_nor_ids[tmp]; + if ((info->flags & ALT_PROBE) && (info->ext_id == id)) + return info; + } + + dev_err(nor->dev, "unrecognized ALT id %04x\n", id); + return ERR_PTR(-ENODEV); +} + +static const struct flash_info *spi_nor_atmel_id(struct spi_nor *nor) +{ + u8 data[2]; + u16 id; + int err, tmp; + const struct flash_info *info; + struct spi_mem_op op = + SPI_MEM_OP(SPI_MEM_OP_CMD(0x15, 1), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(sizeof (data), data, 1)); + + BUG_ON(!nor->spimem); + + err = spi_mem_exec_op(nor->spimem, &op); + if (err < 0) { + dev_err(nor->dev, "error %d reading atmel ID\n", err); + return ERR_PTR(err); + } + id = (data[1] << 8) | data[0]; + + for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) { + info = &spi_nor_ids[tmp]; + if ((info->flags & ALT_PROBE_ATMEL) && (info->ext_id == id)) + return info; + } + + dev_err(nor->dev, "unrecognized ATMEL id %04x\n", id); + return ERR_PTR(-ENODEV); +} + static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) { @@ -4746,6 +4832,19 @@ return NULL; } +static void sst_write_enable(struct spi_nor *nor) +{ + struct spi_mem_op op = + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_EWRSR, 1), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_NO_DATA); + write_enable(nor); + BUG_ON(!nor->spimem); + spi_mem_exec_op(nor->spimem, &op); + write_sr(nor, 0); +} + static int spi_nor_set_addr_width(struct spi_nor *nor) { if (nor->addr_width) { @@ -4803,6 +4902,12 @@ if (name && info->id_len) { const struct flash_info *jinfo; + jinfo = spi_nor_alt_read_id(nor); + if (IS_ERR(jinfo)) + /* try ATMEL */ + jinfo = spi_nor_atmel_id(nor); + if (IS_ERR(jinfo)) + /* try JEDEC */ jinfo = spi_nor_read_id(nor); if (IS_ERR(jinfo)) { return jinfo; @@ -4891,6 +4996,9 @@ /* Init flash parameters based on flash_info struct and SFDP */ spi_nor_init_params(nor); + if (info->ext_id == 0xbf48) + sst_write_enable(nor); + if (!mtd->name) mtd->name = dev_name(dev); mtd->priv = nor; diff -ruw linux-5.4.60/drivers/net/ethernet/broadcom/Kconfig linux-5.4.60-fbx/drivers/net/ethernet/broadcom/Kconfig --- linux-5.4.60/drivers/net/ethernet/broadcom/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ethernet/broadcom/Kconfig 2021-03-04 13:20:59.017505610 +0100 @@ -60,6 +60,45 @@ This driver supports the ethernet MACs in the Broadcom 63xx MIPS chipset family (BCM63XX). +config BCM63XX_ENET_RUNNER + tristate "Broadcom 63xx (63138) runner ethernet support" + select MII + select FIXED_PHY + select PHYLIB + select BCM7XXX_PHY + select BROADCOM_PHY + select SOC_BCM63XX_RDP + +config BCM63158_SF2 + tristate "Broadcom 63158 SF2 support" + select MII + select PHYLINK + select BCM7XXX_PHY + select BROADCOM_PHY + select NET_DSA + select NET_DSA_TAG_BRCM_FBX + +config BCM63158_SYSTEMPORT + tristate "Broadcom 63158 SYSTEMPORT internal MAC support" + depends on OF + select MII + select PHYLINK + +config BCM63158_ENET_RUNNER + tristate "Broadcom 63158 runner ethernet support" + select MII + select PHYLINK + select SOC_BCM63XX_XRDP + +config BCM63158_ENET_RUNNER_FF + bool "fastpath support for freebox boards" + depends on BCM63158_ENET_RUNNER + select IP_FFN + select IPV6_FFN + select IPV6_SIT_6RD + select BRIDGE + select FBXBRIDGE + config BCMGENET tristate "Broadcom GENET internal MAC support" depends on HAS_IOMEM diff -ruw linux-5.4.60/drivers/net/ethernet/broadcom/Makefile linux-5.4.60-fbx/drivers/net/ethernet/broadcom/Makefile --- linux-5.4.60/drivers/net/ethernet/broadcom/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ethernet/broadcom/Makefile 2021-03-04 13:20:59.017505610 +0100 @@ -16,3 +16,5 @@ obj-$(CONFIG_BGMAC_PLATFORM) += bgmac-platform.o obj-$(CONFIG_SYSTEMPORT) += bcmsysport.o obj-$(CONFIG_BNXT) += bnxt/ +obj-$(CONFIG_BCM63XX_ENET_RUNNER) += bcm63xx_enet_runner/ +obj-y += bcm63158/ diff -ruw linux-5.4.60/drivers/net/ethernet/Kconfig linux-5.4.60-fbx/drivers/net/ethernet/Kconfig --- linux-5.4.60/drivers/net/ethernet/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ethernet/Kconfig 2021-03-04 13:20:58.997505609 +0100 @@ -180,6 +180,7 @@ source "drivers/net/ethernet/tundra/Kconfig" source "drivers/net/ethernet/via/Kconfig" source "drivers/net/ethernet/wiznet/Kconfig" +source "drivers/net/ethernet/wintegra/Kconfig" source "drivers/net/ethernet/xilinx/Kconfig" source "drivers/net/ethernet/xircom/Kconfig" diff -ruw linux-5.4.60/drivers/net/ethernet/Makefile linux-5.4.60-fbx/drivers/net/ethernet/Makefile --- linux-5.4.60/drivers/net/ethernet/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ethernet/Makefile 2021-03-04 13:20:58.997505609 +0100 @@ -92,6 +92,7 @@ obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/ obj-$(CONFIG_NET_VENDOR_VIA) += via/ obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/ +obj-$(CONFIG_NET_VENDOR_WINTEGRA) += wintegra/ obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/ obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/ obj-$(CONFIG_NET_VENDOR_SYNOPSYS) += synopsys/ diff -ruw linux-5.4.60/drivers/net/ethernet/marvell/Kconfig linux-5.4.60-fbx/drivers/net/ethernet/marvell/Kconfig --- linux-5.4.60/drivers/net/ethernet/marvell/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ethernet/marvell/Kconfig 2021-03-04 13:20:59.164172284 +0100 @@ -23,6 +23,7 @@ depends on INET select PHYLIB select MVMDIO + select MII ---help--- This driver supports the gigabit ethernet MACs in the Marvell Discovery PPC/MIPS chipset family (MV643XX) and @@ -31,6 +32,15 @@ Some boards that use the Discovery chipset are the Momenco Ocelot C and Jaguar ATX and Pegasos II. +config MV643XX_ETH_FBX_FF + bool "fastpath support for freebox boards" + depends on MV643XX_ETH + select IP_FFN + select IPV6_FFN + select IPV6_SIT_6RD + select BRIDGE + select FBXBRIDGE + config MVMDIO tristate "Marvell MDIO interface support" depends on HAS_IOMEM @@ -86,10 +96,20 @@ depends on ARCH_MVEBU || COMPILE_TEST select MVMDIO select PHYLINK + select MII ---help--- This driver supports the network interface units in the Marvell ARMADA 375, 7K and 8K SoCs. +config MVPP2_FBX_FF + bool "fastpath support for freebox boards" + depends on MVPP2 + select IP_FFN + select IPV6_FFN + select IPV6_SIT_6RD + select BRIDGE + select FBXBRIDGE + config PXA168_ETH tristate "Marvell pxa168 ethernet support" depends on HAS_IOMEM diff -ruw linux-5.4.60/drivers/net/ethernet/marvell/mvpp2/mvpp2.h linux-5.4.60-fbx/drivers/net/ethernet/marvell/mvpp2/mvpp2.h --- linux-5.4.60/drivers/net/ethernet/marvell/mvpp2/mvpp2.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ethernet/marvell/mvpp2/mvpp2.h 2021-03-04 13:20:59.164172284 +0100 @@ -264,7 +264,13 @@ #define MVPP2_ISR_RX_TX_CAUSE_REG(port) (0x5480 + 4 * (port)) #define MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK(version) \ ((version) == MVPP21 ? 0xffff : 0xff) + +#ifdef CONFIG_MVPP2_FBX_FF +#define MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK 0x7f0000 +#else #define MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK 0xff0000 +#endif + #define MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_OFFSET 16 #define MVPP2_CAUSE_RX_FIFO_OVERRUN_MASK BIT(24) #define MVPP2_CAUSE_FCS_ERR_MASK BIT(25) @@ -349,6 +355,7 @@ #define MVPP2_RX_PKTS_FULL_QUEUE_DROP_CTR 0x7220 #define MVPP2_RX_PKTS_EARLY_DROP_CTR 0x7224 #define MVPP2_RX_PKTS_BM_DROP_CTR 0x7228 +#define MVPP2_BM_DROP_CTR(pool) (0x7300 + (pool * 4)) #define MVPP2_CLS_DEC_TBL_HIT_CTR 0x7700 #define MVPP2_CLS_FLOW_TBL_HIT_CTR 0x7704 @@ -376,6 +383,7 @@ #define MVPP2_TXQ_TOKEN_SIZE_MAX 0x7fffffff #define MVPP2_TXQ_SCHED_TOKEN_CNTR_REG(q) (0x8080 + ((q) << 2)) #define MVPP2_TXQ_TOKEN_CNTR_MAX 0xffffffff +#define MVPP2_TXQ_SCHED_BCOUNT_CFG_REG(q) (0x80A0 + ((q) << 2)) /* TX general registers */ #define MVPP2_TX_SNOOP_REG 0x8800 @@ -432,6 +440,7 @@ #define MVPP2_GMAC_STATUS0_RX_PAUSE BIT(4) #define MVPP2_GMAC_STATUS0_TX_PAUSE BIT(5) #define MVPP2_GMAC_STATUS0_AN_COMPLETE BIT(11) +#define MVPP2_GMAC_STATUS0_SYNC_OK BIT(14) #define MVPP2_GMAC_PORT_FIFO_CFG_1_REG 0x1c #define MVPP2_GMAC_TX_FIFO_MIN_TH_OFFS 6 #define MVPP2_GMAC_TX_FIFO_MIN_TH_ALL_MASK 0x1fc0 @@ -506,6 +515,8 @@ #define MAC_CLK_RESET_MAC BIT(2) #define MVPP22_MPCS_CLK_RESET_DIV_RATIO(n) ((n) << 4) #define MVPP22_MPCS_CLK_RESET_DIV_SET BIT(11) +#define MVPP22_MPCS_GEARBOX_STATUS 0xd0 +#define MVPP22_MPCS_GEARBOX_STATUS_LANELOCK BIT(0) /* XPCS registers. PPv2.2 only */ #define MVPP22_XPCS_BASE(port) (0x7400 + (port) * 0x1000) @@ -584,11 +595,11 @@ /* Max number of Rx descriptors */ #define MVPP2_MAX_RXD_MAX 1024 -#define MVPP2_MAX_RXD_DFLT 128 +#define MVPP2_MAX_RXD_DFLT 1024 /* Max number of Tx descriptors */ #define MVPP2_MAX_TXD_MAX 2048 -#define MVPP2_MAX_TXD_DFLT 1024 +#define MVPP2_MAX_TXD_DFLT 2048 /* Amount of Tx descriptors that can be reserved at once by CPU */ #define MVPP2_CPU_DESC_CHUNK 64 @@ -753,6 +764,10 @@ /* Shared Packet Processor resources */ struct mvpp2 { +#ifdef CONFIG_MVPP2_FBX_FF + int id; +#endif + /* Shared registers' base addresses */ void __iomem *lms_base; void __iomem *iface_base; @@ -848,6 +863,8 @@ u32 pending_cause_rx; struct mvpp2_port *port; struct cpumask *mask; + char irq_name[32]; + char request_name[64]; }; /* Internal represention of a Flow Steering rule */ @@ -881,15 +898,50 @@ struct ethtool_rxnfc rxnfc; }; +/* + * ethtool private flags layout (stopgap measure until phylink is + * operational on mvpp2). + */ + +/* + * set to 1 only, cannot be cleared, enable 10G/1G media change logic. + */ +#define FBX_101G_SWITCH_EN_BIT 0 + +/* + * *_EN_BITS are write only, and must be only set one at a + * time. writing one to either of those effectively changes the mode + * of the interface to 1G (1000Base-X) or 10G (10000Base-KR). + * + * they are always 0 on read. + */ +#define FBX_10G_EN_BIT 1 +#define FBX_1G_EN_BIT 2 +#define FBX_ALL_EN_MASK ((1 << FBX_10G_EN_BIT) | (1 << FBX_1G_EN_BIT)) + +/* + * *_ST_BITS reflect the current state of 10G/1G media selection. + */ +#define FBX_10G_ST_BIT 3 +#define FBX_1G_ST_BIT 4 +#define FBX_SYNC_OK_BIT 5 +#define FBX_CLEAR_MIB_BIT 6 +#define FBX_EN_10G_LINKDOWN_WA 7 + struct mvpp2_port { u8 id; + unsigned int index; /* Index of the port from the "group of ports" complex point * of view. This is specific to PPv2.2. */ int gop_id; + bool pending_10g_reset; + bool linkdown_10g_wa_enable; + unsigned long last_link_int_jiffies; int link_irq; + char link_irq_request_name[64]; struct mvpp2 *priv; @@ -959,6 +1011,17 @@ * them from 0 */ int rss_ctx[MVPP22_N_RSS_TABLES]; + + /* MII bus for MII bus access ioctls from userspace */ + struct mii_bus *mii_bus; + + /* FBX ratures */ + bool en_fbx_10g1g_switch; + +#ifdef CONFIG_MVPP2_FBX_FF + struct mvpp2_tx_queue *ff_txq; + struct notifier_block ff_notifier; +#endif }; /* The mvpp2_tx_desc and mvpp2_rx_desc structures describe the @@ -1035,7 +1098,7 @@ /* HW RX descriptor for PPv2.2 */ struct mvpp22_rx_desc { __le32 status; - __le16 reserved1; + __le16 parser_info; __le16 data_size; __le32 reserved2; __le32 reserved3; @@ -1064,6 +1127,13 @@ /* Transmitted SKB */ struct sk_buff *skb; +#ifdef CONFIG_MVPP2_FBX_FF + bool is_rx_buf; + int pool; + phys_addr_t bm_dma; + phys_addr_t bm_phys; +#endif + /* Physical address of transmitted buffer */ dma_addr_t dma; @@ -1083,6 +1153,10 @@ */ int count; +#ifdef CONFIG_MVPP2_FBX_FF + int release_pending; +#endif + int wake_threshold; int stop_threshold; diff -ruw linux-5.4.60/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c linux-5.4.60-fbx/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c --- linux-5.4.60/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c 2021-03-04 13:20:59.164172284 +0100 @@ -37,10 +37,26 @@ #include #include +#ifdef CONFIG_MVPP2_FBX_FF +#include +#include +#include +#include +#include +#include + +#include "../../../net/bridge/br_private.h" +#include "../../../net/fbxbridge/fbxbr_private.h" +#endif + #include "mvpp2.h" #include "mvpp2_prs.h" #include "mvpp2_cls.h" +#ifdef CONFIG_MVPP2_FBX_FF +static struct mvpp2_port *ports_by_idx[4]; +#endif + enum mvpp2_bm_pool_log_num { MVPP2_BM_SHORT, MVPP2_BM_LONG, @@ -65,11 +81,24 @@ #define MVPP2_QDIST_SINGLE_MODE 0 #define MVPP2_QDIST_MULTI_MODE 1 +#ifdef CONFIG_MVPP2_FBX_FF +static int queue_mode = MVPP2_QDIST_SINGLE_MODE; +#else static int queue_mode = MVPP2_QDIST_MULTI_MODE; +#endif module_param(queue_mode, int, 0444); MODULE_PARM_DESC(queue_mode, "Set queue_mode (single=0, multi=1)"); +#ifdef CONFIG_MVPP2_FBX_FF +#define MVPP2_FF_TXQ_ID 7 +#define MVPP2_USABLE_TX_QUEUES 7 +#else +#define MVPP2_USABLE_TX_QUEUES 8 +#endif + +#define MVPP2_TX_FIXED_PRIO_QUEUES (1 << (MVPP2_USABLE_TX_QUEUES - 1)) + /* Utility/helper methods */ void mvpp2_write(struct mvpp2 *priv, u32 offset, u32 data) @@ -283,6 +312,9 @@ { struct mvpp2_txq_pcpu_buf *tx_buf = txq_pcpu->buffs + txq_pcpu->txq_put_index; +#ifdef CONFIG_MVPP2_FBX_FF + tx_buf->is_rx_buf = false; +#endif tx_buf->skb = skb; tx_buf->size = mvpp2_txdesc_size_get(port, tx_desc); tx_buf->dma = mvpp2_txdesc_dma_addr_get(port, tx_desc) + @@ -324,6 +356,2198 @@ return (MVPP2_MAX_TCONT + port) * MVPP2_MAX_TXQ + txq; } + +#ifdef CONFIG_MVPP2_FBX_FF + +static u16 mvpp2_rxdesc_parser_info_get(struct mvpp2_port *port, + struct mvpp2_rx_desc *rx_desc) +{ + if (port->priv->hw_version == MVPP21) + return 0; + else + return rx_desc->pp22.parser_info; +} + +static int mvpp2_aggr_desc_num_check(struct mvpp2_port *port, + struct mvpp2_tx_queue *aggr_txq, int num); + +static void mvpp2_aggr_txq_pend_desc_add(struct mvpp2_port *port, int pending); + +static inline void mvpp2_bm_pool_put(struct mvpp2_port *port, int pool, + dma_addr_t buf_dma_addr, + phys_addr_t buf_phys_addr); + +static int mvpp2_rx_refill(struct mvpp2_port *port, + struct mvpp2_bm_pool *bm_pool, int pool); + +static int mvpp2_txq_reserved_desc_num_proc(struct mvpp2_port *port, + struct mvpp2_tx_queue *txq, + struct mvpp2_txq_pcpu *txq_pcpu, + int num); + +static struct mvpp2_tx_desc * +mvpp2_txq_next_desc_get(struct mvpp2_tx_queue *txq); + +static inline int mvpp2_txq_sent_desc_proc(struct mvpp2_port *port, + struct mvpp2_tx_queue *txq); + +static void mvpp2_txq_inc_put_ff(struct mvpp2_port *port, + dma_addr_t buf_dma, + phys_addr_t buf_phys, + int pool, + struct mvpp2_txq_pcpu *txq_pcpu, + struct mvpp2_tx_desc *tx_desc) +{ + struct mvpp2_txq_pcpu_buf *tx_buf = + txq_pcpu->buffs + txq_pcpu->txq_put_index; + + tx_buf->is_rx_buf = true; + tx_buf->pool = pool; + tx_buf->bm_dma = buf_dma; + tx_buf->bm_phys = buf_phys; + + txq_pcpu->txq_put_index++; + if (txq_pcpu->txq_put_index == txq_pcpu->size) + txq_pcpu->txq_put_index = 0; +} + +static bool ff_enabled; + +static DEFINE_SPINLOCK(ff_lock); + +static inline bool pkt_is_ipv4(u32 rx_status) +{ + u32 val; + + val = (rx_status >> 28) & 0x7; + if (val == 1 || val == 2 || val == 3) + return true; + + return false; +} + +static inline bool pkt_is_ipv6(u32 rx_status) +{ + u32 val; + + val = (rx_status >> 28) & 0x7; + if (val == 4 || val == 5) + return true; + + return false; +} + +static inline bool pkt_is_ipvx(u32 rx_status) +{ + return pkt_is_ipv4(rx_status) || pkt_is_ipv6(rx_status); +} + +static inline bool pkt_is_vlan(u16 parser_info) +{ + if (parser_info & (0x3 << 14)) + return true; + return false; +} + + +#define FF_MAX_WAN_DEV 4 + +#define FF_DEV_SWLAN_ID 0 +#define FF_DEV_SWLAN_PORT_INDEX 1 + +#define FF_DEV_WAN_ID 0 +#define FF_DEV_WAN_PORT_INDEX 0 + +#define FF_DEV_SFPLAN_ID 1 +#define FF_DEV_SFPLAN_PORT_INDEX 0 + +static struct { + struct net_device *wan_devs[FF_MAX_WAN_DEV]; + int wan_vlan_ids[FF_MAX_WAN_DEV]; + int wan_active_dev; + struct net_device *lan_dev_sfp; + struct net_device *lan_dev_sw; + + u32 jiffies; + + struct net_device *tun_dev; + u8 tun_ready:1; + u16 tun_mtu; + + /* sit parameters */ + union ff_tun_params { + struct { + u32 src; + u32 s6rd_prefix; + u32 s6rd_pmask; + u8 s6rd_plen; + } sit; + + struct { + /* map parameters */ + u32 ipv4_prefix; + u32 ipv4_pmask; + u8 ipv4_plen; + u8 ipv6_plen; + struct in6_addr src; + struct in6_addr br; + + u64 ipv6_prefix; + u32 ea_addr_mask; + u16 ea_port_mask; + u8 psid_len; + u8 ea_lshift; + } map; + } u; + + char tun_dev_name[IFNAMSIZ]; + char wan_dev_name[IFNAMSIZ]; +} ff; + +static LIST_HEAD(ff_devs); + +struct ff_dev { + const char *desc; + int id; + int port_index; + bool bridge_member; + bool is_wan; + unsigned int vlan; + struct net_device **pvirt_dev; + int *pvlan_id; + + char bridge_hwaddr[6]; + + bool active; + struct net_bridge_port *br_port; + struct fbxbr_port *fbxbr_port; + bool dev_up; + struct list_head next; +}; + +static struct ff_dev swlan; +static struct ff_dev sfplan; +static struct ff_dev wan; + +static inline bool is_bridge_dev(struct net_device *dev) +{ + return dev->priv_flags & IFF_EBRIDGE; +} + +static inline bool is_fbxbridge_port(struct net_device *dev) +{ + return dev->priv_flags & IFF_FBXBRIDGE_PORT; +} + +static u32 gen_netmask(u8 len) +{ + return htonl(~((1 << (32 - len)) - 1)); +} + +static void __ff_tun_set_params(bool ready, + unsigned int mtu, + const union ff_tun_params *tp) +{ + if (!ready) { + if (!ff.tun_ready) + return; + + printk(KERN_DEBUG "ff: tunnel now NOT ready\n"); + ff.tun_ready = 0; + return; + } + + if (ff.tun_ready) { + if (ff.tun_mtu == mtu && !memcmp(tp, &ff.u, sizeof (*tp))) + return; + } + + ff.tun_mtu = mtu; + memcpy(&ff.u, tp, sizeof (*tp)); + + if (!ff.tun_ready) + printk(KERN_DEBUG "ff: tunnel now ready\n"); + else + printk(KERN_DEBUG "ff: tunnel params updated\n"); + + ff.tun_ready = true; +} + +static void __ff_tun_read_params(void) +{ + union ff_tun_params tp; + struct net_device *wan_dev; + + if (!ff.tun_dev) + return; + + if (ff.wan_active_dev == -1) { + __ff_tun_set_params(false, 0, NULL); + return; + } + + wan_dev = ff.wan_devs[ff.wan_active_dev]; + memset(&tp, 0, sizeof (tp)); + + if (ff.tun_dev->type == ARPHRD_SIT) { + const struct ip_tunnel *tun = netdev_priv(ff.tun_dev); + const struct ip_tunnel_6rd_parm *ip6rd = &tun->ip6rd; + + if (!ip6rd->prefixlen || ip6rd->prefixlen > 32) { + printk(KERN_DEBUG "ff: unsupported 6rd plen\n"); + __ff_tun_set_params(false, 0, NULL); + return; + } + + if (ff.tun_dev->mtu + sizeof (struct iphdr) > + wan_dev->mtu) { + printk(KERN_DEBUG "ff: WAN mtu too " + "small for tunnel (%u => %u)\n", + ff.tun_dev->mtu, wan_dev->mtu); + __ff_tun_set_params(false, 0, NULL); + return; + } + + tp.sit.src = tun->parms.iph.saddr; + tp.sit.s6rd_prefix = ip6rd->prefix.s6_addr32[0]; + tp.sit.s6rd_pmask = gen_netmask(ip6rd->prefixlen); + tp.sit.s6rd_plen = ip6rd->prefixlen; + __ff_tun_set_params(true, ff.tun_dev->mtu, &tp); + return; + } + + if (ff.tun_dev->type == ARPHRD_TUNNEL6) { + const struct ip6_tnl *t = netdev_priv(ff.tun_dev); + const struct __ip6_tnl_parm *prm = &t->parms; + const struct __ip6_tnl_fmr *fmr; + + if (ff.tun_dev->mtu + sizeof (struct ipv6hdr) > + wan_dev->mtu) { + printk(KERN_DEBUG "ff: WAN mtu too " + "small for tunnel (%u => %u)\n", + ff.tun_dev->mtu, wan_dev->mtu); + __ff_tun_set_params(false, 0, NULL); + return; + } + + tp.map.src = prm->laddr; + tp.map.br = prm->raddr; + + fmr = prm->fmrs; + if (!fmr) { + tp.map.ipv4_prefix = 0; + __ff_tun_set_params(true, ff.tun_dev->mtu, &tp); + return; + } + + if (fmr->ip6_prefix_len < 32 || + (fmr->ip6_prefix_len + 32 - fmr->ip4_prefix_len > 64)) { + printk(KERN_DEBUG "ff: unsupp MAP-E: eabits " + "span 32 bits\n"); + __ff_tun_set_params(false, 0, NULL); + return; + } + + if (fmr->offset) { + printk(KERN_DEBUG "ff: unsupp MAP-E: non zero " + "PSID offset\n"); + __ff_tun_set_params(false, 0, NULL); + return; + } + + tp.map.ipv4_prefix = fmr->ip4_prefix.s_addr; + tp.map.ipv4_pmask = gen_netmask(fmr->ip4_prefix_len); + tp.map.ipv4_plen = fmr->ip4_prefix_len; + tp.map.ipv6_plen = fmr->ip6_prefix_len; + memcpy(&tp.map.ipv6_prefix, &fmr->ip6_prefix, 8); + + tp.map.ea_addr_mask = ~gen_netmask(fmr->ip4_prefix_len); + if (fmr->ea_len <= 32 - fmr->ip4_prefix_len) { + /* v4 prefix or full IP */ + u32 addr_bits; + + addr_bits = fmr->ip4_prefix_len + fmr->ea_len; + if (addr_bits != 32) + tp.map.ea_addr_mask &= gen_netmask(addr_bits); + tp.map.psid_len = 0; + } else { + u8 psid_len; + + psid_len = fmr->ea_len - (32 - fmr->ip4_prefix_len); + tp.map.psid_len = psid_len; + tp.map.ea_port_mask = gen_netmask(psid_len); + } + + tp.map.ea_lshift = 32 - (fmr->ip6_prefix_len - 32) - + fmr->ea_len; + + __ff_tun_set_params(true, ff.tun_dev->mtu, &tp); + return; + } +} + +static void __ff_tun_capture(void) +{ + struct net_device *dev; + + if (ff.tun_dev) { + printk(KERN_ERR "ff: error: tun already registered\n"); + return; + } + + dev = dev_get_by_name(&init_net, ff.tun_dev_name); + if (!dev) { + return; + } + + if (dev->type != ARPHRD_SIT && dev->type != ARPHRD_TUNNEL6) { + return; + } + + if (!(dev->flags & IFF_UP)) { + dev_put(ff.tun_dev); + return; + } + + ff.tun_dev = dev; + __ff_tun_read_params(); + printk(KERN_INFO "ff: tun dev grabbed\n"); +} + +static void __ff_tun_release(void) +{ + int was_on = 0; + + if (ff.tun_dev) { + dev_put(ff.tun_dev); + ff.tun_dev = NULL; + was_on = 1; + } + if (was_on) + printk(KERN_INFO "ff: tun dev released\n"); +} + +static void __ff_wan_find_active(void) +{ + int i, matching; + + matching = -1; + for (i = 0; i < ARRAY_SIZE(ff.wan_devs); i++) { + if (ff.wan_devs[i] && + !strcmp(ff.wan_devs[i]->name, ff.wan_dev_name)) { + matching = i; + break; + } + } + + if (ff.wan_active_dev != -1) { + if (matching == -1) { + printk("ff: no more selected wan\n"); + ff.wan_active_dev = -1; + __ff_tun_read_params(); + } else if (matching != ff.wan_active_dev) { + printk("ff: selected wan changed\n"); + ff.wan_active_dev = matching; + __ff_tun_read_params(); + } + + } else if (matching != -1) { + printk("ff: selected wan now %s\n", ff.wan_dev_name); + ff.wan_active_dev = matching; + __ff_tun_read_params(); + } +} + +static int ff_device_event(struct notifier_block *this, + unsigned long event, void *ptr) +{ + struct net_device *dev = netdev_notifier_info_to_dev(ptr); + struct mvpp2_port *port; + struct ff_dev *ff_dev; + + if (!net_eq(dev_net(dev), &init_net)) + return 0; + + if (!strcmp(dev->name, ff.tun_dev_name)) { + spin_lock_bh(&ff_lock); + + switch (event) { + case NETDEV_UP: + if (!ff.tun_dev) + __ff_tun_capture(); + break; + + case NETDEV_CHANGE: + case NETDEV_CHANGEMTU: + if (ff.tun_dev == dev) + __ff_tun_read_params(); + break; + + case NETDEV_GOING_DOWN: + case NETDEV_DOWN: + case NETDEV_UNREGISTER: + if (ff.tun_dev == dev) + __ff_tun_release(); + break; + } + + spin_unlock_bh(&ff_lock); + return 0; + } + + port = container_of(this, typeof(*port), ff_notifier); + list_for_each_entry(ff_dev, &ff_devs, next) { + if (port->priv->id != ff_dev->id) + continue; + if (port->index != ff_dev->port_index) + continue; + + if (ff_dev->vlan) { + if (!is_vlan_dev(dev)) + continue; + + switch (event) { + case NETDEV_UP: + if (vlan_dev_upper_dev(dev) != port->dev || + vlan_dev_vlan_id(dev) != ff_dev->vlan) + continue; + + if (ff_dev->active) + continue; + + dev_hold(dev); + + spin_lock_bh(&ff_lock); + *(ff_dev->pvirt_dev) = dev; + if (ff_dev->pvlan_id) + *ff_dev->pvlan_id = ff_dev->vlan; + + if (ff_dev->is_wan) + __ff_wan_find_active(); + + spin_unlock_bh(&ff_lock); + + ff_dev->active = true; + printk(KERN_INFO "ff: ff_dev %s: active " + "for %s\n", ff_dev->desc, + dev->name); + break; + + case NETDEV_GOING_DOWN: + case NETDEV_DOWN: + case NETDEV_UNREGISTER: + if (!ff_dev->active) + continue; + + if (vlan_dev_upper_dev(dev) != port->dev || + vlan_dev_vlan_id(dev) != ff_dev->vlan) + continue; + + spin_lock_bh(&ff_lock); + *(ff_dev->pvirt_dev) = NULL; + + if (ff_dev->is_wan) + __ff_wan_find_active(); + + spin_unlock_bh(&ff_lock); + dev_put(dev); + ff_dev->active = false; + + printk(KERN_INFO "ff: ff_dev %s: now " + "inactive\n", ff_dev->desc); + break; + + default: + break; + } + } + + if (ff_dev->bridge_member) { + struct net_bridge *br; + struct fbxbr *fbxbr; + bool ok; + + switch (event) { + case NETDEV_UP: + if (dev == port->dev) + ff_dev->dev_up = true; + break; + + case NETDEV_GOING_DOWN: + case NETDEV_DOWN: + case NETDEV_UNREGISTER: + if (dev == port->dev) + ff_dev->dev_up = false; + break; + + case NETDEV_CHANGEUPPER: + if (dev == port->dev) { + rcu_read_lock(); + if ((dev->priv_flags & + IFF_BRIDGE_PORT) && + netdev_master_upper_dev_get(dev)) + ff_dev->br_port = br_port_get_rcu(dev); + else + ff_dev->br_port = NULL; + + if ((dev->priv_flags & + IFF_FBXBRIDGE_PORT) && + netdev_master_upper_dev_get(dev)) + ff_dev->fbxbr_port = fbxbr_port_get_rcu(dev); + else + ff_dev->fbxbr_port = NULL; + rcu_read_unlock(); + } + break; + + default: + break; + } + + ok = false; + br = NULL; + fbxbr = NULL; + if (ff_dev->dev_up && ff_dev->br_port) { + br = ff_dev->br_port->br; + if (br->dev->flags & IFF_UP) + ok = true; + } + + if (ff_dev->dev_up && ff_dev->fbxbr_port) { + fbxbr = ff_dev->fbxbr_port->br; + if (fbxbr->dev->flags & IFF_UP) + ok = true; + } + + if (!(ok ^ ff_dev->active)) + continue; + + if (ok) { + struct net_device *true_dev; + + if (br) { + true_dev = br->dev; + } else { + true_dev = port->dev; + } + + dev_hold(true_dev); + spin_lock_bh(&ff_lock); + *(ff_dev->pvirt_dev) = true_dev; + spin_unlock_bh(&ff_lock); + + if (br) + memcpy(ff_dev->bridge_hwaddr, + br->dev->dev_addr, 6); + ff_dev->active = true; + + printk(KERN_INFO "ff: ff_dev %s: active " + "for %s\n", ff_dev->desc, + true_dev->name); + + + } else { + dev = *(ff_dev->pvirt_dev); + spin_lock_bh(&ff_lock); + *(ff_dev->pvirt_dev) = NULL; + spin_unlock_bh(&ff_lock); + dev_put(dev); + ff_dev->active = false; + memset(ff_dev->bridge_hwaddr, 0, 6); + printk(KERN_INFO "ff: ff_dev %s: " + "now inactive\n", ff_dev->desc); + } + } + } + + return 0; +} + +enum ff_xmit_mode { + FF_XMIT_IPV4, + FF_XMIT_IPV6, + FF_XMIT_IPV6_IN_IPV4, + FF_XMIT_IPV4_IN_IPV6, +}; + +static void mvpp2_frag_free(const struct mvpp2_bm_pool *pool, void *data); +static void mvpp2_bm_bufs_get_addrs(struct device *dev, struct mvpp2 *priv, + struct mvpp2_bm_pool *bm_pool, + dma_addr_t *dma_addr, + phys_addr_t *phys_addr); + +/* + * + */ +static bool ff_force_reclaim(unsigned int thread, + struct mvpp2_port *port, + struct mvpp2_bm_pool *bm_pool, + unsigned int count) +{ + struct mvpp2_tx_queue *txq; + struct mvpp2_txq_pcpu *txq_pcpu; + struct device *device; + bool done; + + txq = port->ff_txq; + txq_pcpu = per_cpu_ptr(txq->pcpu, thread); + + txq_pcpu->release_pending += mvpp2_txq_sent_desc_proc(port, txq); + device = port->dev->dev.parent; + + done = false; + while (txq_pcpu->count > count && txq_pcpu->release_pending) { + struct mvpp2_txq_pcpu_buf *tx_buf; + void *data; + + tx_buf = txq_pcpu->buffs + txq_pcpu->txq_get_index; + if (WARN_ON(!tx_buf->is_rx_buf)) + continue; + + dma_unmap_single(device, + tx_buf->bm_dma, + MVPP2_RX_BUF_SIZE(bm_pool->pkt_size), + DMA_FROM_DEVICE); + + data = (void *)phys_to_virt(tx_buf->bm_dma); + mvpp2_frag_free(bm_pool, data); + txq_pcpu->release_pending--; + txq_pcpu->count--; + mvpp2_txq_inc_get(txq_pcpu); + done = true; + } + return done; +} + +/* + * + */ +static bool ff_can_send(unsigned int thread, + struct mvpp2_port *port, + struct mvpp2_bm_pool *bm_pool) +{ + struct mvpp2_tx_queue *txq; + struct mvpp2_txq_pcpu *txq_pcpu; + + txq = port->ff_txq; + txq_pcpu = per_cpu_ptr(txq->pcpu, thread); + + /* make sure tx queue is not full */ + if (txq_pcpu->count == txq_pcpu->size) { + txq_pcpu->release_pending += + mvpp2_txq_sent_desc_proc(port, txq); + if (!txq_pcpu->release_pending) { + /* if (net_ratelimit()) */ + /* printk("ff: %s: txq_pcpu is full (%u)\n", */ + /* port->dev->name, */ + /* txq_pcpu->count); */ + return false; + } + } + + if (txq_pcpu->count < (txq_pcpu->size / 2)) + return true; + + ff_force_reclaim(thread, port, bm_pool, txq_pcpu->size / 2); + return true; +} + +/* + * + */ +static bool ff_ensure_tx_desc(unsigned int thread, + struct mvpp2_port *port, + struct mvpp2_bm_pool *bm_pool) +{ + struct mvpp2_tx_queue *txq, *aggr_txq; + struct mvpp2_txq_pcpu *txq_pcpu; + + txq = port->ff_txq; + txq_pcpu = per_cpu_ptr(txq->pcpu, thread); + + /* make sure there is space in the aggregated tx queue */ + aggr_txq = &port->priv->aggr_txqs[thread]; + if (mvpp2_aggr_desc_num_check(port, aggr_txq, 1)) { + if (net_ratelimit()) + printk("ff: %s: failed to get 1 desc in aggr tx queue\n", + port->dev->name); + return false; + } + + /* make sure we have space reserved in the ff txq */ + if (!mvpp2_txq_reserved_desc_num_proc(port, txq, txq_pcpu, 1)) + return true; + + ff_force_reclaim(thread, port, bm_pool, txq_pcpu->size / 2); + + if (!mvpp2_txq_reserved_desc_num_proc(port, txq, txq_pcpu, 1)) + return true; + + return false; +} + +/* + * + */ +static void ff_send(unsigned int thread, + struct mvpp2_port *port, + dma_addr_t dma_buf_addr, + phys_addr_t dma_buf_phys, + unsigned int dma_buf_offset, + int dma_buf_pool, + unsigned int send_len, + bool is_ipv4, + bool is_tcp_or_udp, + bool is_tcp, + bool is_vlan) +{ + struct mvpp2_tx_queue *txq, *aggr_txq; + struct mvpp2_txq_pcpu *txq_pcpu; + struct mvpp2_tx_desc *tx_desc; + u32 tx_cmd; + + aggr_txq = &port->priv->aggr_txqs[thread]; + txq = port->ff_txq; + txq_pcpu = per_cpu_ptr(txq->pcpu, thread); + + /* Get a descriptor for packet */ + tx_desc = mvpp2_txq_next_desc_get(aggr_txq); + memset(tx_desc, 0, sizeof (*tx_desc)); + mvpp2_txdesc_txq_set(port, tx_desc, txq->id); + mvpp2_txdesc_size_set(port, tx_desc, send_len); + mvpp2_txdesc_dma_addr_set(port, tx_desc, + dma_buf_addr + dma_buf_offset); + + if (is_vlan) + tx_cmd = (VLAN_ETH_HLEN << MVPP2_TXD_L3_OFF_SHIFT); + else + tx_cmd = (ETH_HLEN << MVPP2_TXD_L3_OFF_SHIFT); + + if (is_ipv4) { + /* 20 is sizeof (ipv4) */ + tx_cmd |= ((20 >> 2) << MVPP2_TXD_IP_HLEN_SHIFT); + } else { + /* 40 is sizeof (ip6hdr) */ + tx_cmd |= ((40 >> 2) << MVPP2_TXD_IP_HLEN_SHIFT); + tx_cmd |= MVPP2_TXD_IP_CSUM_DISABLE; + tx_cmd |= MVPP2_TXD_L3_IP6; + } + + if (is_tcp_or_udp) { + if (!is_tcp) + tx_cmd |= MVPP2_TXD_L4_UDP; + } else { + tx_cmd |= MVPP2_TXD_L4_CSUM_NOT; + } + + /* First and Last descriptor */ + tx_cmd |= MVPP2_TXD_F_DESC | MVPP2_TXD_L_DESC; + mvpp2_txdesc_cmd_set(port, tx_desc, tx_cmd); + mvpp2_txq_inc_put_ff(port, + dma_buf_addr, + dma_buf_phys, + dma_buf_pool, + txq_pcpu, tx_desc); + + txq_pcpu->reserved_num--; + txq_pcpu->count++; + aggr_txq->count++; + + /* Enable transmit */ + wmb(); + mvpp2_aggr_txq_pend_desc_add(port, 1); +} + +/* + * ipv4 forward cache private data + */ +struct ff_priv { + struct in6_addr tun_dest_ip6; + struct dst_entry *tun_dst; +}; + +static void ff_priv_release(const struct ff_priv *priv) +{ + dst_release(priv->tun_dst); +} + +static void ff_priv_destructor_cb(void *data) +{ + const struct ff_priv *priv = (const struct ff_priv *)data; + ff_priv_release(priv); +} + +static const struct ff_priv *ffn_get_ro_priv(const struct ffn_lookup_entry *e) +{ + if (e->manip.priv_destructor != ff_priv_destructor_cb) + return NULL; + + return (const struct ff_priv *)e->manip.ffn_priv_area; +} + +static struct ff_priv *ffn_get_rw_priv(struct ffn_lookup_entry *e) +{ + BUILD_BUG_ON(sizeof (e->manip.ffn_priv_area) < + sizeof (struct ff_priv)); + + if (e->manip.priv_destructor && + e->manip.priv_destructor != ff_priv_destructor_cb) + return NULL; + + return (struct ff_priv *)e->manip.ffn_priv_area; +} + +static const struct ff_priv *fwc_get_ro_priv(const struct fbxbr_fwcache *fwc) +{ + if (fwc->priv_destructor != ff_priv_destructor_cb) + return NULL; + + return (const struct ff_priv *)fwc->priv_area; +} + +static struct ff_priv *fwc_get_rw_priv(const struct fbxbr_fwcache *fwc) +{ + BUILD_BUG_ON(sizeof (fwc->priv_area) < sizeof (struct ff_priv)); + + if (fwc->priv_destructor && + fwc->priv_destructor != ff_priv_destructor_cb) + return NULL; + + return (struct ff_priv *)fwc->priv_area; +} + +/* + * ipv6 forward cache private data + */ +struct ff6_priv { + u32 tun_dest_ip; + struct dst_entry *tun_dst; +}; + +static void ff6_priv_release(const struct ff6_priv *priv) +{ + dst_release(priv->tun_dst); +} + +static void ff6_priv_destructor_cb(void *data) +{ + const struct ff6_priv *priv = (const struct ff6_priv *)data; + ff6_priv_release(priv); +} + +static const struct ff6_priv *ffn6_get_ro_priv(const struct ffn6_lookup_entry *e6) +{ + if (e6->manip.priv_destructor != ff6_priv_destructor_cb) + return NULL; + + return (const struct ff6_priv *)e6->manip.ffn_priv_area; +} + +static struct ff6_priv *ffn6_get_rw_priv(struct ffn6_lookup_entry *e6) +{ + BUILD_BUG_ON(sizeof (e6->manip.ffn_priv_area) < + sizeof (struct ff6_priv)); + + if (e6->manip.priv_destructor && + e6->manip.priv_destructor != ff6_priv_destructor_cb) + return NULL; + + return (struct ff6_priv *)e6->manip.ffn_priv_area; +} + +/* + * + */ +static u32 ff_tun_extract_6rd_addr(const struct in6_addr *d) +{ + u32 a1, a2; + + a1 = ntohl(d->s6_addr32[0] & ~ff.u.sit.s6rd_pmask); + a1 <<= ff.u.sit.s6rd_plen; + + a2 = ntohl(d->s6_addr32[1] & ff.u.sit.s6rd_pmask); + a2 >>= (32 - ff.u.sit.s6rd_plen); + return htonl(a1 | a2); +} + +/* + * + */ +static void ff_tun_gen_mape_addr(u32 addr, u16 port, struct in6_addr *dest) +{ + u32 eabits; + u16 psid; + + eabits = ntohl(addr & ff.u.map.ea_addr_mask) << ff.u.map.psid_len; + psid = 0; + if (ff.u.map.psid_len) { + psid = ntohs(port & ff.u.map.ea_port_mask) >> + (16 - ff.u.map.psid_len); + eabits |= psid; + } + + memcpy(dest, &ff.u.map.ipv6_prefix, 8); + dest->s6_addr32[1] |= htonl(eabits << ff.u.map.ea_lshift); + + dest->s6_addr32[2] = htonl(ntohl(addr) >> 16); + dest->s6_addr32[3] = htonl((ntohl(addr) << 16) | psid); +} + +/* + * + */ +static bool ff_forward(unsigned int thread, + struct mvpp2_port *rx_port, + const uint8_t *rx_alt_hwaddr, + int pool, + struct mvpp2_port *tx_port1, + struct mvpp2_port *tx_port2, + const uint8_t *tx_alt_hwaddr, + bool wan_to_lan, + struct net_device *rx_dev, + struct net_device *tx_dev, + unsigned int rx_vlan, + unsigned int tx_vlan, + struct mvpp2_rx_desc *rx_desc, + void *frag, + size_t offset, size_t eth_len) +{ + struct mvpp2_bm_pool *bm_pool; + struct net_device_stats *rx_hw_stats; + struct net_device_stats *tx_hw_stats; + struct mvpp2_port *tx_port; + struct net_device *last_rx_dev, *next_tx_dev; + struct ffn_lookup_entry *e = NULL; + struct ffn6_lookup_entry *e6 = NULL; + struct nf_conn *ct = NULL; + struct ethhdr *eth; + enum ff_xmit_mode xmit_mode; + u8 dest_hw[6]; + unsigned int timeout; + void *l3_hdr, *l4_hdr; + bool l3_is_ipv4, l4_is_tcp; + unsigned int l3_plen; + u32 tun_v4_dest = 0; + const struct in6_addr *tun_v6_pdest = NULL; + u32 rx_status; + u16 proto, parser_info; + dma_addr_t frag_dma_addr; + phys_addr_t frag_phys_addr; + const uint8_t *src_hwaddr; + + /* make sure we have headroom for the worst case scenario */ + BUILD_BUG_ON(NET_SKB_PAD < + (sizeof (struct ipv6hdr) + VLAN_HLEN)); + + if (!tx_port1 || !rx_port || !tx_dev || !rx_dev) + return false; + + eth = (struct ethhdr *)((uint8_t *)frag + offset); + rx_status = mvpp2_rxdesc_status_get(rx_port, rx_desc); + parser_info = mvpp2_rxdesc_parser_info_get(rx_port, rx_desc); + + /* + * filter only IPv4 & IPv6 packets + */ + if (rx_vlan) { + struct vlan_ethhdr *vhdr; + + if (!pkt_is_vlan(parser_info)) + return false; + + vhdr = (struct vlan_ethhdr *)eth; + if (vhdr->h_vlan_TCI != htons(rx_vlan)) + return false; + + if (!pkt_is_ipvx(rx_status)) + return false; + + l3_hdr = vhdr + 1; + l3_plen = eth_len - VLAN_ETH_HLEN; + } else { + if (pkt_is_vlan(parser_info)) + return false; + + if (!pkt_is_ipvx(rx_status)) + return false; + + l3_hdr = eth + 1; + l3_plen = eth_len - ETH_HLEN; + } + + /* make sure packet is for our mac address */ + if (memcmp(eth->h_dest, rx_port->dev->dev_addr, 6)) { + if (!rx_alt_hwaddr || memcmp(eth->h_dest, rx_alt_hwaddr, 6)) + return false; + } + + last_rx_dev = rx_dev; + l3_is_ipv4 = pkt_is_ipv4(rx_status); + + if (l3_is_ipv4) { + struct iphdr *iph; + struct fbxbr_fwcache *fwc; + struct fbxbr *fbxbr = NULL; + struct fbxbr_port *fbxbr_fwd_port = NULL; + u16 sport, dport; + u8 ip_proto; + +handle_ipv4: + iph = (struct iphdr *)l3_hdr; + + /* lookup IP ffn entry */ + if (iph->ihl > 5 || (iph->frag_off & htons(IP_MF | IP_OFFSET))) + return false; + + if (iph->ttl <= 1) + return false; + + ip_proto = iph->protocol; + if (ip_proto == IPPROTO_TCP) { + struct tcphdr *tcph; + + if (l3_plen < sizeof (*iph) + sizeof (*tcph)) + return false; + + tcph = (struct tcphdr *)((u8 *)iph + 20); + if (tcph->fin || + tcph->syn || + tcph->rst || + !tcph->ack) { + return false; + } + + sport = tcph->source; + dport = tcph->dest; + l4_hdr = tcph; + l4_is_tcp = true; + + } else if (ip_proto == IPPROTO_UDP) { + struct udphdr *udph; + + if (l3_plen < sizeof (*iph) + sizeof (*udph)) + return false; + + udph = (struct udphdr *)((u8 *)iph + 20); + sport = udph->source; + dport = udph->dest; + l4_hdr = udph; + l4_is_tcp = false; + + } else if (ip_proto == IPPROTO_IPV6) { + struct ipv6hdr *ip6hdr; + u32 ip6rd_daddr; + + if (!ff.tun_ready) + return false; + + /* must be for us */ + if (iph->daddr != ff.u.sit.src) + return false; + + /* check len */ + if (l3_plen < sizeof (struct iphdr) + + sizeof (struct ipv6hdr)) + return false; + + ip6hdr = (struct ipv6hdr *)(iph + 1); + + /* must belong to 6rd prefix */ + if ((ip6hdr->daddr.s6_addr32[0] & + ff.u.sit.s6rd_pmask) != ff.u.sit.s6rd_prefix) + return false; + + /* 6rd address */ + ip6rd_daddr = ff_tun_extract_6rd_addr(&ip6hdr->daddr); + if (ip6rd_daddr != ff.u.sit.src) + return false; + + /* TODO: should check for spoofing here */ + l3_hdr = ip6hdr; + l3_plen -= 20; + l3_is_ipv4 = false; + goto handle_ipv6; + + } else + return false; + + if (is_fbxbridge_port(last_rx_dev)) { + struct fbxbr_fwcache_key k; + struct fbxbr_port *p; + u32 hash; + + p = fbxbr_port_get_rcu(last_rx_dev); + fbxbr = p->br; + + if (wan_to_lan) { + WARN_ON(!p->is_wan); + k.wan_ip = iph->saddr; + k.lan_ip = iph->daddr; + k.wan_port = sport; + k.lan_port = dport; + fbxbr_fwd_port = fbxbr->lan_port; + } else { + WARN_ON(p->is_wan); + k.lan_ip = iph->saddr; + k.wan_ip = iph->daddr; + k.lan_port = sport; + k.wan_port = dport; + fbxbr_fwd_port = fbxbr->wan_port; + } + k.is_tcp = l4_is_tcp; + + if (!unlikely(fbxbr_fwd_port)) + return false; + + hash = fbxbr_fwcache_hash(&k); + fwc = __fbxbr_fwcache_lookup(p->br, hash, &k); + if (!fwc) + return false; + + next_tx_dev = fbxbr_fwd_port->dev; + e = NULL; + } else { + e = __ffn_get(iph->saddr, iph->daddr, + sport, dport, l4_is_tcp); + if (!e) + return false; + + if (e->manip.dst->obsolete > 0) + return false; + + ct = e->manip.ct; + + /* only fast forward TCP connections in established state */ + if (l4_is_tcp && + ct->proto.tcp.state != TCP_CONNTRACK_ESTABLISHED) + return false; + + next_tx_dev = e->manip.dst->dev; + fwc = NULL; + } + + /* find out if the packet is to be sent as-is or + * tunneled */ + if (ff.tun_dev && next_tx_dev == ff.tun_dev) { + const struct ff_priv *ff_priv; + struct ff_priv *ff_wpriv; + struct dst_entry *v6_dst; + const struct in6_addr *pdest, *nexthop; + struct in6_addr dest; + struct rt6_info *rt6; + struct neighbour *neigh; + + /* IPv4 tunneled into MAP-E device */ + if (!ff.tun_ready) { + return false; + } + + if (l3_plen > ff.tun_mtu) + return false; + + /* lookup ipv6 route cache */ + if (e) + ff_priv = ffn_get_ro_priv(e); + else + ff_priv = fwc_get_ro_priv(fwc); + + if (ff_priv) { + if (ff_priv->tun_dst->obsolete < 0) { + /* valid route found */ + v6_dst = ff_priv->tun_dst; + pdest = &ff_priv->tun_dest_ip6; + goto cached_ipv6_route; + } + + ff_priv_release(ff_priv); + if (e) + e->manip.priv_destructor = NULL; + else + fwc->priv_destructor = NULL; + } + + /* cache miss, compute IPv6 destination */ + if (ff.u.map.ipv4_prefix && + (iph->daddr & ff.u.map.ipv4_pmask) == + ff.u.map.ipv4_prefix) { + /* compute dest using FMR */ + ff_tun_gen_mape_addr(iph->daddr, dport, &dest); + pdest = &dest; + } else { + /* next hop is BR */ + pdest = &ff.u.map.br; + } + + /* v6 route lookup */ + rt6 = rt6_lookup(&init_net, pdest, NULL, 0, NULL, 0); + if (!rt6) + return false; + + if (e) + ff_wpriv = ffn_get_rw_priv(e); + else + ff_wpriv = fwc_get_rw_priv(fwc); + if (!ff_wpriv) + return false; + + /* cache this inside FFN private area */ + ff_wpriv->tun_dst = (struct dst_entry *)rt6; + memcpy(&ff_wpriv->tun_dest_ip6, pdest, 16); + if (e) + e->manip.priv_destructor = ff_priv_destructor_cb; + else + fwc->priv_destructor = ff_priv_destructor_cb; + ff_priv = ff_wpriv; + + v6_dst = (struct dst_entry *)rt6; + +cached_ipv6_route: + if (v6_dst->dev != tx_dev) { + return false; + } + + /* is the neighboor ready ? */ + rt6 = (struct rt6_info *)v6_dst; + nexthop = rt6_nexthop(rt6, (struct in6_addr *)pdest); + if (!nexthop) { + return false; + } + + neigh = __ipv6_neigh_lookup_noref(tx_dev, nexthop); + if (!neigh || !(neigh->nud_state & NUD_VALID)) + return false; + memcpy(dest_hw, neigh->ha, 6); + + xmit_mode = FF_XMIT_IPV4_IN_IPV6; + tun_v6_pdest = &ff_priv->tun_dest_ip6; + + } else if (next_tx_dev == tx_dev) { + struct neighbour *neigh; + const struct rtable *rt; + + /* is the neighboor ready ? */ + if (e) { + u32 nexthop; + + rt = (const struct rtable *)e->manip.dst; + nexthop = (__force u32)rt_nexthop(rt, + e->manip.new_dip); + neigh = __ipv4_neigh_lookup_noref(tx_dev, + nexthop); + if (!neigh || !(neigh->nud_state & NUD_VALID)) + return false; + + memcpy(dest_hw, neigh->ha, 6); + } else { + if (!fbxbr_fwd_port->is_wan) { + if (!fbxbr->have_hw_addr) + return false; + memcpy(dest_hw, fbxbr->lan_hwaddr, 6); + } else { + __be32 nh; + + nh = iph->daddr; + if ((nh & fbxbr->wan_netmask) != + (fbxbr->wan_ipaddr & + fbxbr->wan_netmask)) { + rt = fbxbr_fwd_port->rt; + if (!rt || + rt->dst.obsolete > 0) + return false; + + nh = rt_nexthop(rt, nh); + } + + neigh = __ipv4_neigh_lookup_noref( + tx_dev, nh); + if (!neigh || + !(neigh->nud_state & NUD_VALID)) + return false; + + memcpy(dest_hw, neigh->ha, 6); + } + } + + xmit_mode = FF_XMIT_IPV4; + } else + return false; + + } else { + struct ipv6hdr *ip6hdr; + u16 sport, dport; + u8 ip_proto; + +handle_ipv6: + ip6hdr = (struct ipv6hdr *)l3_hdr; + + if (ip6hdr->hop_limit <= 1 || !ip6hdr->payload_len) + return false; + + if (ntohs(ip6hdr->payload_len) > l3_plen) + return false; + + ip_proto = ip6hdr->nexthdr; + + if (ip_proto == IPPROTO_TCP) { + struct tcphdr *tcph; + + if (l3_plen < sizeof (*ip6hdr) + sizeof (*tcph)) + return false; + + tcph = (struct tcphdr *)((u8 *)ip6hdr + + sizeof (*ip6hdr)); + + if (tcph->fin || + tcph->syn || + tcph->rst || + !tcph->ack) { + return false; + } + + sport = tcph->source; + dport = tcph->dest; + l4_hdr = tcph; + l4_is_tcp = true; + + } else if (ip_proto == IPPROTO_UDP) { + struct udphdr *udph; + + if (l3_plen < sizeof (*ip6hdr) + sizeof (*udph)) + return false; + + udph = (struct udphdr *)((u8 *)ip6hdr + + sizeof (*ip6hdr)); + sport = udph->source; + dport = udph->dest; + l4_hdr = udph; + l4_is_tcp = false; + + } else if (ip_proto == IPPROTO_IPIP) { + struct iphdr *iph; + + if (!ff.tun_ready) + return false; + + /* must be for us */ + if (memcmp(&ip6hdr->daddr, &ff.u.map.src, 16)) + return false; + + /* check len */ + if (l3_plen < sizeof (struct iphdr) + + sizeof (struct ipv6hdr)) + return false; + + iph = (struct iphdr *)(ip6hdr + 1); + + /* does it come from BR ? */ + if (memcmp(&ip6hdr->saddr, &ff.u.map.br, 16)) { + struct in6_addr exp_src_addr; + + /* no, check FMR for spoofing */ + if (!ff.u.map.ipv4_prefix) + return false; + + /* check up to PSID to reduce lookup + * depth */ + ff_tun_gen_mape_addr(iph->saddr, 0, + &exp_src_addr); + if (!ipv6_prefix_equal(&ip6hdr->saddr, + &exp_src_addr, + ff.u.map.ipv6_plen + + ff.u.map.ipv4_plen)) + return false; + } + + last_rx_dev = ff.tun_dev; + if (!last_rx_dev) + return false; + + l3_hdr = iph; + l3_plen -= sizeof (*ip6hdr); + l3_is_ipv4 = true; + goto handle_ipv4; + + } else + return false; + + e6 = __ffn6_get(ip6hdr->saddr.s6_addr32, + ip6hdr->daddr.s6_addr32, + sport, dport, l4_is_tcp); + + if (!e6) { + return false; + } + + if (e6->manip.dst->obsolete > 0) { + return false; + } + + ct = e6->manip.ct; + + /* only fast forward TCP connections in established state */ + if (l4_is_tcp && + ct->proto.tcp.state != TCP_CONNTRACK_ESTABLISHED) { + return false; + } + + /* find out if the packet is to be sent as-is or + * tunneled */ + if (ff.tun_dev && e6->manip.dst->dev == ff.tun_dev) { + const struct ff6_priv *ff6_priv; + struct ff6_priv *ff6_wpriv; + struct dst_entry *v4_dst; + struct flowi4 fl4; + struct rtable *rt; + struct neighbour *neigh; + u32 dest, nexthop; + + /* IPv6 tunneled into SIT device using 6rd */ + if (!ff.tun_ready) { + return false; + } + + if (l3_plen > ff.tun_mtu) + return false; + + /* lookup ipv4 route cache */ + ff6_priv = ffn6_get_ro_priv(e6); + if (ff6_priv) { + if (!ff6_priv->tun_dst->obsolete) { + /* valid route found */ + v4_dst = ff6_priv->tun_dst; + dest = ff6_priv->tun_dest_ip; + goto cached_ipv4_route; + } + + ff6_priv_release(ff6_priv); + e6->manip.priv_destructor = NULL; + } + + /* cache miss, compute IPv4 destination */ + if ((ip6hdr->daddr.s6_addr32[0] & + ff.u.sit.s6rd_pmask) == ff.u.sit.s6rd_prefix) { + /* next hop via prefix */ + dest = ff_tun_extract_6rd_addr(&ip6hdr->daddr); + } else { + const struct in6_addr *nh6; + struct rt6_info *rt6; + + /* next hop via route */ + rt6 = (struct rt6_info *)e6->manip.dst; + nh6 = rt6_nexthop(rt6, + (struct in6_addr *)e6->manip.new_dip); + if (!nh6) { + return false; + } + + /* should be a v4 mapped */ + if (nh6->s6_addr32[0] != 0 || + nh6->s6_addr32[1] != 0 || + nh6->s6_addr32[2] != 0) { + return false; + } + + dest = nh6->s6_addr32[3]; + } + + /* v4 route lookup */ + rt = ip_route_output_ports(&init_net, &fl4, NULL, + dest, ff.u.sit.src, + 0, 0, + IPPROTO_IPV6, 0, + 0); + if (IS_ERR(rt) || + rt->rt_type != RTN_UNICAST) + return false; + + ff6_wpriv = ffn6_get_rw_priv(e6); + if (!ff6_wpriv) + return false; + + /* cache this inside FFN private area */ + ff6_wpriv->tun_dst = (struct dst_entry *)rt; + ff6_wpriv->tun_dest_ip = dest; + e6->manip.priv_destructor = ff6_priv_destructor_cb; + + v4_dst = (struct dst_entry *)rt; + ff6_priv = ff6_wpriv; + +cached_ipv4_route: + if (v4_dst->dev != tx_dev) { + return false; + } + + /* is the neighboor ready ? */ + rt = (struct rtable *)v4_dst; + nexthop = (__force u32)rt_nexthop(rt, dest); + neigh = __ipv4_neigh_lookup_noref(tx_dev, nexthop); + if (!neigh || !(neigh->nud_state & NUD_VALID)) + return false; + memcpy(dest_hw, neigh->ha, 6); + + tun_v4_dest = dest; + xmit_mode = FF_XMIT_IPV6_IN_IPV4; + + } else if (e6->manip.dst->dev == tx_dev) { + const struct in6_addr *nexthop; + struct rt6_info *rt6; + struct neighbour *neigh; + + /* is the neighboor ready ? */ + rt6 = (struct rt6_info *)e6->manip.dst; + + nexthop = rt6_nexthop(rt6, + (struct in6_addr *)e6->manip.new_dip); + if (!nexthop) + return false; + + neigh = __ipv6_neigh_lookup_noref(tx_dev, nexthop); + if (!neigh || !(neigh->nud_state & NUD_VALID)) + return false; + memcpy(dest_hw, neigh->ha, 6); + + xmit_mode = FF_XMIT_IPV6; + } else + return false; + } + + /* should only ff long frames */ + if (WARN_ON(pool != MVPP2_BM_LONG)) + return false; + + /* is destination on correct tx bridge port ? */ + if (!is_bridge_dev(tx_dev)) + tx_port = tx_port1; + else { + struct net_bridge_port *p1, *p2; + struct net_bridge_fdb_entry *fdb; + + p1 = br_port_get_rcu(tx_port1->dev); + p2 = NULL; + if (tx_port2) + p2 = br_port_get_rcu(tx_port2->dev); + + fdb = br_fdb_find_rcu(p1->br, dest_hw, 0); + if (!fdb) + return false; + + if (fdb->dst == p1) + tx_port = tx_port1; + else if (fdb->dst == p2) + tx_port = tx_port2; + else + return false; + } + + if (is_bridge_dev(rx_dev)) { + struct net_bridge *br = netdev_priv(rx_dev); + struct net_bridge_port *p; + struct pcpu_sw_netstats *stats; + + /* if packet comes from a bridge, make sure we are + * allowed to ingress it */ + p = br_port_get_rcu(rx_port->dev); + if (p->state != BR_STATE_FORWARDING) { + return false; + } + + /* refresh FDB entry for this source */ + if (!br_fdb_update_only(br, p, eth->h_source)) { + return false; + } + + stats = this_cpu_ptr(br->stats); + stats->rx_packets++; + stats->rx_bytes += eth_len; + + } else if (rx_vlan) { + struct vlan_dev_priv *vlan = vlan_dev_priv(rx_dev); + struct vlan_pcpu_stats *stats; + stats = this_cpu_ptr(vlan->vlan_pcpu_stats); + stats->rx_packets++; + stats->rx_bytes += eth_len; + } else { + rx_dev->stats.rx_packets++; + rx_dev->stats.rx_bytes += eth_len; + } + + rx_hw_stats = &rx_port->dev->stats; + rx_hw_stats->rx_bytes += eth_len; + rx_hw_stats->rx_packets++; + + frag_dma_addr = mvpp2_rxdesc_dma_addr_get(rx_port, rx_desc); + frag_phys_addr = mvpp2_rxdesc_cookie_get(rx_port, rx_desc); + + /* do we have room in the tx queue ? */ + bm_pool = &rx_port->priv->bm_pools[pool]; + if (!ff_can_send(thread, tx_port, bm_pool)) { + /* just rearm descriptor and fake success */ + mvpp2_bm_pool_put(rx_port, pool, frag_dma_addr, frag_phys_addr); + return true; + } + + /* can we allocate a new fragment to replace the descriptor we + * are about to use ? */ + if (mvpp2_rx_refill(rx_port, bm_pool, pool)) { + /* just rearm descriptor and fake success */ + mvpp2_bm_pool_put(rx_port, pool, frag_dma_addr, frag_phys_addr); + return true; + } + + /* do we have a free tx desc ? */ + if (!ff_ensure_tx_desc(thread, tx_port, bm_pool)) { + /* just rearm descriptor and fake success */ + mvpp2_bm_pool_put(rx_port, pool, frag_dma_addr, frag_phys_addr); + return true; + } + + if (ct && l4_is_tcp) { + /* don't try to track window anymore on this + * connection */ + ct->proto.tcp.no_window_track = 1; + } + + /* alter l3 & l4 content if needed (routing only) */ + if (l3_is_ipv4 && e) { + struct iphdr *iph = (struct iphdr *)l3_hdr; + + if (e->manip.alter) { + if (l4_is_tcp) { + struct tcphdr *tcph = (struct tcphdr *)l4_hdr; + tcph->source = e->manip.new_sport; + tcph->dest = e->manip.new_dport; + tcph->check = csum16_sub(tcph->check, + e->manip.l4_adjustment); + } else { + struct udphdr *udph = (struct udphdr *)l4_hdr; + udph->source = e->manip.new_sport; + udph->dest = e->manip.new_dport; + if (udph->check) { + u16 tcheck; + + tcheck = csum16_sub(udph->check, + e->manip.l4_adjustment); + udph->check = tcheck ? tcheck : 0xffff; + } + } + + iph->saddr = e->manip.new_sip; + iph->daddr = e->manip.new_dip; + } + + iph->ttl--; + iph->check = csum16_sub(iph->check, + e->manip.ip_adjustment); + + } else if (!l3_is_ipv4 && e6) { + struct ipv6hdr *ip6hdr = (struct ipv6hdr *)l3_hdr; + + if (e6->manip.alter) { + if (l4_is_tcp) { + struct tcphdr *tcph = (struct tcphdr *)l4_hdr; + tcph->source = e6->manip.new_sport; + tcph->dest = e6->manip.new_dport; + tcph->check = csum16_sub(tcph->check, + e6->manip.adjustment); + } else { + struct udphdr *udph = (struct udphdr *)l4_hdr; + udph->source = e6->manip.new_sport; + udph->dest = e6->manip.new_dport; + + if (udph->check) { + u16 tcheck; + + tcheck = csum16_sub(udph->check, + e6->manip.adjustment); + udph->check = tcheck ? tcheck : 0xffff; + } + } + + memcpy(ip6hdr->saddr.s6_addr32, e6->manip.new_sip, 16); + memcpy(ip6hdr->daddr.s6_addr32, e6->manip.new_dip, 16); + } + + ip6hdr->hop_limit--; + } + + /* packet is ready to xmit */ + switch (xmit_mode) { + case FF_XMIT_IPV4: + proto = ETH_P_IP; + break; + + case FF_XMIT_IPV6: + proto = ETH_P_IPV6; + break; + + case FF_XMIT_IPV6_IN_IPV4: + { + struct iphdr *tun_hdr; + /* prepend IPv4 */ + tun_hdr = (struct iphdr *)((u8 *)l3_hdr - sizeof (*tun_hdr)); + tun_hdr->ihl = 5; + tun_hdr->version = 4; + tun_hdr->tos = 0; + tun_hdr->tot_len = htons(l3_plen + sizeof (*tun_hdr)); + tun_hdr->id = 0; + tun_hdr->frag_off = 0; + tun_hdr->ttl = 64; + tun_hdr->protocol = IPPROTO_IPV6; + tun_hdr->saddr = ff.u.sit.src; + tun_hdr->daddr = tun_v4_dest; + + l3_hdr = (u8 *)tun_hdr; + l3_plen += sizeof (*tun_hdr); + + proto = ETH_P_IP; + break; + } + + case FF_XMIT_IPV4_IN_IPV6: + { + struct ipv6hdr *tun_6hdr; + + /* prepend IPv6 */ + tun_6hdr = (struct ipv6hdr *)((u8 *)l3_hdr - sizeof (*tun_6hdr)); + tun_6hdr->version = 6; + tun_6hdr->priority = 0; + memset(tun_6hdr->flow_lbl, 0, sizeof (tun_6hdr->flow_lbl)); + tun_6hdr->payload_len = htons(l3_plen); + tun_6hdr->nexthdr = IPPROTO_IPIP; + tun_6hdr->hop_limit = 64; + tun_6hdr->saddr = ff.u.map.src; + tun_6hdr->daddr = *tun_v6_pdest; + + l3_hdr = (u8 *)tun_6hdr; + l3_plen += sizeof (*tun_6hdr); + + proto = ETH_P_IPV6; + break; + } + } + + src_hwaddr = tx_port->dev->dev_addr; + if (tx_alt_hwaddr) + src_hwaddr = tx_alt_hwaddr; + + /* add ethernet header */ + if (tx_vlan) { + struct vlan_ethhdr *vhdr; + + vhdr = (struct vlan_ethhdr *)((u8 *)l3_hdr - VLAN_ETH_HLEN); + memcpy(vhdr->h_dest, dest_hw, 6); + memcpy(vhdr->h_source, src_hwaddr, 6); + vhdr->h_vlan_proto = htons(ETH_P_8021Q); + vhdr->h_vlan_TCI = htons(tx_vlan); + vhdr->h_vlan_encapsulated_proto = htons(proto); + + eth = (struct ethhdr *)vhdr; + eth_len = l3_plen + VLAN_ETH_HLEN; + } else { + eth = (struct ethhdr *)((u8 *)l3_hdr - ETH_HLEN); + memcpy(eth->h_dest, dest_hw, 6); + memcpy(eth->h_source, src_hwaddr, 6); + eth->h_proto = htons(proto); + eth_len = l3_plen + ETH_HLEN; + } + + ff_send(thread, + tx_port, + frag_dma_addr, + frag_phys_addr, + (void *)eth - frag, + pool, + eth_len, + (proto == ETH_P_IP), + (xmit_mode == FF_XMIT_IPV4), + l4_is_tcp, + tx_vlan); + + if (is_bridge_dev(tx_dev)) { + struct net_bridge *br = netdev_priv(tx_dev); + struct pcpu_sw_netstats *stats; + stats = this_cpu_ptr(br->stats); + stats->tx_packets++; + stats->tx_bytes += eth_len; + } else if (tx_vlan) { + struct vlan_dev_priv *vlan = vlan_dev_priv(tx_dev); + struct vlan_pcpu_stats *stats; + stats = this_cpu_ptr(vlan->vlan_pcpu_stats); + stats->tx_packets++; + stats->tx_bytes += eth_len; + } else { + tx_dev->stats.tx_packets++; + tx_dev->stats.tx_bytes += eth_len; + } + + tx_hw_stats = &tx_port->dev->stats; + tx_hw_stats->tx_bytes += eth_len; + tx_hw_stats->tx_packets++; + + /* refresh conntrack */ + if (ct) { + if (l4_is_tcp) + timeout = HZ * 3600 * 24 * 5; + else + timeout = HZ * 180; + + if (ct->timeout - ff.jiffies < timeout - 10 * HZ) { + unsigned long newtime = ff.jiffies + timeout; + ct->timeout = newtime; + } + } + + return true; +} + +/* + * + */ +static bool ff_receive(unsigned int thread, + struct mvpp2_port *port, + int pool, + struct mvpp2_rx_desc *rx_desc, + void *frag, + size_t offset, size_t dlen) +{ + int wan_idx = (FF_DEV_WAN_ID << 1) | FF_DEV_WAN_PORT_INDEX; + int sfplan_idx = (FF_DEV_SFPLAN_ID << 1) | FF_DEV_SFPLAN_PORT_INDEX; + int swlan_idx = (FF_DEV_SWLAN_ID << 1) | FF_DEV_SWLAN_PORT_INDEX; + struct net_device *wan_dev; + int wan_vlan_id; + unsigned int idx; + + if (!ff_enabled) + return false; + + if (ff.wan_active_dev == -1) + return false; + + wan_dev = ff.wan_devs[ff.wan_active_dev]; + wan_vlan_id = ff.wan_vlan_ids[ff.wan_active_dev]; + + idx = (port->priv->id << 1) | port->index; + + /* + * LAN => WAN + * [sfplan0 (untagged)] => [br0] => IPV4 => [ftth0.] + */ + if (idx == sfplan_idx) { + return ff_forward(thread, + port, + sfplan.bridge_hwaddr, + pool, + ports_by_idx[wan_idx], + NULL, + NULL, + false, + ff.lan_dev_sfp, + wan_dev, + 0, wan_vlan_id, + rx_desc, + frag, offset, dlen); + } + + /* + * LAN => WAN + * [swlan0 (untagged)] => [br0] => IPV4 => [ftth0.] + */ + if (idx == swlan_idx) { + return ff_forward(thread, + port, + swlan.bridge_hwaddr, + pool, + ports_by_idx[wan_idx], + NULL, + NULL, + false, + ff.lan_dev_sw, + wan_dev, + 0, wan_vlan_id, + rx_desc, + frag, offset, dlen); + } + + /* + * WAN => LAN + * [ffth0.] => IPV4 => [br0] => [sfplan0/swlan0] + */ + if (idx == wan_idx) { + struct mvpp2_port *tx_ports[2]; + struct net_device *tx_dev; + const uint8_t *tx_alt_hwaddr; + + if (ff.lan_dev_sfp && sfplan.fbxbr_port) { + /* fbxbridge mode */ + tx_ports[0] = ports_by_idx[sfplan_idx]; + tx_ports[1] = NULL; + tx_dev = ff.lan_dev_sfp; + tx_alt_hwaddr = NULL; + + } else if (ff.lan_dev_sw && swlan.fbxbr_port) { + /* fbxbridge mode */ + tx_ports[0] = ports_by_idx[swlan_idx]; + tx_ports[1] = NULL; + tx_dev = ff.lan_dev_sw; + tx_alt_hwaddr = NULL; + + } else { + /* bridge mode */ + tx_ports[0] = ports_by_idx[sfplan_idx]; + if (tx_ports[0]) + tx_ports[1] = ports_by_idx[swlan_idx]; + else { + tx_ports[0] = ports_by_idx[swlan_idx]; + tx_ports[1] = NULL; + } + + tx_dev = ff.lan_dev_sfp; + tx_alt_hwaddr = sfplan.bridge_hwaddr; + if (!tx_dev) { + tx_dev = ff.lan_dev_sw; + tx_alt_hwaddr = swlan.bridge_hwaddr; + } + } + + return ff_forward(thread, + port, + NULL, + pool, + tx_ports[0], + tx_ports[1], + tx_alt_hwaddr, + true, + wan_dev, + tx_dev, + wan_vlan_id, 0, + rx_desc, + frag, offset, dlen); + } + + return false; +} + +/* + * + */ +static unsigned int ff_get_opposite_ports(struct mvpp2_port *in_port, + struct mvpp2_port *out_ports[2]) +{ + int wan_idx = (FF_DEV_WAN_ID << 1) | FF_DEV_WAN_PORT_INDEX; + int sfplan_idx = (FF_DEV_SFPLAN_ID << 1) | FF_DEV_SFPLAN_PORT_INDEX; + int swlan_idx = (FF_DEV_SWLAN_ID << 1) | FF_DEV_SWLAN_PORT_INDEX; + unsigned int idx, count; + + idx = (in_port->priv->id << 1) | in_port->index; + count = 0; + + if (idx == sfplan_idx || idx == swlan_idx) { + if (ports_by_idx[wan_idx]) + out_ports[count++] = ports_by_idx[wan_idx]; + } else if (idx == wan_idx) { + if (ports_by_idx[sfplan_idx]) + out_ports[count++] = ports_by_idx[sfplan_idx]; + if (ports_by_idx[swlan_idx]) + out_ports[count++] = ports_by_idx[swlan_idx]; + } + + return count; +} + +/* + * + */ +static ssize_t ff_show_enabled(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "%u\n", ff_enabled); +} + +static ssize_t ff_store_enabled(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + unsigned long val; + + if (kstrtoul(buf, 10, &val)) + return -EINVAL; + + if (ff_enabled == val) + return len; + + printk(KERN_NOTICE "ff: fastpath now %s\n", + val ? "enabled" : "disabled"); + ff_enabled = val; + return len; +} + +static struct device_attribute dev_attr_ff = { + .attr = { .name = "ff_enabled", .mode = (S_IRUGO | S_IWUSR) }, + .show = ff_show_enabled, + .store = ff_store_enabled, +}; + +/* + * + */ +static ssize_t ff_show_tun_dev(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "%s\n", ff.tun_dev_name); +} + +static ssize_t ff_store_tun_dev(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + if (!len || buf[0] == '\n') { + ff.tun_dev_name[0] = 0; + spin_lock_bh(&ff_lock); + __ff_tun_release(); + spin_unlock_bh(&ff_lock); + printk(KERN_NOTICE "ff: tun dev unset\n"); + return len; + } + + spin_lock_bh(&ff_lock); + __ff_tun_release(); + strncpy(ff.tun_dev_name, buf, len); + strim(ff.tun_dev_name); + printk(KERN_NOTICE "ff: tun dev set to %s\n", ff.tun_dev_name); + __ff_tun_capture(); + spin_unlock_bh(&ff_lock); + return len; +} + +static struct device_attribute dev_attr_tun = { + .attr = { .name = "ff_tun_dev", .mode = (S_IRUGO | S_IWUSR) }, + .show = ff_show_tun_dev, + .store = ff_store_tun_dev, +}; + +/* + * + */ +static ssize_t ff_show_wan_dev(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + return sprintf(buf, "%s\n", ff.wan_dev_name); +} + +static ssize_t ff_store_wan_dev(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + if (!len || buf[0] == '\n') { + ff.wan_dev_name[0] = 0; + spin_lock_bh(&ff_lock); + __ff_wan_find_active(); + spin_unlock_bh(&ff_lock); + printk(KERN_NOTICE "ff: requested wan dev unset\n"); + return len; + } + + spin_lock_bh(&ff_lock); + ff.wan_dev_name[0] = 0; + __ff_wan_find_active(); + strncpy(ff.wan_dev_name, buf, len); + strim(ff.wan_dev_name); + printk(KERN_NOTICE "ff: requested wan dev set to %s\n", + ff.wan_dev_name); + __ff_wan_find_active(); + spin_unlock_bh(&ff_lock); + return len; +} + +static struct device_attribute dev_attr_wan = { + .attr = { .name = "ff_wan_dev", .mode = (S_IRUGO | S_IWUSR) }, + .show = ff_show_wan_dev, + .store = ff_store_wan_dev, +}; + +static struct ff_dev swlan = { + .desc = "swlan", + .id = FF_DEV_SWLAN_ID, + .port_index = FF_DEV_SWLAN_PORT_INDEX, + .bridge_member = true, + .pvirt_dev = &ff.lan_dev_sw, +}; + +static struct ff_dev sfplan = { + .desc = "sfplan", + .id = FF_DEV_SFPLAN_ID, + .port_index = FF_DEV_SFPLAN_PORT_INDEX, + .bridge_member = true, + .pvirt_dev = &ff.lan_dev_sfp, +}; + +static struct ff_dev wan = { + .desc = "wan_836", + .id = FF_DEV_WAN_ID, + .port_index = FF_DEV_WAN_PORT_INDEX, + .vlan = 836, + .is_wan = true, + .pvirt_dev = &ff.wan_devs[0], + .pvlan_id = &ff.wan_vlan_ids[0], +}; + +static struct ff_dev wan_301 = { + .desc = "wan_301", + .id = FF_DEV_WAN_ID, + .port_index = FF_DEV_WAN_PORT_INDEX, + .vlan = 301, + .is_wan = true, + .pvirt_dev = &ff.wan_devs[1], + .pvlan_id = &ff.wan_vlan_ids[1], +}; + +static struct ff_dev wan_302 = { + .desc = "wan_302", + .id = FF_DEV_WAN_ID, + .port_index = FF_DEV_WAN_PORT_INDEX, + .vlan = 302, + .is_wan = true, + .pvirt_dev = &ff.wan_devs[2], + .pvlan_id = &ff.wan_vlan_ids[2], +}; + +static struct ff_dev wan_303 = { + .desc = "wan_303", + .id = FF_DEV_WAN_ID, + .port_index = FF_DEV_WAN_PORT_INDEX, + .vlan = 303, + .is_wan = true, + .pvirt_dev = &ff.wan_devs[3], + .pvlan_id = &ff.wan_vlan_ids[3], +}; + +static void ff_init(struct device *dev) +{ + static bool done; + + if (done) + return; + + ff.wan_active_dev = -1; + device_create_file(dev, &dev_attr_ff); + device_create_file(dev, &dev_attr_tun); + device_create_file(dev, &dev_attr_wan); + + printk(KERN_DEBUG "ff_init\n"); + + list_add(&swlan.next, &ff_devs); + list_add(&sfplan.next, &ff_devs); + list_add(&wan.next, &ff_devs); + list_add(&wan_301.next, &ff_devs); + list_add(&wan_302.next, &ff_devs); + list_add(&wan_303.next, &ff_devs); + done = true; +} +#endif + static void *mvpp2_frag_alloc(const struct mvpp2_bm_pool *pool) { if (likely(pool->frag_size <= PAGE_SIZE)) @@ -859,6 +3083,10 @@ enum mvpp2_bm_pool_log_num long_log_pool, short_log_pool; int rxq; +#ifdef CONFIG_MVPP2_FBX_FF + long_log_pool = MVPP2_BM_JUMBO; + short_log_pool = MVPP2_BM_LONG; +#else /* If port pkt_size is higher than 1518B: * HW Long pool - SW Jumbo pool, HW Short pool - SW Long pool * else: HW Long pool - SW Long pool, HW Short pool - SW Short pool @@ -870,6 +3098,7 @@ long_log_pool = MVPP2_BM_LONG; short_log_pool = MVPP2_BM_SHORT; } +#endif if (!port->pool_long) { port->pool_long = @@ -1396,7 +3625,7 @@ static u64 mvpp2_read_count(struct mvpp2_port *port, const struct mvpp2_ethtool_counter *counter) { - u64 val; + u64 val = 0; val = readl(port->stats_base + counter->offset); if (counter->reg_is_64b) @@ -1479,10 +3708,31 @@ { MVPP2_RX_PKTS_BM_DROP_CTR, "rxq_%d_packets_bm_drops" }, }; +static const struct mvpp2_ethtool_counter mvpp2_ethtool_bm_regs[] = { + { MVPP2_BM_DROP_CTR(0), "bm_%d_drop" }, +}; + #define MVPP2_N_ETHTOOL_STATS(ntxqs, nrxqs) (ARRAY_SIZE(mvpp2_ethtool_mib_regs) + \ ARRAY_SIZE(mvpp2_ethtool_port_regs) + \ (ARRAY_SIZE(mvpp2_ethtool_txq_regs) * (ntxqs)) + \ - (ARRAY_SIZE(mvpp2_ethtool_rxq_regs) * (nrxqs))) + (ARRAY_SIZE(mvpp2_ethtool_rxq_regs) * (nrxqs)) + \ + (ARRAY_SIZE(mvpp2_ethtool_bm_regs) * (16))) + +struct ethtool_priv_flags_strings { + const char string[ETH_GSTRING_LEN]; +}; + +static const struct ethtool_priv_flags_strings mvpp2_priv_flags_strings[] = { + { .string = "en-fbx-10g1g-switch" }, + { .string = "en-fbx-10g" }, + { .string = "en-fbx-1g" }, + { .string = "st-fbx-10g" }, + { .string = "st-fbx-1g" }, + { .string = "st-sync-ok", }, + { .string = "clear-mib", }, + { .string = "en-10g-linkdown-wa" }, +}; + static void mvpp2_ethtool_get_strings(struct net_device *netdev, u32 sset, u8 *data) @@ -1490,6 +3740,12 @@ struct mvpp2_port *port = netdev_priv(netdev); int i, q; + if (sset == ETH_SS_PRIV_FLAGS) { + memcpy(data, mvpp2_priv_flags_strings, + sizeof (mvpp2_priv_flags_strings)); + return; + } + if (sset != ETH_SS_STATS) return; @@ -1521,6 +3777,15 @@ data += ETH_GSTRING_LEN; } } + + for (q = 0; q < 16; q++) { + for (i = 0; i < ARRAY_SIZE(mvpp2_ethtool_bm_regs); i++) { + snprintf(data, ETH_GSTRING_LEN, + mvpp2_ethtool_bm_regs[i].string, + q); + data += ETH_GSTRING_LEN; + } + } } static void mvpp2_read_stats(struct mvpp2_port *port) @@ -1552,14 +3817,57 @@ *pstats++ += mvpp2_read_index(port->priv, port->first_rxq + q, mvpp2_ethtool_rxq_regs[i].offset); + + for (q = 0; q < 16; q++) + for (i = 0; i < ARRAY_SIZE(mvpp2_ethtool_bm_regs); i++) + *pstats++ += mvpp2_read(port->priv, + mvpp2_ethtool_bm_regs[i].offset + + 4 * q); } +static void mvpp2_start_dev(struct mvpp2_port *port); +static void mvpp2_stop_dev(struct mvpp2_port *port); + static void mvpp2_gather_hw_statistics(struct work_struct *work) { struct delayed_work *del_work = to_delayed_work(work); struct mvpp2_port *port = container_of(del_work, struct mvpp2_port, stats_work); + /* + * work around for ONU module link failing to come backup + * after the link goes down. + */ + if (!netif_carrier_ok(port->dev)) { + /* + * port is down, we may need to reset the port hard to + * get the ONU module to link back up properly. + * + * the mvpp2_link_status_isr() function will set + * pending_10g_reset, and last_link_int_jiffies. The + * later is to make sure we do not attempt to reset + * the port hard during the interrupt storm (and + * associated link flapping) that occurs when the ONU + * drops the link + */ + if (port->pending_10g_reset && + time_after(jiffies, + port->last_link_int_jiffies + HZ / 10)) { + + port->pending_10g_reset = false; + + rtnl_lock(); + mvpp2_stop_dev(port); + mvpp2_start_dev(port); + rtnl_unlock(); + } + } else + /* + * port somehow came back up, clear pending status, if + * it was set. + */ + port->pending_10g_reset = false; + mutex_lock(&port->gather_stats_lock); mvpp2_read_stats(port); @@ -1597,6 +3905,9 @@ if (sset == ETH_SS_STATS) return MVPP2_N_ETHTOOL_STATS(port->ntxqs, port->nrxqs); + if (sset == ETH_SS_PRIV_FLAGS) + return ARRAY_SIZE(mvpp2_priv_flags_strings); + return -EOPNOTSUPP; } @@ -1710,8 +4021,16 @@ tx_port_num); mvpp2_write(port->priv, MVPP2_TXP_SCHED_CMD_1_REG, 0); - /* Set TXQ scheduling to Round-Robin */ - mvpp2_write(port->priv, MVPP2_TXP_SCHED_FIXED_PRIO_REG, 0); + /* setup fixed prio queue mask, rest are WRR */ + mvpp2_write(port->priv, MVPP2_TXP_SCHED_FIXED_PRIO_REG, + MVPP2_TX_FIXED_PRIO_QUEUES); + + /* setup non zero WRR value for all ports (otherwise WRR seems + * biased) */ + for (queue = 0; queue < MVPP2_MAX_TXQ; queue++) + mvpp2_write(port->priv, + MVPP2_TXQ_SCHED_BCOUNT_CFG_REG(queue), + 64); /* Close bandwidth for all queues */ for (queue = 0; queue < MVPP2_MAX_TXQ; queue++) @@ -1988,18 +4307,30 @@ desc_count += txq_pcpu_aux->reserved_num; } +#ifdef CONFIG_MVPP2_FBX_FF + if (txq->log_id == MVPP2_FF_TXQ_ID) { + if (desc_count >= txq->size) + return -ENOMEM; + + req = max(MVPP2_CPU_DESC_CHUNK, num - txq_pcpu->reserved_num); + if (req > txq->size - desc_count) + req = txq->size - desc_count; + } else +#endif + { req = max(MVPP2_CPU_DESC_CHUNK, num - txq_pcpu->reserved_num); desc_count += req; - if (desc_count > - (txq->size - (MVPP2_MAX_THREADS * MVPP2_CPU_DESC_CHUNK))) + (txq->size - (num_present_cpus() * MVPP2_CPU_DESC_CHUNK))) return -ENOMEM; + } txq_pcpu->reserved_num += mvpp2_txq_alloc_reserved_desc(port, txq, req); /* OK, the descriptor could have been updated: check again. */ if (txq_pcpu->reserved_num < num) return -ENOMEM; + return 0; } @@ -2237,6 +4568,16 @@ struct mvpp2_txq_pcpu_buf *tx_buf = txq_pcpu->buffs + txq_pcpu->txq_get_index; +#ifdef CONFIG_MVPP2_FBX_FF + if (tx_buf->is_rx_buf) { + mvpp2_bm_pool_put(port, + tx_buf->pool, + tx_buf->bm_dma, + tx_buf->bm_phys); + mvpp2_txq_inc_get(txq_pcpu); + continue; + } +#endif if (!IS_TSO_HEADER(txq_pcpu, tx_buf->dma)) dma_unmap_single(port->dev->dev.parent, tx_buf->dma, tx_buf->size, DMA_TO_DEVICE); @@ -2273,6 +4614,10 @@ if (txq_pcpu->thread != mvpp2_cpu_to_thread(port->priv, smp_processor_id())) netdev_err(port->dev, "wrong cpu on the end of Tx processing\n"); +#ifdef CONFIG_MVPP2_FBX_FF + WARN_ON(txq->log_id == MVPP2_FF_TXQ_ID); +#endif + tx_done = mvpp2_txq_sent_desc_proc(port, txq); if (!tx_done) return; @@ -2727,15 +5072,29 @@ return IRQ_HANDLED; } +static void mvpp2_schedule_10g_port_reset(struct mvpp2_port *port, + bool was_up) +{ + if (!port->linkdown_10g_wa_enable) + return ; + + if (was_up && + port->gop_id == 0 && + port->phy_interface == PHY_INTERFACE_MODE_10GKR) + port->pending_10g_reset = true; +} + /* Per-port interrupt for link status changes */ static irqreturn_t mvpp2_link_status_isr(int irq, void *dev_id) { struct mvpp2_port *port = (struct mvpp2_port *)dev_id; struct net_device *dev = port->dev; bool event = false, link = false; + bool was_up = netif_carrier_ok(dev); u32 val; mvpp22_gop_mask_irq(port); + port->last_link_int_jiffies = jiffies; if (port->gop_id == 0 && mvpp2_is_xlg(port->phy_interface)) { val = readl(port->base + MVPP22_XLG_INT_STAT); @@ -2759,6 +5118,8 @@ if (port->phylink) { phylink_mac_change(port->phylink, link); + if (!link) + mvpp2_schedule_10g_port_reset(port, was_up); goto handled; } @@ -2779,6 +5140,8 @@ mvpp2_egress_disable(port); mvpp2_interrupts_disable(port); + + mvpp2_schedule_10g_port_reset(port, was_up); } handled: @@ -2871,6 +5234,61 @@ phys_addr_t phys_addr; void *buf; +#ifdef CONFIG_MVPP2_FBX_FF + if (ff_enabled && pool == MVPP2_BM_LONG) { + struct mvpp2_port *opp_ports[2]; + unsigned int i, count; + unsigned int thread = mvpp2_cpu_to_thread(port->priv, + smp_processor_id()); + + /* + * try to reclaim from opposite fast forward dedicated + * tx queues + */ + count = ff_get_opposite_ports(port, opp_ports); + if (!count) + goto alloc; + + for (i = 0; i < count; i++) { + struct mvpp2_port *opp_port = opp_ports[i]; + struct mvpp2_tx_queue *txq; + struct mvpp2_txq_pcpu *txq_pcpu; + struct mvpp2_txq_pcpu_buf *tx_buf; + + + txq = opp_port->ff_txq; + if (WARN_ON(txq->log_id != MVPP2_FF_TXQ_ID)) + continue; + + txq_pcpu = per_cpu_ptr(txq->pcpu, thread); + if (!txq_pcpu->count) + continue; + + if (!txq_pcpu->release_pending) + txq_pcpu->release_pending = + mvpp2_txq_sent_desc_proc(opp_port, txq); + + if (!txq_pcpu->release_pending) + continue; + + tx_buf = txq_pcpu->buffs + txq_pcpu->txq_get_index; + if (WARN_ON(!tx_buf->is_rx_buf)) + continue; + + mvpp2_bm_pool_put(port, + tx_buf->pool, + tx_buf->bm_dma, + tx_buf->bm_phys); + + txq_pcpu->release_pending--; + txq_pcpu->count--; + mvpp2_txq_inc_get(txq_pcpu); + return 0; + } + } +alloc: +#endif + /* No recycle or too many buffers are in use, so allocate a new skb */ buf = mvpp2_buf_alloc(port, bm_pool, &dma_addr, &phys_addr, GFP_ATOMIC); @@ -2924,6 +5342,11 @@ u32 rcvd_pkts = 0; u32 rcvd_bytes = 0; +#ifdef CONFIG_MVPP2_FBX_FF + unsigned int thread = mvpp2_cpu_to_thread(port->priv, smp_processor_id()); + spin_lock(&ff_lock); +#endif + /* Get number of received packets and clamp the to-do */ rx_received = mvpp2_rxq_received(port, rxq->id); if (rx_todo > rx_received) @@ -2966,6 +5389,19 @@ continue; } +#ifdef CONFIG_MVPP2_FBX_FF + if (ff_receive(thread, + port, + pool, + rx_desc, + data, + MVPP2_MH_SIZE + NET_SKB_PAD, rx_bytes)) { + rcvd_pkts++; + rcvd_bytes += rx_bytes; + continue; + } +#endif + if (bm_pool->frag_size > PAGE_SIZE) frag_size = 0; else @@ -2997,6 +5433,10 @@ napi_gro_receive(napi, skb); } +#ifdef CONFIG_MVPP2_FBX_FF + spin_unlock(&ff_lock); +#endif + if (rcvd_pkts) { struct mvpp2_pcpu_stats *stats = this_cpu_ptr(port->stats); @@ -3214,6 +5654,10 @@ txq_id = skb_get_queue_mapping(skb); txq = port->txqs[txq_id]; +#ifdef CONFIG_MVPP2_FBX_FF + WARN_ON(txq->log_id == MVPP2_FF_TXQ_ID); +#endif + txq_pcpu = per_cpu_ptr(txq->pcpu, thread); aggr_txq = &port->priv->aggr_txqs[thread]; @@ -3334,6 +5778,10 @@ struct mvpp2_queue_vector *qv; unsigned int thread = mvpp2_cpu_to_thread(port->priv, smp_processor_id()); +#ifdef CONFIG_MVPP2_FBX_FF + ff.jiffies = nfct_time_stamp; +#endif + qv = container_of(napi, struct mvpp2_queue_vector, napi); /* Rx/Tx cause register @@ -3562,7 +6010,13 @@ irq_set_status_flags(qv->irq, IRQ_NO_BALANCING); } - err = request_irq(qv->irq, mvpp2_isr, 0, port->dev->name, qv); + scnprintf(qv->request_name, + sizeof (qv->request_name), + "%s%s%s", + port->dev->name, + qv->irq_name[0] ? "-" : "", + qv->irq_name); + err = request_irq(qv->irq, mvpp2_isr, 0, qv->request_name, qv); if (err) goto err; @@ -3675,8 +6129,12 @@ } if (priv->hw_version == MVPP22 && port->link_irq) { + scnprintf(port->link_irq_request_name, + sizeof (port->link_irq_request_name), + "%s-link", + port->dev->name); err = request_irq(port->link_irq, mvpp2_link_status_isr, 0, - dev->name, port); + port->link_irq_request_name, port); if (err) { netdev_err(port->dev, "cannot request link IRQ %d\n", port->link_irq); @@ -3699,6 +6157,10 @@ goto err_free_irq; } +#ifdef CONFIG_MVPP2_FBX_FF + port->ff_txq = port->txqs[MVPP2_FF_TXQ_ID]; +#endif + /* Unmask interrupts on all CPUs */ on_each_cpu(mvpp2_interrupts_unmask, port, 1); mvpp2_shared_interrupt_mask_unmask(port, false); @@ -3709,6 +6171,13 @@ queue_delayed_work(priv->stats_queue, &port->stats_work, MVPP2_MIB_COUNTERS_STATS_DELAY); +#ifdef CONFIG_MVPP2_FBX_FF + { + int ff_idx = (port->priv->id << 1) | port->index; + WARN_ON(ports_by_idx[ff_idx] != NULL); + ports_by_idx[ff_idx] = port; + } +#endif return 0; err_free_irq: @@ -3726,6 +6195,13 @@ struct mvpp2_port_pcpu *port_pcpu; unsigned int thread; +#ifdef CONFIG_MVPP2_FBX_FF + { + int ff_idx = (port->priv->id << 1) | port->index; + ports_by_idx[ff_idx] = NULL; + } +#endif + mvpp2_stop_dev(port); /* Mask interrupts on all threads */ @@ -3754,6 +6230,10 @@ mvpp2_mac_reset_assert(port); mvpp22_pcs_reset_assert(port); +#ifdef CONFIG_MVPP2_FBX_FF + port->ff_txq = NULL; +#endif + return 0; } @@ -3772,49 +6252,46 @@ return 0; } -static void mvpp2_set_rx_promisc(struct mvpp2_port *port, bool enable) +static void mvpp2_set_vlan_promisc(struct mvpp2_port *port, bool enable) { if (!enable && (port->dev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) mvpp2_prs_vid_enable_filtering(port); else mvpp2_prs_vid_disable_filtering(port); - - mvpp2_prs_mac_promisc_set(port->priv, port->id, - MVPP2_PRS_L2_UNI_CAST, enable); - - mvpp2_prs_mac_promisc_set(port->priv, port->id, - MVPP2_PRS_L2_MULTI_CAST, enable); } static void mvpp2_set_rx_mode(struct net_device *dev) { struct mvpp2_port *port = netdev_priv(dev); + /* switch to promisc while we clear uc & mc list */ + mvpp2_prs_mac_promisc_set(port->priv, port->id, + MVPP2_PRS_L2_UNI_CAST, true); + mvpp2_prs_mac_promisc_set(port->priv, port->id, + MVPP2_PRS_L2_MULTI_CAST, true); + /* Clear the whole UC and MC list */ mvpp2_prs_mac_del_all(port); if (dev->flags & IFF_PROMISC) { - mvpp2_set_rx_promisc(port, true); + mvpp2_set_vlan_promisc(port, true); return; } - mvpp2_set_rx_promisc(port, false); + mvpp2_set_vlan_promisc(port, false); - if (netdev_uc_count(dev) > MVPP2_PRS_MAC_UC_FILT_MAX || - mvpp2_prs_mac_da_accept_list(port, &dev->uc)) + if (netdev_uc_count(dev) <= MVPP2_PRS_MAC_UC_FILT_MAX && + !mvpp2_prs_mac_da_accept_list(port, &dev->uc)) mvpp2_prs_mac_promisc_set(port->priv, port->id, - MVPP2_PRS_L2_UNI_CAST, true); + MVPP2_PRS_L2_UNI_CAST, false); - if (dev->flags & IFF_ALLMULTI) { - mvpp2_prs_mac_promisc_set(port->priv, port->id, - MVPP2_PRS_L2_MULTI_CAST, true); + if (dev->flags & IFF_ALLMULTI) return; - } - if (netdev_mc_count(dev) > MVPP2_PRS_MAC_MC_FILT_MAX || - mvpp2_prs_mac_da_accept_list(port, &dev->mc)) + if (netdev_mc_count(dev) <= MVPP2_PRS_MAC_MC_FILT_MAX && + !mvpp2_prs_mac_da_accept_list(port, &dev->mc)) mvpp2_prs_mac_promisc_set(port->priv, port->id, - MVPP2_PRS_L2_MULTI_CAST, true); + MVPP2_PRS_L2_MULTI_CAST, false); } static int mvpp2_set_mac_address(struct net_device *dev, void *p) @@ -3903,9 +6380,11 @@ /* No port is using jumbo frames */ if (!jumbo) { +#ifndef CONFIG_MVPP2_FBX_FF dev_info(port->dev->dev.parent, "all ports have a low MTU, switching to per-cpu buffers"); mvpp2_bm_switch_buffers(priv, true); +#endif } } @@ -3964,10 +6443,40 @@ stats->tx_dropped = dev->stats.tx_dropped; } +static int mii_bus_read(struct net_device *dev, int mii_id, int regnum) +{ + struct mvpp2_port *port = netdev_priv(dev); + + return port->mii_bus->read(port->mii_bus, mii_id, regnum); +} + +static void mii_bus_write(struct net_device *dev, int mii_id, int regnum, + int value) +{ + struct mvpp2_port *port = netdev_priv(dev); + + port->mii_bus->write(port->mii_bus, mii_id, regnum, value); +} + static int mvpp2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { struct mvpp2_port *port = netdev_priv(dev); + if (cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) { + struct mii_if_info mii; + + if (!port->mii_bus) + return -ENOTSUPP; + + mii.dev = dev; + mii.mdio_read = mii_bus_read; + mii.mdio_write = mii_bus_write; + mii.phy_id = 0; + mii.phy_id_mask = 0x3f; + mii.reg_num_mask = 0x1f; + return generic_mii_ioctl(&mii, if_mii(ifr), cmd, NULL); + } + if (!port->phylink) return -ENOTSUPP; @@ -4359,6 +6868,168 @@ return mvpp22_port_rss_ctx_indir_set(port, *rss_context, indir); } + +/* + * changes the phy interface mode of the interface to either + * 1000Base-X or 10000Base-X depending on what was requested via the + * ethetool private flags interface. + */ +static int maybe_switch_mode(struct net_device *dev, u32 flags) +{ + struct mvpp2_port *port = netdev_priv(dev); + int target_phy_mode; + + /* + * port must be 10G capable (i.e. gop port 0) + */ + if (port->gop_id != 0) + return -EINVAL; + + /* + * can't enable both 1G and 10G at the same time + */ + if ((flags & FBX_ALL_EN_MASK) == FBX_ALL_EN_MASK) + return -EINVAL; + + /* + * select proper target phy mode (or return early if non is + * set yet). + */ + if (flags & (1 << FBX_10G_EN_BIT)) + target_phy_mode = PHY_INTERFACE_MODE_10GKR; + else if (flags & (1 << FBX_1G_EN_BIT)) + target_phy_mode = PHY_INTERFACE_MODE_1000BASEX; + else + return 0; + + if (port->phy_interface == target_phy_mode) + return 0; + + netdev_info(dev, "switching PHY interface mode from %s to %s\n", + phy_modes(port->phy_interface), phy_modes(target_phy_mode)); + + if (!netif_running(dev)) { + port->phy_interface = target_phy_mode; + return 0; + } + + mvpp2_stop_dev(port); + + port->phy_interface = target_phy_mode; + phylink_set_interface_mode(port->phylink, target_phy_mode); + + if (port->link_irq) + /* + * link interrupt configuration depends on port PHY + * interface mode. + */ + mvpp22_gop_setup_irq(port); + + mvpp2_start_dev(port); + mvpp2_egress_enable(port); + mvpp2_ingress_enable(port); + + return 0; +} + +static int mvpp2_ethtool_set_priv_flags(struct net_device *dev, u32 flags) +{ + struct mvpp2_port *port = netdev_priv(dev); + + if (flags & (1 << FBX_CLEAR_MIB_BIT)) { + memset(port->ethtool_stats, 0, + sizeof(u64) * MVPP2_N_ETHTOOL_STATS(port->ntxqs, port->nrxqs)); + flags &= ~(1 << FBX_CLEAR_MIB_BIT); + } + + if (!flags) + return 0; + + if (port->gop_id != 0) + /* + * only GOP port ID0 supports 10G speeds. + */ + return -ENOTSUPP; + + port->linkdown_10g_wa_enable = + !!(flags & (1 << FBX_EN_10G_LINKDOWN_WA)); + + if (flags & (1 << FBX_101G_SWITCH_EN_BIT)) + /* set only */ + port->en_fbx_10g1g_switch = true; + + if (!port->en_fbx_10g1g_switch) + return 0; + + return maybe_switch_mode(dev, flags); +} + +static int mvpp2_get_port_sync_ok(struct net_device *dev) +{ + struct mvpp2_port *port = netdev_priv(dev); + struct mvpp2 *priv = port->priv; + u32 v; + + if (!netif_running(dev)) + return 0; + + + if (port->gop_id == 0 && + port->phy_interface == PHY_INTERFACE_MODE_10GKR) { + /* + * on port0 in 10GKR mode, get sync ok from MPCS + * gearbox register, field Lane Locked. + */ + void __iomem *mpcs = priv->iface_base + + MVPP22_MPCS_BASE(port->gop_id); + + v = readl(mpcs + MVPP22_MPCS_GEARBOX_STATUS) & + MVPP22_MPCS_GEARBOX_STATUS_LANELOCK; + } else + /* otherwise default to GMAC SyncOk status.*/ + v = readl(port->base + MVPP2_GMAC_STATUS0) & + MVPP2_GMAC_STATUS0_SYNC_OK; + return !!v; +} + +static u32 mvpp2_ethtool_get_priv_flags(struct net_device *dev) +{ + struct mvpp2_port *port = netdev_priv(dev); + u32 ret = 0; + + + ret |= (!!port->en_fbx_10g1g_switch << FBX_101G_SWITCH_EN_BIT); + if (ret) { + switch (port->phy_interface) { + case PHY_INTERFACE_MODE_1000BASEX: + ret |= (1 << FBX_1G_ST_BIT); + break; + case PHY_INTERFACE_MODE_10GKR: + ret |= (1 << FBX_10G_ST_BIT); + break; + default: + break; + } + } + + ret |= mvpp2_get_port_sync_ok(dev) << FBX_SYNC_OK_BIT; + ret |= (port->linkdown_10g_wa_enable ? 1 : 0) << FBX_EN_10G_LINKDOWN_WA; + + return ret; +} + +/* + * netdevice ->ndo_select_queue() callback + */ +static u16 mvpp2_select_queue(struct net_device *dev, + struct sk_buff *skb, + struct net_device *skb_dev) +{ + if (skb->priority >= TC_PRIO_INTERACTIVE) + return MVPP2_USABLE_TX_QUEUES - 1; + return 0; +} + /* Device ops */ static const struct net_device_ops mvpp2_netdev_ops = { @@ -4373,6 +7044,7 @@ .ndo_vlan_rx_add_vid = mvpp2_vlan_rx_add_vid, .ndo_vlan_rx_kill_vid = mvpp2_vlan_rx_kill_vid, .ndo_set_features = mvpp2_set_features, + .ndo_select_queue = mvpp2_select_queue, }; static const struct ethtool_ops mvpp2_eth_tool_ops = { @@ -4397,6 +7069,8 @@ .set_rxfh = mvpp2_ethtool_set_rxfh, .get_rxfh_context = mvpp2_ethtool_get_rxfh_context, .set_rxfh_context = mvpp2_ethtool_set_rxfh_context, + .set_priv_flags = mvpp2_ethtool_set_priv_flags, + .get_priv_flags = mvpp2_ethtool_get_priv_flags, }; /* Used for PPv2.1, or PPv2.2 with the old Device Tree binding that @@ -4413,6 +7087,7 @@ v->sw_thread_id = 0; v->sw_thread_mask = *cpumask_bits(cpu_online_mask); v->port = port; + v->irq_name[0] = 0; v->irq = irq_of_parse_and_map(port_node, 0); if (v->irq <= 0) return -EINVAL; @@ -4476,6 +7151,7 @@ ret = -EINVAL; goto err; } + strlcpy(v->irq_name, irqname, sizeof (v->irq_name)); netif_napi_add(port->dev, &v->napi, mvpp2_poll, NAPI_POLL_WEIGHT); @@ -5192,7 +7868,7 @@ /* Ports initialization */ static int mvpp2_port_probe(struct platform_device *pdev, struct fwnode_handle *port_fwnode, - struct mvpp2 *priv) + struct mvpp2 *priv, int index) { struct phy *comphy = NULL; struct mvpp2_port *port; @@ -5208,6 +7884,7 @@ u32 id; int phy_mode; int err, i; + struct device_node *mdio_node; has_tx_irqs = mvpp2_port_has_irqs(priv, port_node, &flags); if (!has_tx_irqs && queue_mode == MVPP2_QDIST_MULTI_MODE) { @@ -5262,6 +7939,15 @@ port->has_tx_irqs = has_tx_irqs; port->flags = flags; + mdio_node = of_parse_phandle(port_node, "mdio-bus", 0); + if (mdio_node) { + port->mii_bus = of_mdio_find_bus(mdio_node); + if (!port->mii_bus) { + err = -EPROBE_DEFER; + goto err_free_netdev; + } + } + err = mvpp2_queue_vectors_init(port, port_node); if (err) goto err_free_netdev; @@ -5338,6 +8024,8 @@ port->tx_ring_size = MVPP2_MAX_TXD_DFLT; port->rx_ring_size = MVPP2_MAX_RXD_DFLT; SET_NETDEV_DEV(dev, &pdev->dev); + port->index = index; + dev->dev_port = index; err = mvpp2_port_init(port); if (err < 0) { @@ -5417,6 +8105,11 @@ priv->port_list[priv->port_count++] = port; +#ifdef CONFIG_MVPP2_FBX_FF + port->ff_notifier.notifier_call = ff_device_event; + register_netdevice_notifier(&port->ff_notifier); +#endif + return 0; err_phylink: @@ -5444,6 +8137,10 @@ { int i; +#ifdef CONFIG_MVPP2_FBX_FF + unregister_netdevice_notifier(&port->ff_notifier); +#endif + unregister_netdev(port->dev); if (port->phylink) phylink_destroy(port->phylink); @@ -5698,6 +8395,10 @@ int i, shared; int err; +#ifdef CONFIG_MVPP2_FBX_FF + ff_init(&pdev->dev); +#endif + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; @@ -5745,6 +8446,19 @@ return PTR_ERR(priv->iface_base); } +#ifdef CONFIG_MVPP2_FBX_FF + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res->start == 0xf2000000) { + priv->id = 0; + } else if (res->start == 0xf4000000) { + priv->id = 1; + } else { + WARN(1, "unknown mvpp2 unit for fastpath: %llx\n", + res->start); + } +#endif + + if (priv->hw_version == MVPP22 && dev_of_node(&pdev->dev)) { priv->sysctrl_base = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, @@ -5759,8 +8473,11 @@ } if (priv->hw_version == MVPP22 && - mvpp2_get_nrxqs(priv) * 2 <= MVPP2_BM_MAX_POOLS) + mvpp2_get_nrxqs(priv) * 2 <= MVPP2_BM_MAX_POOLS) { +#ifndef CONFIG_MVPP2_FBX_FF priv->percpu_pools = 1; +#endif + } mvpp2_setup_bm_pool(); @@ -5866,10 +8583,12 @@ } /* Initialize ports */ + i = 0; fwnode_for_each_available_child_node(fwnode, port_fwnode) { - err = mvpp2_port_probe(pdev, port_fwnode, priv); + err = mvpp2_port_probe(pdev, port_fwnode, priv, i); if (err < 0) goto err_port_probe; + ++i; } if (priv->port_count == 0) { diff -ruw linux-5.4.60/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c linux-5.4.60-fbx/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c --- linux-5.4.60/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c 2021-03-04 13:20:59.164172284 +0100 @@ -1283,32 +1283,6 @@ struct mvpp2_prs_entry pe; int tid; - /* Ethertype: PPPoE */ - tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, - MVPP2_PE_LAST_FREE_TID); - if (tid < 0) - return tid; - - memset(&pe, 0, sizeof(pe)); - mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_L2); - pe.index = tid; - - mvpp2_prs_match_etype(&pe, 0, ETH_P_PPP_SES); - - mvpp2_prs_sram_shift_set(&pe, MVPP2_PPPOE_HDR_SIZE, - MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD); - mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_PPPOE); - mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_PPPOE_MASK, - MVPP2_PRS_RI_PPPOE_MASK); - - /* Update shadow table and hw entry */ - mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_L2); - priv->prs_shadow[pe.index].udf = MVPP2_PRS_UDF_L2_DEF; - priv->prs_shadow[pe.index].finish = false; - mvpp2_prs_shadow_ri_set(priv, pe.index, MVPP2_PRS_RI_PPPOE_MASK, - MVPP2_PRS_RI_PPPOE_MASK); - mvpp2_prs_hw_write(priv, &pe); - /* Ethertype: ARP */ tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, MVPP2_PE_LAST_FREE_TID); @@ -1576,117 +1550,6 @@ return 0; } -/* Set entries for PPPoE ethertype */ -static int mvpp2_prs_pppoe_init(struct mvpp2 *priv) -{ - struct mvpp2_prs_entry pe; - int tid; - - /* IPv4 over PPPoE with options */ - tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, - MVPP2_PE_LAST_FREE_TID); - if (tid < 0) - return tid; - - memset(&pe, 0, sizeof(pe)); - mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_PPPOE); - pe.index = tid; - - mvpp2_prs_match_etype(&pe, 0, PPP_IP); - - mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_IP4); - mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4_OPT, - MVPP2_PRS_RI_L3_PROTO_MASK); - /* Skip eth_type + 4 bytes of IP header */ - mvpp2_prs_sram_shift_set(&pe, MVPP2_ETH_TYPE_LEN + 4, - MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD); - /* Set L3 offset */ - mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L3, - MVPP2_ETH_TYPE_LEN, - MVPP2_PRS_SRAM_OP_SEL_UDF_ADD); - - /* Update shadow table and hw entry */ - mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE); - mvpp2_prs_hw_write(priv, &pe); - - /* IPv4 over PPPoE without options */ - tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, - MVPP2_PE_LAST_FREE_TID); - if (tid < 0) - return tid; - - pe.index = tid; - - mvpp2_prs_tcam_data_byte_set(&pe, MVPP2_ETH_TYPE_LEN, - MVPP2_PRS_IPV4_HEAD | MVPP2_PRS_IPV4_IHL, - MVPP2_PRS_IPV4_HEAD_MASK | - MVPP2_PRS_IPV4_IHL_MASK); - - /* Clear ri before updating */ - pe.sram[MVPP2_PRS_SRAM_RI_WORD] = 0x0; - pe.sram[MVPP2_PRS_SRAM_RI_CTRL_WORD] = 0x0; - mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4, - MVPP2_PRS_RI_L3_PROTO_MASK); - - /* Update shadow table and hw entry */ - mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE); - mvpp2_prs_hw_write(priv, &pe); - - /* IPv6 over PPPoE */ - tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, - MVPP2_PE_LAST_FREE_TID); - if (tid < 0) - return tid; - - memset(&pe, 0, sizeof(pe)); - mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_PPPOE); - pe.index = tid; - - mvpp2_prs_match_etype(&pe, 0, PPP_IPV6); - - mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_IP6); - mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP6, - MVPP2_PRS_RI_L3_PROTO_MASK); - /* Skip eth_type + 4 bytes of IPv6 header */ - mvpp2_prs_sram_shift_set(&pe, MVPP2_ETH_TYPE_LEN + 4, - MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD); - /* Set L3 offset */ - mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L3, - MVPP2_ETH_TYPE_LEN, - MVPP2_PRS_SRAM_OP_SEL_UDF_ADD); - - /* Update shadow table and hw entry */ - mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE); - mvpp2_prs_hw_write(priv, &pe); - - /* Non-IP over PPPoE */ - tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID, - MVPP2_PE_LAST_FREE_TID); - if (tid < 0) - return tid; - - memset(&pe, 0, sizeof(pe)); - mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_PPPOE); - pe.index = tid; - - mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_UN, - MVPP2_PRS_RI_L3_PROTO_MASK); - - /* Finished: go to flowid generation */ - mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_FLOWS); - mvpp2_prs_sram_bits_set(&pe, MVPP2_PRS_SRAM_LU_GEN_BIT, 1); - /* Set L3 offset even if it's unknown L3 */ - mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L3, - MVPP2_ETH_TYPE_LEN, - MVPP2_PRS_SRAM_OP_SEL_UDF_ADD); - - /* Update shadow table and hw entry */ - mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE); - mvpp2_prs_hw_write(priv, &pe); - - return 0; -} - /* Initialize entries for IPv4 */ static int mvpp2_prs_ip4_init(struct mvpp2 *priv) { @@ -2144,10 +2007,6 @@ if (err) return err; - err = mvpp2_prs_pppoe_init(priv); - if (err) - return err; - err = mvpp2_prs_ip6_init(priv); if (err) return err; diff -ruw linux-5.4.60/drivers/net/phy/mdio_bus.c linux-5.4.60-fbx/drivers/net/phy/mdio_bus.c --- linux-5.4.60/drivers/net/phy/mdio_bus.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/mdio_bus.c 2021-03-04 13:20:59.290838956 +0100 @@ -404,8 +404,16 @@ bus->reset_gpiod = gpiod; gpiod_set_value_cansleep(gpiod, 1); + if (bus->reset_delay_us < 1000) udelay(bus->reset_delay_us); + else + mdelay(bus->reset_delay_us / 1000); + gpiod_set_value_cansleep(gpiod, 0); + if (bus->reset_delay_us < 1000) + udelay(bus->reset_delay_us); + else + mdelay(bus->reset_delay_us / 1000); } if (bus->reset) diff -ruw linux-5.4.60/drivers/net/phy/phy.c linux-5.4.60-fbx/drivers/net/phy/phy.c --- linux-5.4.60/drivers/net/phy/phy.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/phy.c 2021-03-04 13:20:59.290838956 +0100 @@ -29,7 +29,7 @@ #include #include -#define PHY_STATE_TIME HZ +#define PHY_STATE_TIME (HZ / 2) #define PHY_STATE_STR(_state) \ case PHY_##_state: \ diff -ruw linux-5.4.60/drivers/net/phy/phy-core.c linux-5.4.60-fbx/drivers/net/phy/phy-core.c --- linux-5.4.60/drivers/net/phy/phy-core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/phy-core.c 2021-03-04 13:20:59.290838956 +0100 @@ -8,7 +8,7 @@ const char *phy_speed_to_str(int speed) { - BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 69, + BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 75, "Enum ethtool_link_mode_bit_indices and phylib are out of sync. " "If a speed or mode has been added please update phy_speed_to_str " "and the PHY settings array.\n"); @@ -113,6 +113,10 @@ PHY_SETTING( 20000, FULL, 20000baseKR2_Full ), PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ), /* 10G */ + PHY_SETTING( 10000, FULL, 10000_1000basePRX_D_Full ), + PHY_SETTING( 10000, FULL, 10000_1000basePRX_U_Full ), + PHY_SETTING( 10000, FULL, 10000basePR_D_Full ), + PHY_SETTING( 10000, FULL, 10000basePR_U_Full ), PHY_SETTING( 10000, FULL, 10000baseCR_Full ), PHY_SETTING( 10000, FULL, 10000baseER_Full ), PHY_SETTING( 10000, FULL, 10000baseKR_Full ), @@ -128,6 +132,8 @@ PHY_SETTING( 2500, FULL, 2500baseT_Full ), PHY_SETTING( 2500, FULL, 2500baseX_Full ), /* 1G */ + PHY_SETTING( 1000, FULL, 1000basePX_D_Full ), + PHY_SETTING( 1000, FULL, 1000basePX_U_Full ), PHY_SETTING( 1000, FULL, 1000baseKX_Full ), PHY_SETTING( 1000, FULL, 1000baseT_Full ), PHY_SETTING( 1000, HALF, 1000baseT_Half ), diff -ruw linux-5.4.60/drivers/net/phy/phy_device.c linux-5.4.60-fbx/drivers/net/phy/phy_device.c --- linux-5.4.60/drivers/net/phy/phy_device.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/phy_device.c 2021-03-04 13:20:59.290838956 +0100 @@ -1767,7 +1767,7 @@ * drops can be detected. Do not double-read the status * in polling mode to detect such short link drops. */ - if (!phy_polling_mode(phydev)) { + if (!phy_polling_mode(phydev) || !phydev->link) { status = phy_read(phydev, MII_BMSR); if (status < 0) return status; diff -ruw linux-5.4.60/drivers/net/phy/phylink.c linux-5.4.60-fbx/drivers/net/phy/phylink.c --- linux-5.4.60/drivers/net/phy/phylink.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/phylink.c 2021-03-04 13:20:59.290838956 +0100 @@ -311,6 +311,25 @@ phylink_set(pl->supported, 10000baseER_Full); break; + case PHY_INTERFACE_MODE_1000BASEPX_D: + phylink_set(pl->supported, 1000basePX_D_Full); + break; + case PHY_INTERFACE_MODE_1000BASEPX_U: + phylink_set(pl->supported, 1000basePX_U_Full); + break; + case PHY_INTERFACE_MODE_10000BASEPR_D: + phylink_set(pl->supported, 10000basePR_D_Full); + break; + case PHY_INTERFACE_MODE_10000BASEPR_U: + phylink_set(pl->supported, 10000basePR_U_Full); + break; + case PHY_INTERFACE_MODE_10000_1000_BASEPRX_D: + phylink_set(pl->supported, 10000_1000basePRX_D_Full); + break; + case PHY_INTERFACE_MODE_10000_1000_BASEPRX_U: + phylink_set(pl->supported, 10000_1000basePRX_U_Full); + break; + default: phylink_err(pl, "incorrect link mode %s for in-band status\n", @@ -1853,4 +1872,34 @@ } EXPORT_SYMBOL_GPL(phylink_helper_basex_speed); +int phylink_set_interface_mode(struct phylink *pl, int mode) +{ + int err; + + pl->link_config.interface = mode; + err = phylink_validate(pl, pl->supported, &pl->link_config); + if (err) + pr_err("unable to validate phylink new interface mode.\n"); + + return err; + +} +EXPORT_SYMBOL_GPL(phylink_set_interface_mode); + +void phylink_revalidate(struct phylink *pl) +{ + linkmode_zero(pl->supported); + phylink_set(pl->supported, MII); + phylink_set(pl->supported, Autoneg); + phylink_set(pl->supported, Asym_Pause); + phylink_set(pl->supported, Pause); + pl->link_config.an_enabled = true; + pl->link_an_mode = MLO_AN_INBAND; + pl->link_interface = PHY_INTERFACE_MODE_NA; + linkmode_copy(pl->link_config.advertising, pl->supported); + phylink_validate(pl, pl->supported, &pl->link_config); + +} +EXPORT_SYMBOL_GPL(phylink_revalidate); + MODULE_LICENSE("GPL v2"); diff -ruw linux-5.4.60/drivers/net/phy/sfp-bus.c linux-5.4.60-fbx/drivers/net/phy/sfp-bus.c --- linux-5.4.60/drivers/net/phy/sfp-bus.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/sfp-bus.c 2021-03-04 13:20:59.294172289 +0100 @@ -479,6 +479,15 @@ } EXPORT_SYMBOL_GPL(sfp_get_module_eeprom); +/* + * sfp_get_sfp_state + */ +int sfp_get_sfp_state(struct sfp_bus *bus, struct ethtool_sfp_state *st) +{ + return bus->socket_ops->get_sfp_state(bus->sfp, st); +} +EXPORT_SYMBOL_GPL(sfp_get_sfp_state); + /** * sfp_upstream_start() - Inform the SFP that the network device is up * @bus: a pointer to the &struct sfp_bus structure for the sfp module diff -ruw linux-5.4.60/drivers/net/phy/sfp.c linux-5.4.60-fbx/drivers/net/phy/sfp.c --- linux-5.4.60/drivers/net/phy/sfp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/sfp.c 2021-03-04 13:20:59.294172289 +0100 @@ -26,6 +26,7 @@ GPIO_TX_FAULT, GPIO_TX_DISABLE, GPIO_RATE_SELECT, + GPIO_POWER_ENABLE, GPIO_MAX, SFP_F_PRESENT = BIT(GPIO_MODDEF0), @@ -33,6 +34,7 @@ SFP_F_TX_FAULT = BIT(GPIO_TX_FAULT), SFP_F_TX_DISABLE = BIT(GPIO_TX_DISABLE), SFP_F_RATE_SELECT = BIT(GPIO_RATE_SELECT), + SFP_F_POWER_ENABLE = BIT(GPIO_POWER_ENABLE), SFP_E_INSERT = 0, SFP_E_REMOVE, @@ -131,6 +133,7 @@ "tx-fault", "tx-disable", "rate-select0", + "pwr-enable", }; static const enum gpiod_flags gpio_flags[] = { @@ -139,6 +142,7 @@ GPIOD_IN, GPIOD_ASIS, GPIOD_ASIS, + GPIOD_ASIS, }; #define T_INIT_JIFFIES msecs_to_jiffies(300) @@ -178,6 +182,7 @@ struct phy_device *mod_phy; const struct sff_data *type; u32 max_power_mW; + bool force_1000baset_as_1000basex; unsigned int (*get_state)(struct sfp *); void (*set_state)(struct sfp *, unsigned int); @@ -226,7 +231,7 @@ static const struct sff_data sfp_data = { .gpios = SFP_F_PRESENT | SFP_F_LOS | SFP_F_TX_FAULT | - SFP_F_TX_DISABLE | SFP_F_RATE_SELECT, + SFP_F_TX_DISABLE | SFP_F_RATE_SELECT | SFP_F_POWER_ENABLE, .module_supported = sfp_module_supported, }; @@ -264,6 +269,8 @@ { if (state & SFP_F_PRESENT) { /* If the module is present, drive the signals */ + if (sfp->gpio[GPIO_POWER_ENABLE]) + gpiod_direction_output(sfp->gpio[GPIO_POWER_ENABLE], 1); if (sfp->gpio[GPIO_TX_DISABLE]) gpiod_direction_output(sfp->gpio[GPIO_TX_DISABLE], state & SFP_F_TX_DISABLE); @@ -272,6 +279,8 @@ state & SFP_F_RATE_SELECT); } else { /* Otherwise, let them float to the pull-ups */ + if (sfp->gpio[GPIO_POWER_ENABLE]) + gpiod_direction_output(sfp->gpio[GPIO_POWER_ENABLE], 0); if (sfp->gpio[GPIO_TX_DISABLE]) gpiod_direction_input(sfp->gpio[GPIO_TX_DISABLE]); if (state & SFP_F_RATE_SELECT) @@ -1495,6 +1504,11 @@ } } + if (sfp->force_1000baset_as_1000basex && id.base.e1000_base_t) { + id.base.e1000_base_t = 0; + id.base.e1000_base_sx = 1; + } + sfp->id = id; dev_info(sfp->dev, "module %.*s %.*s rev %.*s sn %.*s dc %.*s\n", @@ -1763,6 +1777,47 @@ return 0; } +static inline u32 to_ethtool_sfp_state(int my_state) +{ + switch (my_state) { + case SFP_S_DOWN: + return ETHTOOL_SFP_S_DOWN; + case SFP_S_INIT: + return ETHTOOL_SFP_S_INIT; + case SFP_S_WAIT_LOS: + return ETHTOOL_SFP_S_WAIT_LOS; + case SFP_S_LINK_UP: + return ETHTOOL_SFP_S_LINK_UP; + case SFP_S_TX_FAULT: + return ETHTOOL_SFP_S_TX_FAULT; + case SFP_S_REINIT: + return ETHTOOL_SFP_S_REINIT; + case SFP_S_TX_DISABLE: + return ETHTOOL_SFP_S_TX_DISABLE; + default: + return 0xffffffff; + } +} + +static int sfp_state(struct sfp *sfp, struct ethtool_sfp_state *st) +{ + memset(st, 0, sizeof (*st)); + + st->fsm_state = to_ethtool_sfp_state(sfp->sm_state); + + st->i_presence = !(sfp->state & SFP_F_PRESENT); + st->i_rxlos = !!(sfp->state & SFP_F_LOS); + st->i_txfault = !!(sfp->state & SFP_F_TX_FAULT); + + /* + * pwren is unconditionally driven whenever an SFP is present. + */ + st->o_pwren = (sfp->state & SFP_F_PRESENT); + st->o_txdis = !!(sfp->state & SFP_F_TX_DISABLE); + + return 0; +} + static const struct sfp_socket_ops sfp_module_ops = { .attach = sfp_attach, .detach = sfp_detach, @@ -1770,6 +1825,7 @@ .stop = sfp_stop, .module_info = sfp_module_info, .module_eeprom = sfp_module_eeprom, + .get_sfp_state = sfp_state, }; static void sfp_timeout(struct work_struct *work) @@ -1954,6 +2010,9 @@ dev_info(sfp->dev, "Host maximum power %u.%uW\n", sfp->max_power_mW / 1000, (sfp->max_power_mW / 100) % 10); + sfp->force_1000baset_as_1000basex = + device_property_present(&pdev->dev, "force-1000baset-as-1000basex"); + /* Get the initial state, and always signal TX disable, * since the network interface will not be up. */ diff -ruw linux-5.4.60/drivers/net/phy/sfp.h linux-5.4.60-fbx/drivers/net/phy/sfp.h --- linux-5.4.60/drivers/net/phy/sfp.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/sfp.h 2021-03-04 13:20:59.294172289 +0100 @@ -14,6 +14,7 @@ int (*module_info)(struct sfp *sfp, struct ethtool_modinfo *modinfo); int (*module_eeprom)(struct sfp *sfp, struct ethtool_eeprom *ee, u8 *data); + int (*get_sfp_state)(struct sfp *sfp, struct ethtool_sfp_state *st); }; int sfp_add_phy(struct sfp_bus *bus, struct phy_device *phydev); diff -ruw linux-5.4.60/drivers/net/phy/swphy.c linux-5.4.60-fbx/drivers/net/phy/swphy.c --- linux-5.4.60/drivers/net/phy/swphy.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/phy/swphy.c 2021-03-04 13:20:59.294172289 +0100 @@ -29,6 +29,7 @@ SWMII_SPEED_10 = 0, SWMII_SPEED_100, SWMII_SPEED_1000, + SWMII_SPEED_2500, SWMII_DUPLEX_HALF = 0, SWMII_DUPLEX_FULL, }; @@ -51,6 +52,10 @@ .lpagb = LPA_1000FULL | LPA_1000HALF, .estat = ESTATUS_1000_TFULL | ESTATUS_1000_THALF, }, + [SWMII_SPEED_2500] = { + .bmsr = BMSR_ESTATEN, + .lpagb = LPA_1000FULL | LPA_1000HALF, + }, }; static const struct swmii_regs duplex[] = { @@ -71,6 +76,8 @@ static int swphy_decode_speed(int speed) { switch (speed) { + case 2500: + return SWMII_SPEED_2500; case 1000: return SWMII_SPEED_1000; case 100: diff -ruw linux-5.4.60/drivers/net/ppp/ppp_generic.c linux-5.4.60-fbx/drivers/net/ppp/ppp_generic.c --- linux-5.4.60/drivers/net/ppp/ppp_generic.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ppp/ppp_generic.c 2021-03-04 13:20:59.294172289 +0100 @@ -174,6 +174,7 @@ struct ppp *ppp; /* ppp unit we're connected to */ struct net *chan_net; /* the net channel belongs to */ struct list_head clist; /* link in list of channels per unit */ + int stopped; /* channel is stopped */ rwlock_t upl; /* protects `ppp' */ #ifdef CONFIG_PPP_MULTILINK u8 avail; /* flag used in multilink stuff */ @@ -1409,10 +1410,28 @@ ppp_send_frame(ppp, skb); /* If there's no work left to do, tell the core net code that we can accept some more. */ - if (!ppp->xmit_pending && !skb_peek(&ppp->file.xq)) + if (!ppp->xmit_pending && !skb_peek(&ppp->file.xq)) { + /* only enable net queue if at least one + * channel is not stopped */ + struct list_head *list; + struct channel *pch; + bool need_wake; + + list = &ppp->channels; + need_wake = false; + while ((list = list->next) != &ppp->channels) { + pch = list_entry(list, struct channel, clist); + if (!pch->stopped) { + need_wake = true; + break; + } + } + + if (need_wake) netif_wake_queue(ppp->dev); else netif_stop_queue(ppp->dev); + } } else { kfree_skb(skb); } @@ -2725,10 +2744,24 @@ if (!pch) return; + pch->stopped = 0; ppp_channel_push(pch); } /* + * Callback from a channel when it want to prevent further transmit on it + */ +void +ppp_output_stop(struct ppp_channel *chan) +{ + struct channel *pch = chan->ppp; + + if (pch == 0) + return; + pch->stopped = 1; +} + +/* * Compression control. */ @@ -3325,6 +3358,7 @@ EXPORT_SYMBOL(ppp_input); EXPORT_SYMBOL(ppp_input_error); EXPORT_SYMBOL(ppp_output_wakeup); +EXPORT_SYMBOL(ppp_output_stop); EXPORT_SYMBOL(ppp_register_compressor); EXPORT_SYMBOL(ppp_unregister_compressor); MODULE_LICENSE("GPL"); diff -ruw linux-5.4.60/drivers/net/ppp/pptp.c linux-5.4.60-fbx/drivers/net/ppp/pptp.c --- linux-5.4.60/drivers/net/ppp/pptp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/ppp/pptp.c 2021-03-04 13:20:59.294172289 +0100 @@ -358,6 +358,7 @@ po = lookup_chan(htons(header->call_id), iph->saddr); if (po) { skb_dst_drop(skb); + skb->mark = 0; nf_reset_ct(skb); return sk_receive_skb(sk_pppox(po), skb, 0); } diff -ruw linux-5.4.60/drivers/net/tun.c linux-5.4.60-fbx/drivers/net/tun.c --- linux-5.4.60/drivers/net/tun.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/tun.c 2021-03-04 13:20:59.297505623 +0100 @@ -68,6 +68,10 @@ #include #include #include +#include +#include +#include +#include #include #include @@ -194,6 +198,31 @@ unsigned long updated ____cacheline_aligned_in_smp; }; +/* + * smalltun definitions + */ +#define SMALLTUN_MAGIC 0x6660 +#define SMALLTUN_VERSION 0x1 + +#define TYPE_MASK 0xf +#define TYPE_CLT (1 << 3) + +#define TYPE_TRIGGER 0x0 +#define TYPE_CHALLENGE 0x1 +#define TYPE_CLIENT_HELLO 0x2 +#define TYPE_SERVER_HELLO 0x3 + +#define TYPE_CLT_DATA (TYPE_CLT | 0x0) +#define TYPE_CLT_GET_PARAMS (TYPE_CLT | 0x1) +#define TYPE_CLT_PARAMS (TYPE_CLT | 0x2) + +struct smalltun_pkt_hdr { + u16 magic; + u8 version; + u8 flag_type; + u8 data[0]; +}; + #define TUN_NUM_FLOW_ENTRIES 1024 #define TUN_MASK_FLOW_ENTRIES (TUN_NUM_FLOW_ENTRIES - 1) @@ -213,6 +242,11 @@ kuid_t owner; kgid_t group; + struct smalltun_fp smalltun_fps[4]; + unsigned int smalltun_valid_count; + unsigned int smalltun_valid[4]; + struct rtable *smalltun_rt_cache[4]; + struct net_device *dev; netdev_features_t set_features; #define TUN_USER_FEATURES (NETIF_F_HW_CSUM|NETIF_F_TSO_ECN|NETIF_F_TSO| \ @@ -1027,6 +1061,184 @@ return 0; } +static int smalltun_is_fastpath(struct tun_struct *tun, + struct sk_buff *skb) +{ + struct iphdr *iph; + const struct smalltun_fp *fp; + struct rtable **prt_cache, *rt_cache; + struct flowi4 fl; + bool match; + size_t i; + + if (!tun->smalltun_valid_count) + return 0; + + if (skb->protocol != htons(ETH_P_IP)) + return 0; + + if (!pskb_may_pull(skb, sizeof(struct iphdr))) + return 0; + + iph = ip_hdr(skb); + + /* lookup smalltun fastpath */ + fp = NULL; + rt_cache = NULL; + for (i = 0; i < ARRAY_SIZE(tun->smalltun_fps); i++) { + if (!tun->smalltun_valid[i]) + continue; + + if (iph->daddr == tun->smalltun_fps[i].inner_dst) { + fp = &tun->smalltun_fps[i]; + prt_cache = &tun->smalltun_rt_cache[i]; + break; + } + } + + if (!fp) + return 0; + + if (fp->af != AF_INET) { + /* FIXME: implement IPv6 transport */ + return 0; + } + + if (!pskb_may_pull(skb, iph->ihl * 4)) + return 0; + + match = false; + for (i = 0; i < fp->rule_count; i++) { + const struct smalltun_rule *r = &fp->rules[i]; + unsigned int sport, dport; + + if (iph->protocol != r->proto) + continue; + + switch (iph->protocol) { + case IPPROTO_UDP: + { + const struct udphdr *udp; + udp = (struct udphdr *)((u8 *)iph + (iph->ihl << 2)); + sport = ntohs(udp->source); + dport = ntohs(udp->dest); + break; + } + case IPPROTO_TCP: + { + const struct tcphdr *tcp; + tcp = (struct tcphdr *)((u8 *)iph + (iph->ihl << 2)); + sport = ntohs(tcp->source); + dport = ntohs(tcp->dest); + break; + } + default: + match = true; + break; + } + + if (match) + break; + + if (r->src_port_start && r->src_port_end) { + if (sport < ntohs(r->src_port_start) || + sport > ntohs(r->src_port_end)) + continue; + } + + if (r->dst_port_start && r->dst_port_end) { + if (dport < ntohs(r->dst_port_start) || + dport > ntohs(r->dst_port_end)) + continue; + } + match = true; + } + + if (!match) + return 0; + + if (fp->af == AF_INET) { + struct iphdr *oiph; + struct udphdr *oudph; + struct smalltun_pkt_hdr *pkt; + unsigned int payload_len; + + payload_len = skb->len; + + if (skb_cow_head(skb, + sizeof (struct iphdr) + + sizeof (struct udphdr) + + sizeof (struct smalltun_pkt_hdr))) + return 0; + + pkt = skb_push(skb, sizeof (struct smalltun_pkt_hdr)); + oudph = skb_push(skb, sizeof (struct udphdr)); + skb_reset_transport_header(skb); + oiph = skb_push(skb, sizeof (struct iphdr)); + skb_reset_network_header(skb); + + /* ip */ + oiph->version = 4; + oiph->tos = 0; + oiph->id = 0; + oiph->ihl = 5; + oiph->frag_off = 0; + oiph->ttl = 64; + oiph->protocol = IPPROTO_UDP; + memcpy(&oiph->saddr, fp->outer_src, 4); + memcpy(&oiph->daddr, fp->outer_dst, 4); + + /* udp */ + oudph->source = fp->outer_src_port; + oudph->dest = fp->outer_dst_port; + oudph->len = htons(payload_len + sizeof (*oudph) + + sizeof (*pkt)); + oudph->check = 0; + + /* smalltun */ + pkt->magic = htons(SMALLTUN_MAGIC); + pkt->version = SMALLTUN_VERSION; + pkt->flag_type = TYPE_CLT_DATA; + + memset(&fl, 0x00, sizeof (fl)); + memcpy(&fl.saddr, fp->outer_src, 4); + memcpy(&fl.daddr, fp->outer_dst, 4); + + if (*prt_cache && (*prt_cache)->dst.obsolete > 0) { + rt_cache = *prt_cache; + *prt_cache = NULL; + ip_rt_put(rt_cache); + } + + rt_cache = *prt_cache; + if (!rt_cache) { + rt_cache = ip_route_output_key(&init_net, &fl); + if (IS_ERR(rt_cache)) { + pr_err("ip_route_output_key(%pI4): %li\n", + &fl.daddr, PTR_ERR(rt_cache)); + return 0; + } + + if (!rt_cache->dst.dev) { + pr_err("ip_route_output_key(%pI4): no dev\n", + &fl.daddr); + return 0; + } + + *prt_cache = rt_cache; + } + + skb_dst_set(skb, dst_clone(&rt_cache->dst)); + skb->dev = skb_dst(skb)->dev; + ip_local_out(&init_net, NULL, skb); + return 1; + } + + /* find route */ + + return 0; +} + /* Net device start xmit */ static void tun_automq_xmit(struct tun_struct *tun, struct sk_buff *skb) { @@ -1104,6 +1316,11 @@ */ skb_orphan(skb); + if (smalltun_is_fastpath(tun, skb)) { + rcu_read_unlock(); + return NETDEV_TX_OK; + } + nf_reset_ct(skb); if (ptr_ring_produce(&tfile->tx_ring, skb)) @@ -3347,6 +3564,100 @@ ret = open_related_ns(&net->ns, get_net_ns); break; + case TUNSMALLTUNSETFP: + { + struct smalltun_fp fp; + unsigned int i; + int free_idx; + + ret = -EFAULT; + if (copy_from_user(&fp, argp, sizeof(fp))) + break; + + /* look for duplicate */ + ret = 0; + free_idx = -1; + for (i = 0; i < ARRAY_SIZE(tun->smalltun_fps); i++) { + if (!tun->smalltun_valid[i]) { + if (free_idx == -1) + free_idx = i; + continue; + } + + if (fp.inner_src == tun->smalltun_fps[i].inner_src && + fp.inner_dst == tun->smalltun_fps[i].inner_dst) { + ret = -EEXIST; + break; + } + } + + if (ret) + break; + + if (free_idx == -1) { + ret = -ENOSPC; + break; + } + + memcpy(&tun->smalltun_fps[free_idx], &fp, sizeof (fp)); + tun->smalltun_valid[free_idx] = 1; + tun->smalltun_valid_count++; + tun_debug(KERN_INFO, tun, "new fp rule for %pI4 <=> %pI4 (%u rules)\n", + &fp.inner_src, + &fp.inner_dst, + fp.rule_count); + + if (fp.af == AF_INET) { + tun_debug(KERN_INFO, tun, "outer %pI4:%u <=> %pI4:%u\n", + fp.outer_src, + ntohs(fp.outer_src_port), + fp.outer_dst, + ntohs(fp.outer_dst_port)); + } else { + tun_debug(KERN_INFO, tun, "outer %pI6:%u <=> %pI6:%u\n", + fp.outer_src, + ntohs(fp.outer_src_port), + fp.outer_dst, + ntohs(fp.outer_dst_port)); + } + break; + } + + case TUNSMALLTUNDELFP: + { + struct smalltun_fp fp; + unsigned int i; + + ret = -EFAULT; + if (copy_from_user(&fp, argp, sizeof(fp))) + break; + + /* lookup */ + ret = -ENOENT; + for (i = 0; i < ARRAY_SIZE(tun->smalltun_fps); i++) { + if (fp.inner_src == tun->smalltun_fps[i].inner_src && + fp.inner_dst == tun->smalltun_fps[i].inner_dst) { + ret = 0; + break; + } + } + + if (ret) + break; + + tun->smalltun_valid[i] = 0; + tun->smalltun_valid_count--; + if (tun->smalltun_rt_cache[i]) { + ip_rt_put(tun->smalltun_rt_cache[i]); + tun->smalltun_rt_cache[i] = NULL; + } + + tun_debug(KERN_INFO, tun, "removed fp rule for %pI4 <=> %pI4\n", + &fp.inner_src, + &fp.inner_dst); + break; + } + default: ret = -EINVAL; break; diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/core.c linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/core.c --- linux-5.4.60/drivers/net/wireless/ath/ath10k/core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/core.c 2021-03-04 13:20:59.314172291 +0100 @@ -88,6 +88,7 @@ .rri_on_ddr = false, .hw_filter_reset_required = true, .fw_diag_ce_download = false, + .uart_pin_workaround = true, .tx_stats_over_pktlog = true, }, { @@ -1090,6 +1091,7 @@ static int ath10k_fetch_cal_file(struct ath10k *ar) { char filename[100]; + unsigned int i; /* pre-cal--.bin */ scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", @@ -1103,6 +1105,11 @@ scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); + for (i = 0; filename[i]; i++) { + if (filename[i] == ':') + filename[i] = '_'; + } + ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); if (IS_ERR(ar->cal_file)) /* calibration file is optional, don't print any warnings */ @@ -2221,6 +2228,7 @@ switch (ar->state) { case ATH10K_STATE_ON: + case ATH10K_STATE_PRE_ON: ar->state = ATH10K_STATE_RESTARTING; ath10k_halt(ar); ath10k_scan_finish(ar); diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/core.h linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/core.h --- linux-5.4.60/drivers/net/wireless/ath/ath10k/core.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/core.h 2021-03-04 13:20:59.314172291 +0100 @@ -646,10 +646,12 @@ void *cal_data; u32 enable_extd_tx_stats; u8 fw_dbglog_mode; + u32 burst_dur[4]; }; enum ath10k_state { ATH10K_STATE_OFF = 0, + ATH10K_STATE_PRE_ON, ATH10K_STATE_ON, /* When doing firmware recovery the device is first powered down. @@ -946,6 +948,7 @@ struct ieee80211_ops *ops; struct device *dev; u8 mac_addr[ETH_ALEN]; + const char *fem_name; enum ath10k_hw_rev hw_rev; u16 dev_id; @@ -1120,6 +1123,8 @@ struct work_struct register_work; struct work_struct restart_work; + struct work_struct powerup_work; + bool powerup_pending; /* cycle count is reported twice for each visited channel during scan. * access protected by data_lock diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/debug.c linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/debug.c --- linux-5.4.60/drivers/net/wireless/ath/ath10k/debug.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/debug.c 2021-03-04 13:20:59.314172291 +0100 @@ -2510,6 +2510,79 @@ .llseek = default_llseek, }; +static ssize_t ath10k_write_burst_dur(struct file *file, const char __user *user_buf, + size_t count, loff_t *ppos) +{ + + struct ath10k *ar = file->private_data; + u32 dur[4]; + int ret; + int ac; + char buf[128]; + + simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, user_buf, count); + + /* make sure that buf is null terminated */ + buf[sizeof(buf) - 1] = 0; + + ret = sscanf(buf, "%u %u %u %u", &dur[0], &dur[1], &dur[2], &dur[3]); + + if (!ret) + return -EINVAL; + + mutex_lock(&ar->conf_mutex); + + if (ar->state != ATH10K_STATE_ON && + ar->state != ATH10K_STATE_RESTARTED) { + ret = -ENETDOWN; + goto exit; + } + + for (ac = 0; ac < 4; ac++) { + if (dur[ac] < MIN_BURST_DUR || dur[ac] > MAX_BURST_DUR) { + ret = -EINVAL; + goto exit; + } + + ret = ath10k_wmi_pdev_set_param(ar, ar->wmi.pdev_param->aggr_burst, + (SM(ac, ATH10K_AGGR_BURST_AC) | + SM(dur[ac], ATH10K_AGGR_BURST_DUR))); + if (ret) { + ath10k_warn(ar, "failed to set aggr burst duration for ac %d: %d\n", ac, ret); + goto exit; + } + ar->debug.burst_dur[ac] = dur[ac]; + } + + ret = count; + +exit: + mutex_unlock(&ar->conf_mutex); + return ret; +} + +static ssize_t ath10k_read_burst_dur(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ath10k *ar = file->private_data; + int len = 0; + char buf[128]; + + len = scnprintf(buf, sizeof(buf) - len, "%u %u %u %u\n", + ar->debug.burst_dur[0], ar->debug.burst_dur[1], + ar->debug.burst_dur[2], ar->debug.burst_dur[3]); + + return simple_read_from_buffer(user_buf, count, ppos, buf, len); +} + +static const struct file_operations fops_burst_dur = { + .read = ath10k_read_burst_dur, + .write = ath10k_write_burst_dur, + .open = simple_open, + .owner = THIS_MODULE, + .llseek = default_llseek, +}; + int ath10k_debug_create(struct ath10k *ar) { ar->debug.cal_data = vzalloc(ATH10K_DEBUG_CAL_DATA_LEN); @@ -2596,6 +2669,9 @@ debugfs_create_file("ani_enable", 0600, ar->debug.debugfs_phy, ar, &fops_ani_enable); + debugfs_create_file("burst_dur", S_IRUSR | S_IWUSR, + ar->debug.debugfs_phy, ar, &fops_burst_dur); + if (IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED)) { debugfs_create_file("dfs_simulate_radar", 0200, ar->debug.debugfs_phy, ar, &fops_simulate_radar); diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/debug.h linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/debug.h --- linux-5.4.60/drivers/net/wireless/ath/ath10k/debug.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/debug.h 2021-03-04 13:20:59.314172291 +0100 @@ -80,6 +80,15 @@ __printf(2, 3) void ath10k_err(struct ath10k *ar, const char *fmt, ...); __printf(2, 3) void ath10k_warn(struct ath10k *ar, const char *fmt, ...); +#define ATH10K_AGGR_BURST_AC_MASK 0xff000000 +#define ATH10K_AGGR_BURST_AC_LSB 24 +#define ATH10K_AGGR_BURST_DUR_MASK 0x00ffffff +#define ATH10K_AGGR_BURST_DUR_LSB 0 + +/* burst duration in usec */ +#define MIN_BURST_DUR 0 +#define MAX_BURST_DUR 8000 + void ath10k_debug_print_hwfw_info(struct ath10k *ar); void ath10k_debug_print_board_info(struct ath10k *ar); void ath10k_debug_print_boot_info(struct ath10k *ar); diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/htt.h linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/htt.h --- linux-5.4.60/drivers/net/wireless/ath/ath10k/htt.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/htt.h 2021-03-04 13:20:59.314172291 +0100 @@ -2225,7 +2225,7 @@ * Should be: sizeof(struct htt_host_rx_desc) + max rx MSDU size, * rounded up to a cache line size. */ -#define HTT_RX_BUF_SIZE 1920 +#define HTT_RX_BUF_SIZE 2048 #define HTT_RX_MSDU_SIZE (HTT_RX_BUF_SIZE - (int)sizeof(struct htt_rx_desc)) /* Refill a bunch of RX buffers for each refill round so that FW/HW can handle diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/mac.c linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/mac.c --- linux-5.4.60/drivers/net/wireless/ath/ath10k/mac.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/mac.c 2021-03-04 13:20:59.317505624 +0100 @@ -2515,7 +2515,7 @@ const u16 *vht_mcs_mask; u8 ampdu_factor; u8 max_nss, vht_mcs; - int i; + int i, nss160; if (WARN_ON(ath10k_mac_vif_chan(vif, &def))) return; @@ -2575,23 +2575,45 @@ __le16_to_cpu(vht_cap->vht_mcs.tx_highest); arg->peer_vht_rates.tx_mcs_set = ath10k_peer_assoc_h_vht_limit( __le16_to_cpu(vht_cap->vht_mcs.tx_mcs_map), vht_mcs_mask); + arg->peer_bw_rxnss_override = 0; + nss160 = 1; /* 1x1 default config for VHT160 */ + + /* only local 4x4 configuration do support 2x2 for VHT160, + * everything else must use 1x1 + */ + + if (ar->cfg_rx_chainmask == 15) + nss160 = arg->peer_num_spatial_streams < 2 ? 1 : 2; + + /* if peer provides 1x1 nss160 information using max rate + * vht information, we reduce local nss160 to 1x1. + * consider that it has been observed that some client + * devices provide zero here, no matter which transmission + * rate is possible. in that case the local nss configuration + * will be used at maxmimum configuration possible. (see above) + */ - ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vht peer %pM max_mpdu %d flags 0x%x\n", - sta->addr, arg->peer_max_mpdu, arg->peer_flags); + if (arg->peer_vht_rates.rx_max_rate == 780) + nss160 = 1; - if (arg->peer_vht_rates.rx_max_rate && - (sta->vht_cap.cap & IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_MASK)) { - switch (arg->peer_vht_rates.rx_max_rate) { - case 1560: - /* Must be 2x2 at 160Mhz is all it can do. */ - arg->peer_bw_rxnss_override = 2; - break; - case 780: - /* Can only do 1x1 at 160Mhz (Long Guard Interval) */ - arg->peer_bw_rxnss_override = 1; + /* in case if peer is connected with vht160 or vht80+80, + * we need to properly adjust rxnss parameters otherwise + * firmware will raise a assert + */ + switch (arg->peer_phymode) { + case MODE_11AC_VHT80_80: + arg->peer_bw_rxnss_override = BW_NSS_FWCONF_80_80(nss160); + /* fall through */ + case MODE_11AC_VHT160: + arg->peer_bw_rxnss_override |= BW_NSS_FWCONF_160(nss160); + break; + default: break; } - } + + ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vht peer %pM max_mpdu %d flags 0x%x peer_bw_rxnss_override 0x%x\n", + sta->addr, arg->peer_max_mpdu, arg->peer_flags, + arg->peer_bw_rxnss_override); } static void ath10k_peer_assoc_h_qos(struct ath10k *ar, @@ -2743,9 +2765,9 @@ ath10k_peer_assoc_h_crypto(ar, vif, sta, arg); ath10k_peer_assoc_h_rates(ar, vif, sta, arg); ath10k_peer_assoc_h_ht(ar, vif, sta, arg); + ath10k_peer_assoc_h_phymode(ar, vif, sta, arg); ath10k_peer_assoc_h_vht(ar, vif, sta, arg); ath10k_peer_assoc_h_qos(ar, vif, sta, arg); - ath10k_peer_assoc_h_phymode(ar, vif, sta, arg); return 0; } @@ -4556,13 +4578,6 @@ vht_cap.cap |= val; } - /* Currently the firmware seems to be buggy, don't enable 80+80 - * mode until that's resolved. - */ - if ((ar->vht_cap_info & IEEE80211_VHT_CAP_SHORT_GI_160) && - (ar->vht_cap_info & IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_MASK) == 0) - vht_cap.cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ; - mcs_map = 0; for (i = 0; i < 8; i++) { if ((i < ar->num_rf_chains) && (ar->cfg_tx_chainmask & BIT(i))) @@ -4734,13 +4749,18 @@ const char *fem_name; int ret; + if (ar->fem_name) + fem_name = ar->fem_name; + else { node = ar->dev->of_node; if (!node) return -ENOENT; - ret = of_property_read_string_index(node, "ext-fem-name", 0, &fem_name); + ret = of_property_read_string_index(node, "ext-fem-name", + 0, &fem_name); if (ret) return -ENOENT; + } /* * If external Front End module used in hardware, then default base band timing @@ -4759,12 +4779,83 @@ return 0; } +static int ath10k_get_powered(struct ieee80211_hw *hw, bool *up, bool *busy) +{ + struct ath10k *ar = hw->priv; + *up = (ar->state == ATH10K_STATE_ON || + ar->state == ATH10K_STATE_PRE_ON); + *busy = ar->powerup_pending; + return 0; +} + +static int ath10k_set_powered(struct ieee80211_hw *hw) +{ + struct ath10k *ar = hw->priv; + + switch (ar->state) { + case ATH10K_STATE_OFF: + case ATH10K_STATE_PRE_ON: + break; + default: + return 0; + } + + if (ar->powerup_pending) + return 0; + + queue_work(ar->workqueue, &ar->powerup_work); + ar->powerup_pending = true; + return 0; +} + +static void ath10k_powerup_work(struct work_struct *work) +{ + struct ath10k *ar = container_of(work, struct ath10k, powerup_work); + int ret; + + mutex_lock(&ar->conf_mutex); + + if (ar->state != ATH10K_STATE_OFF) { + mutex_unlock(&ar->conf_mutex); + return; + } + + ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); + if (ret) { + ath10k_err(ar, "Could not init hif: %d\n", ret); + goto err_off; + } + + ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, + &ar->normal_mode_fw); + if (ret) { + ath10k_err(ar, "Could not init core: %d\n", ret); + goto err_power_down; + } + + ar->state = ATH10K_STATE_PRE_ON; + ar->powerup_pending = false; + mutex_unlock(&ar->conf_mutex); + return; + +err_power_down: + ath10k_hif_power_down(ar); + +err_off: + ar->state = ATH10K_STATE_OFF; + + ar->powerup_pending = false; + mutex_unlock(&ar->conf_mutex); + return; +} + static int ath10k_start(struct ieee80211_hw *hw) { struct ath10k *ar = hw->priv; u32 param; int ret = 0; struct wmi_bb_timing_cfg_arg bb_timing = {0}; + bool skip_core_start = false; /* * This makes sense only when restarting hw. It is harmless to call @@ -4779,6 +4870,10 @@ case ATH10K_STATE_OFF: ar->state = ATH10K_STATE_ON; break; + case ATH10K_STATE_PRE_ON: + skip_core_start = true; + ar->state = ATH10K_STATE_ON; + break; case ATH10K_STATE_RESTARTING: ar->state = ATH10K_STATE_RESTARTED; break; @@ -4793,6 +4888,7 @@ goto err; } + if (!skip_core_start) { ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); if (ret) { ath10k_err(ar, "Could not init hif: %d\n", ret); @@ -4805,6 +4901,7 @@ ath10k_err(ar, "Could not init core: %d\n", ret); goto err_power_down; } + } param = ar->wmi.pdev_param->pmf_qos; ret = ath10k_wmi_pdev_set_param(ar, param, 1); @@ -4963,6 +5060,9 @@ ath10k_drain_tx(ar); + cancel_work_sync(&ar->powerup_work); + ar->powerup_pending = false; + mutex_lock(&ar->conf_mutex); if (ar->state != ATH10K_STATE_OFF) { ath10k_halt(ar); @@ -7131,7 +7231,7 @@ struct ieee80211_channel *channel) { int ret; - enum wmi_bss_survey_req_type type = WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR; + enum wmi_bss_survey_req_type type = WMI_BSS_SURVEY_REQ_TYPE_READ; lockdep_assert_held(&ar->conf_mutex); @@ -8187,6 +8287,8 @@ static const struct ieee80211_ops ath10k_ops = { .tx = ath10k_mac_op_tx, .wake_tx_queue = ath10k_mac_op_wake_tx_queue, + .get_powered = ath10k_get_powered, + .set_powered = ath10k_set_powered, .start = ath10k_start, .stop = ath10k_stop, .config = ath10k_config, @@ -8397,6 +8499,7 @@ .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | BIT(NL80211_CHAN_WIDTH_20) | BIT(NL80211_CHAN_WIDTH_40) | + BIT(NL80211_CHAN_WIDTH_160) | BIT(NL80211_CHAN_WIDTH_80), #endif }, @@ -8521,6 +8624,7 @@ .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | BIT(NL80211_CHAN_WIDTH_20) | BIT(NL80211_CHAN_WIDTH_40) | + BIT(NL80211_CHAN_WIDTH_160) | BIT(NL80211_CHAN_WIDTH_80), #endif }, @@ -8539,6 +8643,7 @@ .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | BIT(NL80211_CHAN_WIDTH_20) | BIT(NL80211_CHAN_WIDTH_40) | + BIT(NL80211_CHAN_WIDTH_160) | BIT(NL80211_CHAN_WIDTH_80), #endif }, @@ -8578,6 +8683,8 @@ #define WRD_METHOD "WRDD" #define WRDD_WIFI (0x07) +#define ATH10K_DFS_PULSE_VALID_DIFF_TS 100 + static u32 ath10k_mac_wrdd_get_mcc(struct ath10k *ar, union acpi_object *wrdd) { union acpi_object *mcc_pkg; @@ -8791,6 +8898,7 @@ ieee80211_hw_set(ar->hw, SUPPORT_FAST_XMIT); ieee80211_hw_set(ar->hw, CONNECTION_MONITOR); ieee80211_hw_set(ar->hw, SUPPORTS_PER_STA_GTK); + ieee80211_hw_set(ar->hw, APVLAN_NEED_MCAST_TO_UCAST); ieee80211_hw_set(ar->hw, WANT_MONITOR_VIF); ieee80211_hw_set(ar->hw, CHANCTX_STA_CSA); ieee80211_hw_set(ar->hw, QUEUE_CONTROL); @@ -8955,6 +9063,8 @@ if (IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED)) { /* Init ath dfs pattern detector */ ar->ath_common.debug_mask = ATH_DBG_DFS; + ar->ath_common.dfs_pulse_valid_diff_ts = + ATH10K_DFS_PULSE_VALID_DIFF_TS; ar->dfs_detector = dfs_pattern_detector_init(&ar->ath_common, NL80211_DFS_UNSET); @@ -8972,6 +9082,15 @@ if (!ar->hw_params.hw_ops->set_coverage_class) ar->ops->set_coverage_class = NULL; + /* Current wake_tx_queue implementation imposes a significant + * performance penalty in some setups. The tx scheduling code needs + * more work anyway so disable the wake_tx_queue unless firmware + * supports the pull-push mechanism. + */ + if (!test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, + ar->running_fw->fw_file.fw_features)) + ar->ops->wake_tx_queue = NULL; + ret = ath_regd_init(&ar->ath_common.regulatory, ar->hw->wiphy, ath10k_reg_notifier); if (ret) { @@ -9002,6 +9121,9 @@ ar->hw->weight_multiplier = ATH10K_AIRTIME_WEIGHT_MULTIPLIER; + INIT_WORK(&ar->powerup_work, ath10k_powerup_work); + ar->powerup_pending = false; + ret = ieee80211_register_hw(ar->hw); if (ret) { ath10k_err(ar, "failed to register ieee80211: %d\n", ret); @@ -9013,16 +9135,20 @@ ar->hw->wiphy->software_iftypes |= BIT(NL80211_IFTYPE_AP_VLAN); } +#ifndef CONFIG_ATH_REG_IGNORE if (!ath_is_world_regd(&ar->ath_common.regulatory)) { ret = regulatory_hint(ar->hw->wiphy, ar->ath_common.regulatory.alpha2); if (ret) goto err_unregister; } +#endif return 0; +#ifndef CONFIG_ATH_REG_IGNORE err_unregister: +#endif ieee80211_unregister_hw(ar->hw); err_dfs_detector_exit: @@ -9040,6 +9166,7 @@ void ath10k_mac_unregister(struct ath10k *ar) { ieee80211_unregister_hw(ar->hw); + cancel_work_sync(&ar->powerup_work); if (IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED) && ar->dfs_detector) ar->dfs_detector->exit(ar->dfs_detector); diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/pci.c linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/pci.c --- linux-5.4.60/drivers/net/wireless/ath/ath10k/pci.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/pci.c 2021-03-04 13:20:59.317505624 +0100 @@ -9,6 +9,7 @@ #include #include #include +#include #include "core.h" #include "debug.h" @@ -30,6 +31,7 @@ static unsigned int ath10k_pci_irq_mode = ATH10K_PCI_IRQ_AUTO; static unsigned int ath10k_pci_reset_mode = ATH10K_PCI_RESET_AUTO; +static char *fem_name; module_param_named(irq_mode, ath10k_pci_irq_mode, uint, 0644); MODULE_PARM_DESC(irq_mode, "0: auto, 1: legacy, 2: msi (default: 0)"); @@ -37,6 +39,9 @@ module_param_named(reset_mode, ath10k_pci_reset_mode, uint, 0644); MODULE_PARM_DESC(reset_mode, "0: auto, 1: warm only (default: 0)"); +module_param(fem_name, charp, 0660); +MODULE_PARM_DESC(fem_name, "force FEM type"); + /* how long wait to wait for target to initialise, in ms */ #define ATH10K_PCI_TARGET_WAIT 3000 #define ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS 3 @@ -714,7 +719,8 @@ /* Check if the shared legacy irq is for us */ cause = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_CAUSE_ADDRESS); - if (cause & (PCIE_INTR_FIRMWARE_MASK | PCIE_INTR_CE_MASK_ALL)) + if (cause & (PCIE_INTR_FIRMWARE_MASK | PCIE_INTR_CE_MASK_ALL) && + cause != 0xdeadbeef) return true; return false; @@ -2652,12 +2658,6 @@ return 0; } -static int ath10k_pci_qca99x0_soft_chip_reset(struct ath10k *ar) -{ - ath10k_pci_irq_disable(ar); - return ath10k_pci_qca99x0_chip_reset(ar); -} - static int ath10k_pci_safe_chip_reset(struct ath10k *ar) { struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); @@ -3498,7 +3498,7 @@ .get_num_banks = ath10k_pci_get_num_banks, }; -static int ath10k_pci_probe(struct pci_dev *pdev, +static int __ath10k_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_dev) { int ret = 0; @@ -3539,21 +3539,21 @@ case QCA99X0_2_0_DEVICE_ID: hw_rev = ATH10K_HW_QCA99X0; pci_ps = false; - pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset; + pci_soft_reset = NULL;; pci_hard_reset = ath10k_pci_qca99x0_chip_reset; targ_cpu_to_ce_addr = ath10k_pci_qca99x0_targ_cpu_to_ce_addr; break; case QCA9984_1_0_DEVICE_ID: hw_rev = ATH10K_HW_QCA9984; pci_ps = false; - pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset; + pci_soft_reset = NULL;; pci_hard_reset = ath10k_pci_qca99x0_chip_reset; targ_cpu_to_ce_addr = ath10k_pci_qca99x0_targ_cpu_to_ce_addr; break; case QCA9888_2_0_DEVICE_ID: hw_rev = ATH10K_HW_QCA9888; pci_ps = false; - pci_soft_reset = ath10k_pci_qca99x0_soft_chip_reset; + pci_soft_reset = NULL;; pci_hard_reset = ath10k_pci_qca99x0_chip_reset; targ_cpu_to_ce_addr = ath10k_pci_qca99x0_targ_cpu_to_ce_addr; break; @@ -3592,6 +3592,7 @@ ar_pci->targ_cpu_to_ce_addr = targ_cpu_to_ce_addr; ar->ce_priv = &ar_pci->ce; + ar->fem_name = fem_name; ar->id.vendor = pdev->vendor; ar->id.device = pdev->device; ar->id.subsystem_vendor = pdev->subsystem_vendor; @@ -3751,6 +3752,23 @@ ath10k_pci_pm_suspend, ath10k_pci_pm_resume); +static int ath10k_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *pci_dev) +{ + int cnt = 0; + int rv; + do { + rv = __ath10k_pci_probe(pdev, pci_dev); + if (rv == 0) + return rv; + + pr_err("ath10k: failed to probe PCI : %d, retry-count: %d\n", rv, cnt); + mdelay(10); /* let the ath10k firmware gerbil take a small break */ + } while (cnt++ < 3); + + return rv; +} + static struct pci_driver ath10k_pci_driver = { .name = "ath10k_pci", .id_table = ath10k_pci_id_table, diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/thermal.c linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/thermal.c --- linux-5.4.60/drivers/net/wireless/ath/ath10k/thermal.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/thermal.c 2021-03-04 13:20:59.320838957 +0100 @@ -160,7 +160,9 @@ if (!test_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map)) return 0; - cdev = thermal_cooling_device_register("ath10k_thermal", ar, + cdev = thermal_cooling_device_register_with_parent(ar->dev, + "ath10k_thermal", + ar, &ath10k_thermal_ops); if (IS_ERR(cdev)) { diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/wmi.c linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/wmi.c --- linux-5.4.60/drivers/net/wireless/ath/ath10k/wmi.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/wmi.c 2021-03-04 13:20:59.320838957 +0100 @@ -1681,10 +1681,11 @@ .bw160 = WMI_10_2_PEER_160MHZ, }; -void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, +void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch, const struct wmi_channel_arg *arg) { u32 flags = 0; + struct ieee80211_channel *chan = NULL; memset(ch, 0, sizeof(*ch)); @@ -1700,13 +1701,35 @@ flags |= WMI_CHAN_FLAG_HT40_PLUS; if (arg->chan_radar) flags |= WMI_CHAN_FLAG_DFS; - + ch->band_center_freq2 = 0; ch->mhz = __cpu_to_le32(arg->freq); ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1); - if (arg->mode == MODE_11AC_VHT80_80) + if (arg->mode == MODE_11AC_VHT80_80) { ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2); - else - ch->band_center_freq2 = 0; + chan = ieee80211_get_channel(ar->hw->wiphy, + arg->band_center_freq2 - 10); + } + if (arg->mode == MODE_11AC_VHT160) { + if (arg->freq > arg->band_center_freq1) { + ch->band_center_freq1 = + __cpu_to_le32(arg->band_center_freq1 + 40); + /* Minus 40 to get secondary segment's center frequency + * And minus 10 to get a defined 5G channel frequency. + */ + chan = ieee80211_get_channel(ar->hw->wiphy, + arg->band_center_freq1 - 40 - 10); + } else { + ch->band_center_freq1 = + __cpu_to_le32(arg->band_center_freq1 - 40); + chan = ieee80211_get_channel(ar->hw->wiphy, + arg->band_center_freq1 + 40 - 10); + } + ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq1); + } + + if (chan && chan->flags & IEEE80211_CHAN_RADAR) + flags |= WMI_CHAN_FLAG_DFS_CFREQ2; + ch->min_power = arg->min_power; ch->max_power = arg->max_power; ch->reg_power = arg->max_reg_power; @@ -7089,7 +7112,7 @@ memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); } - ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel); + ath10k_wmi_put_wmi_channel(ar, &cmd->chan, &arg->channel); ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n", @@ -7461,7 +7484,7 @@ ch = &arg->channels[i]; ci = &cmd->chan_info[i]; - ath10k_wmi_put_wmi_channel(ci, ch); + ath10k_wmi_put_wmi_channel(ar, ci, ch); } return skb; @@ -7552,12 +7575,7 @@ struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf; ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg); - if (arg->peer_bw_rxnss_override) - cmd->peer_bw_rxnss_override = - __cpu_to_le32((arg->peer_bw_rxnss_override - 1) | - BIT(PEER_BW_RXNSS_OVERRIDE_OFFSET)); - else - cmd->peer_bw_rxnss_override = 0; + cmd->peer_bw_rxnss_override = __cpu_to_le32(arg->peer_bw_rxnss_override); } static int @@ -8869,7 +8887,7 @@ for (i = 0; i < cap->peer_chan_len; i++) { chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i]; - ath10k_wmi_put_wmi_channel(chan, &chan_arg[i]); + ath10k_wmi_put_wmi_channel(ar, chan, &chan_arg[i]); } ath10k_dbg(ar, ATH10K_DBG_WMI, diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/wmi.h linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/wmi.h --- linux-5.4.60/drivers/net/wireless/ath/ath10k/wmi.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/wmi.h 2021-03-04 13:20:59.320838957 +0100 @@ -2085,6 +2085,8 @@ /* Indicate reason for channel switch */ #define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13) +/* DFS required on channel for 2nd segment of VHT160 and VHT80+80*/ +#define WMI_CHAN_FLAG_DFS_CFREQ2 (1 << 15) #define WMI_MAX_SPATIAL_STREAM 3 /* default max ss */ @@ -6478,7 +6480,19 @@ __le32 info0; /* WMI_PEER_ASSOC_INFO0_ */ } __packed; -#define PEER_BW_RXNSS_OVERRIDE_OFFSET 31 +#define BW_NSS_FWCONF_MAP_ENABLE BIT(31) +#define BW_NSS_FWCONF_MAP_160MHZ_LSB (0) +#define BW_NSS_FWCONF_MAP_160MHZ_MASK (0x00000007) +#define BW_NSS_FWCONF_MAP_80_80MHZ_LSB (3) +#define BW_NSS_FWCONF_MAP_80_80MHZ_MASK (0x00000038) +#define BW_NSS_FWCONF_MAP_MASK (0x0000003F) + +#define GET_BW_NSS_FWCONF_160(x) (MS(x, BW_NSS_FWCONF_MAP_160MHZ) + 1) +#define GET_BW_NSS_FWCONF_80_80(x) (MS(x, BW_NSS_FWCONF_MAP_80_80MHZ) + 1) + +/* Values defined to set 160 MHz Bandwidth NSS Mapping into FW*/ +#define BW_NSS_FWCONF_160(x) (BW_NSS_FWCONF_MAP_ENABLE | SM(x - 1, BW_NSS_FWCONF_MAP_160MHZ)) +#define BW_NSS_FWCONF_80_80(x) (BW_NSS_FWCONF_MAP_ENABLE | SM(x - 1, BW_NSS_FWCONF_MAP_80_80MHZ)) struct wmi_10_4_peer_assoc_complete_cmd { struct wmi_10_2_peer_assoc_complete_cmd cmd; @@ -7312,7 +7326,7 @@ const struct wmi_start_scan_arg *arg); void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, const struct wmi_wmm_params_arg *arg); -void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, +void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch, const struct wmi_channel_arg *arg); int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg); diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath10k/wmi-tlv.c linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/wmi-tlv.c --- linux-5.4.60/drivers/net/wireless/ath/ath10k/wmi-tlv.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath10k/wmi-tlv.c 2021-03-04 13:20:59.320838957 +0100 @@ -2063,7 +2063,7 @@ tlv->tag = __cpu_to_le16(WMI_TLV_TAG_STRUCT_CHANNEL); tlv->len = __cpu_to_le16(sizeof(*ch)); ch = (void *)tlv->value; - ath10k_wmi_put_wmi_channel(ch, &arg->channel); + ath10k_wmi_put_wmi_channel(ar, ch, &arg->channel); ptr += sizeof(*tlv); ptr += sizeof(*ch); @@ -2703,7 +2703,7 @@ tlv->len = __cpu_to_le16(sizeof(*ci)); ci = (void *)tlv->value; - ath10k_wmi_put_wmi_channel(ci, ch); + ath10k_wmi_put_wmi_channel(ar, ci, ch); chans += sizeof(*tlv); chans += sizeof(*ci); @@ -3404,7 +3404,7 @@ tlv->tag = __cpu_to_le16(WMI_TLV_TAG_STRUCT_CHANNEL); tlv->len = __cpu_to_le16(sizeof(*chan)); chan = (void *)tlv->value; - ath10k_wmi_put_wmi_channel(chan, &chan_arg[i]); + ath10k_wmi_put_wmi_channel(ar, chan, &chan_arg[i]); ptr += sizeof(*tlv); ptr += sizeof(*chan); diff -ruw linux-5.4.60/drivers/net/wireless/ath/ath.h linux-5.4.60-fbx/drivers/net/wireless/ath/ath.h --- linux-5.4.60/drivers/net/wireless/ath/ath.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/ath.h 2021-03-04 13:20:59.314172291 +0100 @@ -184,6 +184,8 @@ int last_rssi; struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; + + int dfs_pulse_valid_diff_ts; }; static inline const struct ath_ps_ops *ath_ps_ops(struct ath_common *common) diff -ruw linux-5.4.60/drivers/net/wireless/ath/dfs_pattern_detector.c linux-5.4.60-fbx/drivers/net/wireless/ath/dfs_pattern_detector.c --- linux-5.4.60/drivers/net/wireless/ath/dfs_pattern_detector.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/dfs_pattern_detector.c 2021-03-04 13:20:59.344172292 +0100 @@ -273,6 +273,7 @@ { u32 i; struct channel_detector *cd; + int diff_ts; /* * pulses received for a non-supported or un-initialized @@ -285,8 +286,9 @@ if (cd == NULL) return false; + diff_ts = event->ts - dpd->last_pulse_ts; /* reset detector on time stamp wraparound, caused by TSF reset */ - if (event->ts < dpd->last_pulse_ts) + if (diff_ts < dpd->common->dfs_pulse_valid_diff_ts) dpd_reset(dpd); dpd->last_pulse_ts = event->ts; diff -ruw linux-5.4.60/drivers/net/wireless/ath/dfs_pattern_detector.h linux-5.4.60-fbx/drivers/net/wireless/ath/dfs_pattern_detector.h --- linux-5.4.60/drivers/net/wireless/ath/dfs_pattern_detector.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/dfs_pattern_detector.h 2021-03-04 13:20:59.344172292 +0100 @@ -24,7 +24,7 @@ /* tolerated deviation of radar time stamp in usecs on both sides * TODO: this might need to be HW-dependent */ -#define PRI_TOLERANCE 16 +#define PRI_TOLERANCE 6 /** * struct ath_dfs_pool_stats - DFS Statistics for global pools diff -ruw linux-5.4.60/drivers/net/wireless/ath/Kconfig linux-5.4.60-fbx/drivers/net/wireless/ath/Kconfig --- linux-5.4.60/drivers/net/wireless/ath/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/Kconfig 2021-03-04 13:20:59.310838957 +0100 @@ -37,6 +37,9 @@ This option enables tracepoints for atheros wireless drivers. Currently, ath9k makes use of this facility. +config ATH_REG_IGNORE + bool "ignore all eeprom regulation" + config ATH_REG_DYNAMIC_USER_REG_HINTS bool "Atheros dynamic user regulatory hints" depends on CFG80211_CERTIFICATION_ONUS diff -ruw linux-5.4.60/drivers/net/wireless/ath/key.c linux-5.4.60-fbx/drivers/net/wireless/ath/key.c --- linux-5.4.60/drivers/net/wireless/ath/key.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/key.c 2021-03-04 13:20:59.344172292 +0100 @@ -524,7 +524,7 @@ idx = ath_reserve_key_cache_slot(common, key->cipher); break; default: - idx = key->keyidx; + idx = ath_reserve_key_cache_slot(common, key->cipher); break; } } else if (key->keyidx) { diff -ruw linux-5.4.60/drivers/net/wireless/ath/regd.c linux-5.4.60-fbx/drivers/net/wireless/ath/regd.c --- linux-5.4.60/drivers/net/wireless/ath/regd.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/ath/regd.c 2021-03-04 13:20:59.344172292 +0100 @@ -345,6 +345,10 @@ struct ieee80211_channel *ch; unsigned int i; +#ifdef CONFIG_ATH_REG_IGNORE + return; +#endif + for (band = 0; band < NUM_NL80211_BANDS; band++) { if (!wiphy->bands[band]) continue; @@ -378,6 +382,10 @@ { struct ieee80211_supported_band *sband; +#ifdef CONFIG_ATH_REG_IGNORE + return; +#endif + sband = wiphy->bands[NL80211_BAND_2GHZ]; if (!sband) return; @@ -407,6 +415,9 @@ struct ieee80211_channel *ch; unsigned int i; +#ifdef CONFIG_ATH_REG_IGNORE + return; +#endif if (!wiphy->bands[NL80211_BAND_5GHZ]) return; @@ -639,6 +650,11 @@ const struct ieee80211_regdomain *regd; wiphy->reg_notifier = reg_notifier; + +#ifdef CONFIG_ATH_REG_IGNORE + return 0; +#endif + wiphy->regulatory_flags |= REGULATORY_STRICT_REG | REGULATORY_CUSTOM_REG; @@ -703,7 +719,7 @@ regdmn == CTRY_DEFAULT) { printk(KERN_DEBUG "ath: EEPROM indicates default " "country code should be used\n"); - reg->country_code = CTRY_UNITED_STATES; + reg->country_code = CTRY_FRANCE; } if (reg->country_code == CTRY_DEFAULT) { diff -ruw linux-5.4.60/drivers/net/wireless/marvell/Kconfig linux-5.4.60-fbx/drivers/net/wireless/marvell/Kconfig --- linux-5.4.60/drivers/net/wireless/marvell/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/marvell/Kconfig 2021-03-04 13:20:59.414172295 +0100 @@ -25,4 +25,8 @@ To compile this driver as a module, choose M here: the module will be called mwl8k. If unsure, say N. +config MWL8K_NEW + tristate "Marvell 88W8xxx PCI/PCIe NEW" + depends on MAC80211 && PCI + endif # WLAN_VENDOR_MARVELL diff -ruw linux-5.4.60/drivers/net/wireless/marvell/Makefile linux-5.4.60-fbx/drivers/net/wireless/marvell/Makefile --- linux-5.4.60/drivers/net/wireless/marvell/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/marvell/Makefile 2021-03-04 13:20:59.414172295 +0100 @@ -5,3 +5,4 @@ obj-$(CONFIG_MWIFIEX) += mwifiex/ obj-$(CONFIG_MWL8K) += mwl8k.o +obj-$(CONFIG_MWL8K_NEW) += mwl8k_new/ diff -ruw linux-5.4.60/drivers/net/wireless/marvell/mwl8k.c linux-5.4.60-fbx/drivers/net/wireless/marvell/mwl8k.c --- linux-5.4.60/drivers/net/wireless/marvell/mwl8k.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/net/wireless/marvell/mwl8k.c 2021-03-04 13:20:59.424172295 +0100 @@ -24,6 +24,7 @@ #include #include #include +#include #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" #define MWL8K_NAME KBUILD_MODNAME @@ -35,6 +36,17 @@ MODULE_PARM_DESC(ap_mode_default, "Set to 1 to make ap mode the default instead of sta mode"); +static u8 ap_base_mac_addr[18] = "00:00:00:00:00:00"; +module_param_string(base_mac_addr, ap_base_mac_addr, 18, 0); +MODULE_PARM_DESC(ap_base_mac_addr, + "Override EEPROM defined base mac address in AP mode"); + +static int mac_addr_count = -1; +module_param(mac_addr_count, int, 0); +MODULE_PARM_DESC(ap_base_mac_addr, + "Override EEPROM defined mac address count"); + + /* Register definitions */ #define MWL8K_HIU_GEN_PTR 0x00000c10 #define MWL8K_MODE_STA 0x0000005a @@ -181,6 +193,7 @@ struct mwl8k_priv { struct ieee80211_hw *hw; struct pci_dev *pdev; + struct mac_address addresses[8]; int irq; struct mwl8k_device_info *device_info; @@ -300,6 +313,9 @@ struct ieee80211_channel *acs_chan; unsigned long channel_time; struct survey_info survey[MWL8K_NUM_CHANS]; + + unsigned int last_short_preamble; + unsigned int last_basic_rates; }; #define MAX_WEP_KEY_LEN 13 @@ -327,6 +343,9 @@ /* A flag to indicate is HW crypto is enabled for this bssid */ bool is_hw_crypto_enabled; + + u32 last_beacon_crc; + unsigned int last_beacon_int; }; #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) @@ -801,6 +820,11 @@ return loops ? 0 : -ETIMEDOUT; } +static bool disable_5g = 0; +module_param(disable_5g, bool, 0); +MODULE_PARM_DESC(disable_5g, + "Set to 1 to disable 5G band usage"); + /* DMA header used by firmware and hardware. */ struct mwl8k_dma_data { @@ -1017,6 +1041,9 @@ } } + if (le16_to_cpu(rxd->htsig2) & (1 << 7)) + status->enc_flags |= RX_ENC_FLAG_SHORT_GI; + if (rxd->channel > 14) { status->band = NL80211_BAND_5GHZ; if (!(status->encoding == RX_ENC_HT) && @@ -1661,6 +1688,8 @@ */ #define RI_FORMAT(a) (a & 0x0001) +#define RI_SHORT_GI(a) (a & 0x0002) +#define RI_40MHZ(a) (a & 0x0004) #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3) static int @@ -1718,6 +1747,8 @@ tx_desc->pkt_len = 0; info = IEEE80211_SKB_CB(skb); + rate_info = le16_to_cpu(tx_desc->rate_info); + if (ieee80211_is_data(wh->frame_control)) { rcu_read_lock(); sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1, @@ -1725,7 +1756,6 @@ if (sta) { sta_info = MWL8K_STA(sta); BUG_ON(sta_info == NULL); - rate_info = le16_to_cpu(tx_desc->rate_info); /* If rate is < 6.5 Mpbs for an ht station * do not form an ampdu. If the station is a * legacy station (format = 0), do not form an @@ -1739,18 +1769,25 @@ } } rcu_read_unlock(); - } - - ieee80211_tx_info_clear_status(info); - /* Rate control is happening in the firmware. - * Ensure no tx rate is being reported. - */ + info->status.rates[0].idx = RI_RATE_ID_MCS(rate_info); + info->status.rates[0].flags = 0; + if (RI_FORMAT(rate_info)) + info->status.rates[0].flags |= IEEE80211_TX_RC_MCS; + if (RI_SHORT_GI(rate_info)) + info->status.rates[0].flags |= IEEE80211_TX_RC_SHORT_GI; + if (RI_40MHZ(rate_info)) + info->status.rates[0].flags |= IEEE80211_TX_RC_40_MHZ_WIDTH; + info->status.rates[1].idx = -1; + } else info->status.rates[0].idx = -1; - info->status.rates[0].count = 1; + + ieee80211_tx_info_clear_status(info); if (MWL8K_TXD_SUCCESS(status)) info->flags |= IEEE80211_TX_STAT_ACK; + if (index >= MWL8K_TX_WMM_QUEUES) + info->flags |= IEEE80211_TX_STAT_AMPDU; ieee80211_tx_status_irqsafe(hw, skb); @@ -2442,7 +2479,7 @@ mwl8k_set_ht_caps(hw, &priv->band_24, caps); } - if (caps & MWL8K_CAP_5GHZ) { + if (!disable_5g && (caps & MWL8K_CAP_5GHZ)) { mwl8k_setup_5ghz_band(hw); if (caps & MWL8K_CAP_MIMO) mwl8k_set_ht_caps(hw, &priv->band_50, caps); @@ -2516,6 +2553,20 @@ __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES]; } __packed; +static void inc_mac(u8 *base, unsigned int count) +{ + unsigned int i; + + for (i = 0; i < count; i++) { + int j; + + for (j = 5; j >= 0; j--) { + if (++base[j] != 0) + break; + } + } +} + static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) { struct mwl8k_priv *priv = hw->priv; @@ -2537,6 +2588,7 @@ if (!rc) { int off; + u8 ap_base_mac[ETH_ALEN]; api_version = le32_to_cpu(cmd->fw_api_version); if (priv->device_info->fw_api_ap != api_version) { @@ -2548,7 +2600,27 @@ rc = -EINVAL; goto done; } + + if (mac_pton(ap_base_mac_addr, ap_base_mac) && + !is_zero_ether_addr(ap_base_mac)) + SET_IEEE80211_PERM_ADDR(hw, ap_base_mac); + else SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); + + if (mac_addr_count > 0) { + unsigned int i; + + for (i = 0; i < mac_addr_count && + i < ARRAY_SIZE(priv->addresses); i++) { + memcpy(&priv->addresses[i], + hw->wiphy->perm_addr, 6); + inc_mac(priv->addresses[i].addr, i); + } + + hw->wiphy->addresses = priv->addresses; + hw->wiphy->n_addresses = i; + } + priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); priv->fw_rev = le32_to_cpu(cmd->fw_rev); priv->hw_rev = cmd->hw_rev; @@ -4712,10 +4784,6 @@ } priv->irq = priv->pdev->irq; - /* Enable TX reclaim and RX tasklets. */ - tasklet_enable(&priv->poll_tx_task); - tasklet_enable(&priv->poll_rx_task); - /* Enable interrupts */ iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); iowrite32(MWL8K_A2H_EVENTS, @@ -4750,12 +4818,15 @@ iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); free_irq(priv->pdev->irq, hw); priv->irq = -1; - tasklet_disable(&priv->poll_tx_task); - tasklet_disable(&priv->poll_rx_task); + tasklet_kill(&priv->poll_tx_task); + tasklet_kill(&priv->poll_rx_task); } else { ieee80211_wake_queues(hw); } + priv->last_short_preamble = ~0; + priv->last_basic_rates = ~0; + return rc; } @@ -4783,8 +4854,8 @@ dev_kfree_skb(priv->beacon_skb); /* Stop TX reclaim and RX tasklets. */ - tasklet_disable(&priv->poll_tx_task); - tasklet_disable(&priv->poll_rx_task); + tasklet_kill(&priv->poll_tx_task); + tasklet_kill(&priv->poll_rx_task); /* Return all skbs to mac80211 */ for (i = 0; i < mwl8k_tx_queues(priv); i++) @@ -4859,6 +4930,8 @@ mwl8k_vif->seqno = 0; memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); mwl8k_vif->is_hw_crypto_enabled = false; + mwl8k_vif->last_beacon_crc = ~0; + mwl8k_vif->last_beacon_int = ~0; /* Set the mac address. */ mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); @@ -5104,19 +5177,27 @@ mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *info, u32 changed) { + struct mwl8k_priv *priv = hw->priv; + struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); + struct sk_buff *skb; + bool update_beacon; + u32 crc; int rc; if (mwl8k_fw_lock(hw)) return; - if (changed & BSS_CHANGED_ERP_PREAMBLE) { + if ((changed & BSS_CHANGED_ERP_PREAMBLE) && + priv->last_short_preamble != vif->bss_conf.use_short_preamble) { rc = mwl8k_set_radio_preamble(hw, vif->bss_conf.use_short_preamble); if (rc) goto out; + priv->last_short_preamble = vif->bss_conf.use_short_preamble; } - if (changed & BSS_CHANGED_BASIC_RATES) { + if ((changed & BSS_CHANGED_BASIC_RATES) && + priv->last_basic_rates != vif->bss_conf.basic_rates) { int idx; int rate; @@ -5135,18 +5216,33 @@ rate = mwl8k_rates_50[idx].hw_value; mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); + priv->last_basic_rates = vif->bss_conf.basic_rates; } - if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { - struct sk_buff *skb; + update_beacon = false; + + if ((changed & BSS_CHANGED_BEACON_INT) && + mwl8k_vif->last_beacon_int != vif->bss_conf.beacon_int) + update_beacon = true; skb = ieee80211_beacon_get(hw, vif); - if (skb != NULL) { - mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); - kfree_skb(skb); + crc = 0; + + if (changed & BSS_CHANGED_BEACON) { + if (skb) { + crc = crc32_le(~0, skb->data, skb->len); + if (crc != mwl8k_vif->last_beacon_crc) + update_beacon = true; } } + if (skb && update_beacon) { + mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); + mwl8k_vif->last_beacon_crc = crc; + mwl8k_vif->last_beacon_int = vif->bss_conf.beacon_int; + } + kfree_skb(skb); + if (changed & BSS_CHANGED_BEACON_ENABLED) mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); @@ -6099,8 +6195,10 @@ * Ask mac80211 to not to trigger PS mode * based on PM bit of incoming frames. */ - if (priv->ap_fw) + if (priv->ap_fw) { ieee80211_hw_set(hw, AP_LINK_PS); + ieee80211_hw_set(hw, APVLAN_NEED_MCAST_TO_UCAST); + } hw->vif_data_size = sizeof(struct mwl8k_vif); hw->sta_data_size = sizeof(struct mwl8k_sta); @@ -6121,9 +6219,7 @@ /* TX reclaim and RX tasklets. */ tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); - tasklet_disable(&priv->poll_tx_task); tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); - tasklet_disable(&priv->poll_rx_task); /* Power management cookie */ priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); diff -ruw linux-5.4.60/drivers/nvmem/core.c linux-5.4.60-fbx/drivers/nvmem/core.c --- linux-5.4.60/drivers/nvmem/core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/nvmem/core.c 2021-03-04 13:20:59.504172299 +0100 @@ -396,8 +396,10 @@ config->name ? config->id : nvmem->id); } +#ifndef CONFIG_NVMEM_IGNORE_RO nvmem->read_only = device_property_present(config->dev, "read-only") || config->read_only || !nvmem->reg_write; +#endif nvmem->dev.groups = nvmem_sysfs_get_groups(nvmem, config); diff -ruw linux-5.4.60/drivers/nvmem/Kconfig linux-5.4.60-fbx/drivers/nvmem/Kconfig --- linux-5.4.60/drivers/nvmem/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/nvmem/Kconfig 2021-03-04 13:20:59.504172299 +0100 @@ -24,6 +24,9 @@ This interface is mostly used by userspace applications to read/write directly into nvmem. +config NVMEM_IGNORE_RO + bool "ignore read-only flags" + config NVMEM_IMX_IIM tristate "i.MX IC Identification Module support" depends on ARCH_MXC || COMPILE_TEST diff -ruw linux-5.4.60/drivers/of/fdt.c linux-5.4.60-fbx/drivers/of/fdt.c --- linux-5.4.60/drivers/of/fdt.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/of/fdt.c 2021-03-04 13:20:59.507505632 +0100 @@ -28,6 +28,7 @@ #include /* for COMMAND_LINE_SIZE */ #include +#include #include "of_private.h" @@ -745,6 +746,39 @@ return 0; } +/* + * iterate list of built-in dtb to find a compatible match + */ +const void __init *of_fdt_find_compatible_dtb(const char *name) +{ + struct fdt_header { + __be32 magic; + __be32 totalsize; + }; + const struct fdt_header *blob, *best; + unsigned int best_score = ~0; + + best = NULL; + blob = (const struct fdt_header *)__dtb_start; + while ((void *)blob < (void *)__dtb_end && + (be32_to_cpu(blob->magic) == OF_DT_HEADER)) { + unsigned int score; + u32 size; + + score = of_fdt_is_compatible(blob, 0, name); + if (score > 0 && score < best_score) { + best = blob; + best_score = score; + } + + size = be32_to_cpu(blob->totalsize); + blob = (const struct fdt_header *) + PTR_ALIGN((void *)blob + size, STRUCT_ALIGNMENT); + } + + return best; +} + /** * of_flat_dt_is_compatible - Return true if given node has compat in compatible list * @node: node to test @@ -1040,6 +1074,40 @@ return 0; } +#ifdef CONFIG_RANDOM_OF +/* + * get random seed area from device tree, and reserve it early enough + * so that it remains untouched until we can properly add it to the + * entropy pool. + */ +extern u64 random_seed_start; +extern u64 random_seed_size; + +static void __init early_init_dt_handle_random_seed(unsigned long node) +{ + const __be32 *prop; + int len; + + prop = of_get_flat_dt_prop(node, "fbx,random-seed", &len); + if (!prop) + return; + + if (len != 16) { + pr_err("bad fbx,random-seed size %d vs %d!\n", 16, len); + return ; + } + + random_seed_start = dt_mem_next_cell(2, &prop); + random_seed_size = dt_mem_next_cell(2, &prop); + + memblock_reserve(random_seed_start, random_seed_size); +} +#else +static inline void early_init_dt_handle_random_seed(unsigned long node) +{ +} +#endif + int __init early_init_dt_scan_chosen(unsigned long node, const char *uname, int depth, void *data) { @@ -1092,6 +1160,8 @@ fdt_totalsize(initial_boot_params)); } + early_init_dt_handle_random_seed(node); + /* break now */ return 1; } diff -ruw linux-5.4.60/drivers/of/Kconfig linux-5.4.60-fbx/drivers/of/Kconfig --- linux-5.4.60/drivers/of/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/of/Kconfig 2021-03-04 13:20:59.504172299 +0100 @@ -35,6 +35,11 @@ If unsure, say N here, but this option is safe to enable. +config OF_DTB_BUILTIN_LIST + string "Link given list of DTB files into kernel" + help + Specify filename without .dtb extension + config OF_FLATTREE bool select DTC @@ -103,6 +108,13 @@ config OF_NUMA bool +config OF_CONFIGFS + bool "Device Tree Overlay ConfigFS interface" + select CONFIGFS_FS + select OF_OVERLAY + help + Enable a simple user-space driven DT overlay interface. + config OF_DMA_DEFAULT_COHERENT # arches should select this if DMA is coherent by default for OF devices bool diff -ruw linux-5.4.60/drivers/of/Makefile linux-5.4.60-fbx/drivers/of/Makefile --- linux-5.4.60/drivers/of/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/of/Makefile 2021-03-04 13:20:59.504172299 +0100 @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-y = base.o device.o platform.o property.o obj-$(CONFIG_OF_KOBJ) += kobj.o +obj-$(CONFIG_OF_CONFIGFS) += configfs.o obj-$(CONFIG_OF_DYNAMIC) += dynamic.o obj-$(CONFIG_OF_FLATTREE) += fdt.o obj-$(CONFIG_OF_EARLY_FLATTREE) += fdt_address.o diff -ruw linux-5.4.60/drivers/of/of_net.c linux-5.4.60-fbx/drivers/of/of_net.c --- linux-5.4.60/drivers/of/of_net.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/of/of_net.c 2021-03-04 13:20:59.507505632 +0100 @@ -11,6 +11,7 @@ #include #include #include +#include /** * of_get_phy_mode - Get phy mode for given device_node @@ -97,6 +98,13 @@ const void *of_get_mac_address(struct device_node *np) { const void *addr; +#ifdef CONFIG_FBXSERIAL + struct property *pp; + + pp = of_find_property(np, "fbxserial-mac-address", NULL); + if (pp && pp->length == 4) + return fbxserialinfo_get_mac_addr(be32_to_cpu(*(u32*)pp->value)); +#endif addr = of_get_mac_addr(np, "mac-address"); if (addr) diff -ruw linux-5.4.60/drivers/of/overlay.c linux-5.4.60-fbx/drivers/of/overlay.c --- linux-5.4.60/drivers/of/overlay.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/of/overlay.c 2021-03-04 13:20:59.507505632 +0100 @@ -362,7 +362,7 @@ } if (!of_node_check_flag(target->np, OF_OVERLAY)) - pr_err("WARNING: memory leak will occur if overlay removed, property: %pOF/%s\n", + pr_debug("WARNING: memory leak will occur if overlay removed, property: %pOF/%s\n", target->np, new_prop->name); if (ret) { diff -ruw linux-5.4.60/drivers/pci/controller/dwc/pcie-armada8k.c linux-5.4.60-fbx/drivers/pci/controller/dwc/pcie-armada8k.c --- linux-5.4.60/drivers/pci/controller/dwc/pcie-armada8k.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/pci/controller/dwc/pcie-armada8k.c 2021-03-04 13:20:59.514172300 +0100 @@ -22,9 +22,12 @@ #include #include #include +#include #include "pcie-designware.h" +#include "../../pci.h" + #define ARMADA8K_PCIE_MAX_LANES PCIE_LNK_X4 struct armada8k_pcie { @@ -33,6 +36,7 @@ struct clk *clk_reg; struct phy *phy[ARMADA8K_PCIE_MAX_LANES]; unsigned int phy_count; + struct gpio_descs *reset_gpios; }; #define PCIE_VENDOR_REGS_OFFSET 0x8000 @@ -154,6 +158,57 @@ return 0; } +static void armada8k_pcie_reset_port(struct pcie_port *pp) +{ + struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + struct armada8k_pcie *pcie = to_armada8k_pcie(pci); + + /* + * Power up a PCIe port. PCIe requires the refclk to be + * stable for 100µs + * + * prior to releasing PERST. See table 2-4 in section 2.6.2 + * AC Specifications + * + * of the PCI Express Card Electromechanical Specification, 1.1. + */ + if (pcie->reset_gpios) { + struct gpio_descs *reset_gpios = pcie->reset_gpios; + u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000; + int i; + unsigned long values; + + dev_info(pci->dev, "using %u gpio(s) to reset bus", + reset_gpios->ndescs); + + /* + * explicitely assert reset. + */ + for (i = 0; i < reset_gpios->ndescs; i++) + __clear_bit(i, &values); + + gpiod_set_array_value_cansleep(reset_gpios->ndescs, + reset_gpios->desc, + NULL, + &values); + + udelay(150); + + /* + * deassert reset. + */ + for (i = 0; i < reset_gpios->ndescs; i++) + __set_bit(i, &values); + + gpiod_set_array_value_cansleep(reset_gpios->ndescs, + reset_gpios->desc, + NULL, + &values); + + msleep(reset_udelay / 1000); + } +} + static void armada8k_pcie_establish_link(struct armada8k_pcie *pcie) { struct dw_pcie *pci = pcie->pci; @@ -201,8 +256,13 @@ } /* Wait until the link becomes active again */ + if (dw_pcie_wait_for_link(pci)) { + dev_err(pci->dev, "Link not up after reconfiguration. " + "trying port reset\n"); + armada8k_pcie_reset_port(&pci->pp); if (dw_pcie_wait_for_link(pci)) - dev_err(pci->dev, "Link not up after reconfiguration\n"); + dev_err(pci->dev, "Link not up after reset.\n"); + } } static int armada8k_pcie_host_init(struct pcie_port *pp) @@ -211,6 +271,7 @@ struct armada8k_pcie *pcie = to_armada8k_pcie(pci); dw_pcie_setup_rc(pp); + armada8k_pcie_reset_port(pp); armada8k_pcie_establish_link(pcie); return 0; @@ -294,6 +355,23 @@ pcie->pci = pci; + /* get reset gpios */ + pcie->reset_gpios = devm_gpiod_get_array_optional(dev, + "reset", + GPIOD_OUT_LOW); + if (IS_ERR(pcie->reset_gpios)) { + ret = PTR_ERR(pcie->reset_gpios); + dev_err(dev, "failed to parse reset-gpios property: %d\n", ret); + return ret; + } + + if (pcie->reset_gpios->ndescs > BITS_PER_LONG) { + dev_err(dev, "too may reset GPIOs given (%d), max %d is " + "supported.\n", pcie->reset_gpios->ndescs, + BITS_PER_LONG); + return -EINVAL; + } + pcie->clk = devm_clk_get(dev, NULL); if (IS_ERR(pcie->clk)) return PTR_ERR(pcie->clk); diff -ruw linux-5.4.60/drivers/pci/controller/dwc/pcie-designware-host.c linux-5.4.60-fbx/drivers/pci/controller/dwc/pcie-designware-host.c --- linux-5.4.60/drivers/pci/controller/dwc/pcie-designware-host.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/pci/controller/dwc/pcie-designware-host.c 2021-03-04 13:20:59.514172300 +0100 @@ -79,7 +79,7 @@ { int i, pos, irq; unsigned long val; - u32 status, num_ctrls; + u32 num_ctrls; irqreturn_t ret = IRQ_NONE; num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; @@ -87,14 +87,14 @@ for (i = 0; i < num_ctrls; i++) { dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_STATUS + (i * MSI_REG_CTRL_BLOCK_SIZE), - 4, &status); - if (!status) + 4, (unsigned int *)&val); + if (!val) continue; ret = IRQ_HANDLED; - val = status; pos = 0; - while ((pos = find_next_bit(&val, MAX_MSI_IRQS_PER_CTRL, + while ((pos = find_next_bit(&val, + MAX_MSI_IRQS_PER_CTRL, pos)) != MAX_MSI_IRQS_PER_CTRL) { irq = irq_find_mapping(pp->irq_domain, (i * MAX_MSI_IRQS_PER_CTRL) + diff -ruw linux-5.4.60/drivers/pci/controller/Kconfig linux-5.4.60-fbx/drivers/pci/controller/Kconfig --- linux-5.4.60/drivers/pci/controller/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/pci/controller/Kconfig 2021-03-04 13:20:59.514172300 +0100 @@ -265,6 +265,11 @@ This can lead to data corruption if drivers perform concurrent config and MMIO accesses. +config PCIE_BCM63XX + tristate "BCM63XX SoCs PCIe endpoint driver." + depends on ARCH_BCM63XX || COMPILE_TEST + depends on OF + config VMD depends on PCI_MSI && X86_64 && SRCU select X86_DEV_DMA_OPS diff -ruw linux-5.4.60/drivers/pci/controller/Makefile linux-5.4.60-fbx/drivers/pci/controller/Makefile --- linux-5.4.60/drivers/pci/controller/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/pci/controller/Makefile 2021-03-04 13:20:59.514172300 +0100 @@ -29,6 +29,7 @@ obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o +obj-$(CONFIG_PCIE_BCM63XX) += pcie-bcm63xx.o obj-$(CONFIG_VMD) += vmd.o # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW obj-y += dwc/ diff -ruw linux-5.4.60/drivers/pci/quirks.c linux-5.4.60-fbx/drivers/pci/quirks.c --- linux-5.4.60/drivers/pci/quirks.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/pci/quirks.c 2021-03-04 13:20:59.527505633 +0100 @@ -3083,6 +3083,8 @@ dev->is_hotplug_bridge = 1; } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HINT, 0x0020, quirk_hotplug_bridge); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PERICOM, PCI_DEVICE_ID_PI7C9X20303SL, + quirk_hotplug_bridge); /* * This is a quirk for the Ricoh MMC controller found as a part of some diff -ruw linux-5.4.60/drivers/phy/broadcom/Kconfig linux-5.4.60-fbx/drivers/phy/broadcom/Kconfig --- linux-5.4.60/drivers/phy/broadcom/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/phy/broadcom/Kconfig 2021-03-04 13:20:59.537505634 +0100 @@ -29,6 +29,11 @@ help Enable this to support the Broadcom Kona USB 2.0 PHY. +config PHY_BRCM_USB_63138 + tristate "Broadcom 63138 USB 2.0/3.0 PHY Driver" + depends on ARCH_BCM_63XX || COMPILE_TEST + select GENERIC_PHY + config PHY_BCM_NS_USB2 tristate "Broadcom Northstar USB 2.0 PHY Driver" depends on ARCH_BCM_IPROC || COMPILE_TEST diff -ruw linux-5.4.60/drivers/phy/broadcom/Makefile linux-5.4.60-fbx/drivers/phy/broadcom/Makefile --- linux-5.4.60/drivers/phy/broadcom/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/phy/broadcom/Makefile 2021-03-04 13:20:59.537505634 +0100 @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o +obj-$(CONFIG_PHY_BRCM_USB_63138) += phy-brcm-usb-63138.o obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o obj-$(CONFIG_PHY_BCM_NS_USB2) += phy-bcm-ns-usb2.o obj-$(CONFIG_PHY_BCM_NS_USB3) += phy-bcm-ns-usb3.o diff -ruw linux-5.4.60/drivers/phy/Kconfig linux-5.4.60-fbx/drivers/phy/Kconfig --- linux-5.4.60/drivers/phy/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/phy/Kconfig 2021-03-04 13:20:59.537505634 +0100 @@ -49,6 +49,10 @@ help This option enables support for APM X-Gene SoC multi-purpose PHY. +config XDSL_PHY_API + tristate "xDSL PHY API" + select GENERIC_PHY + source "drivers/phy/allwinner/Kconfig" source "drivers/phy/amlogic/Kconfig" source "drivers/phy/broadcom/Kconfig" diff -ruw linux-5.4.60/drivers/phy/Makefile linux-5.4.60-fbx/drivers/phy/Makefile --- linux-5.4.60/drivers/phy/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/phy/Makefile 2021-03-04 13:20:59.537505634 +0100 @@ -8,6 +8,8 @@ obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o obj-$(CONFIG_PHY_XGENE) += phy-xgene.o obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o +obj-$(CONFIG_XDSL_PHY_API) += xdsl_phy_api.o + obj-$(CONFIG_ARCH_SUNXI) += allwinner/ obj-$(CONFIG_ARCH_MESON) += amlogic/ obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ diff -ruw linux-5.4.60/drivers/phy/marvell/Kconfig linux-5.4.60-fbx/drivers/phy/marvell/Kconfig --- linux-5.4.60/drivers/phy/marvell/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/phy/marvell/Kconfig 2021-03-04 13:20:59.540838967 +0100 @@ -103,3 +103,11 @@ The PHY driver will be used by Marvell udc/ehci/otg driver. To compile this driver as a module, choose M here. + +config PHY_UTMI_CP110 + bool "Marvell CP110 UTMI PHY Driver" + depends on ARCH_MVEBU + depends on OF + help + Enable this to support Marvell USB2.0 PHY driver for Marvell + CP110-based SoCs (A7K and A8K). diff -ruw linux-5.4.60/drivers/phy/marvell/Makefile linux-5.4.60-fbx/drivers/phy/marvell/Makefile --- linux-5.4.60/drivers/phy/marvell/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/phy/marvell/Makefile 2021-03-04 13:20:59.540838967 +0100 @@ -10,3 +10,4 @@ obj-$(CONFIG_PHY_PXA_28NM_HSIC) += phy-pxa-28nm-hsic.o obj-$(CONFIG_PHY_PXA_28NM_USB2) += phy-pxa-28nm-usb2.o obj-$(CONFIG_PHY_PXA_USB) += phy-pxa-usb.o +obj-$(CONFIG_PHY_UTMI_CP110) += phy-utmi-cp110.o diff -ruw linux-5.4.60/drivers/phy/marvell/phy-mvebu-cp110-comphy.c linux-5.4.60-fbx/drivers/phy/marvell/phy-mvebu-cp110-comphy.c --- linux-5.4.60/drivers/phy/marvell/phy-mvebu-cp110-comphy.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/phy/marvell/phy-mvebu-cp110-comphy.c 2021-03-04 13:20:59.540838967 +0100 @@ -32,6 +32,7 @@ #define MVEBU_COMPHY_SERDES_CFG1_RF_RESET BIT(6) #define MVEBU_COMPHY_SERDES_CFG2(n) (0x8 + (n) * 0x1000) #define MVEBU_COMPHY_SERDES_CFG2_DFE_EN BIT(4) +#define MVEBU_COMPHY_SERDES_CFG2_SSC_EN BIT(7) #define MVEBU_COMPHY_SERDES_STATUS0(n) (0x18 + (n) * 0x1000) #define MVEBU_COMPHY_SERDES_STATUS0_TX_PLL_RDY BIT(2) #define MVEBU_COMPHY_SERDES_STATUS0_RX_PLL_RDY BIT(3) @@ -49,7 +50,9 @@ #define MVEBU_COMPHY_COEF_DFE_CTRL BIT(15) #define MVEBU_COMPHY_GEN1_S0(n) (0x834 + (n) * 0x1000) #define MVEBU_COMPHY_GEN1_S0_TX_AMP(n) ((n) << 1) +#define MVEBU_COMPHY_GEN1_S0_TX_AMP_ADJ BIT(6) #define MVEBU_COMPHY_GEN1_S0_TX_EMPH(n) ((n) << 7) +#define MVEBU_COMPHY_GEN1_S0_TX_EMPH_EN BIT(11) #define MVEBU_COMPHY_GEN1_S1(n) (0x838 + (n) * 0x1000) #define MVEBU_COMPHY_GEN1_S1_RX_MUL_PI(n) ((n) << 0) #define MVEBU_COMPHY_GEN1_S1_RX_MUL_PF(n) ((n) << 3) @@ -57,21 +60,66 @@ #define MVEBU_COMPHY_GEN1_S1_RX_MUL_FF(n) ((n) << 8) #define MVEBU_COMPHY_GEN1_S1_RX_DFE_EN BIT(10) #define MVEBU_COMPHY_GEN1_S1_RX_DIV(n) ((n) << 11) +#define MVEBU_COMPHY_GEN2_S0(n) (0x83c + (n) * 0x1000) +#define MVEBU_COMPHY_GEN2_S0_TX_AMP(n) ((n) << 1) +#define MVEBU_COMPHY_GEN2_S0_TX_AMP_ADJ BIT(6) +#define MVEBU_COMPHY_GEN2_S0_TX_EMPH(n) ((n) << 7) +#define MVEBU_COMPHY_GEN2_S0_TX_EMPH_EN BIT(11) +#define MVEBU_COMPHY_GEN2_S1(n) (0x840 + (n) * 0x1000) +#define MVEBU_COMPHY_GEN2_S1_RX_MUL_PI(n) ((n) << 0) +#define MVEBU_COMPHY_GEN2_S1_RX_MUL_PF(n) ((n) << 3) +#define MVEBU_COMPHY_GEN2_S1_RX_MUL_FI(n) ((n) << 6) +#define MVEBU_COMPHY_GEN2_S1_RX_MUL_FF(n) ((n) << 8) +#define MVEBU_COMPHY_GEN2_S1_RX_DFE_EN BIT(10) +#define MVEBU_COMPHY_GEN2_S1_RX_DIV(n) ((n) << 11) +#define MVEBU_COMPHY_GEN3_S0(n) (0x844 + (n) * 0x1000) +#define MVEBU_COMPHY_GEN3_S0_TX_AMP(n) ((n) << 1) +#define MVEBU_COMPHY_GEN3_S0_TX_AMP_ADJ BIT(6) +#define MVEBU_COMPHY_GEN3_S0_TX_EMPH(n) ((n) << 7) +#define MVEBU_COMPHY_GEN3_S0_TX_EMPH_EN BIT(11) +#define MVEBU_COMPHY_GEN3_S0_TX_SLEW_RATE_SEL(n) ((n) << 12) +#define MVEBU_COMPHY_GEN3_S0_TX_SLEW_CTRL_EN BIT(15) +#define MVEBU_COMPHY_GEN3_S1(n) (0x848 + (n) * 0x1000) +#define MVEBU_COMPHY_GEN3_S1_RX_MUL_PI(n) ((n) << 0) +#define MVEBU_COMPHY_GEN3_S1_RX_MUL_PF(n) ((n) << 3) +#define MVEBU_COMPHY_GEN3_S1_RX_MUL_FI(n) ((n) << 6) +#define MVEBU_COMPHY_GEN3_S1_RX_MUL_FF(n) ((n) << 8) +#define MVEBU_COMPHY_GEN3_S1_RX_DFE_EN BIT(10) +#define MVEBU_COMPHY_GEN3_S1_RX_DIV(n) ((n) << 11) +#define MVEBU_COMPHY_GEN3_S1_SMPL_INPX2_EN BIT(13) #define MVEBU_COMPHY_GEN1_S2(n) (0x8f4 + (n) * 0x1000) #define MVEBU_COMPHY_GEN1_S2_TX_EMPH(n) ((n) << 0) #define MVEBU_COMPHY_GEN1_S2_TX_EMPH_EN BIT(4) #define MVEBU_COMPHY_LOOPBACK(n) (0x88c + (n) * 0x1000) #define MVEBU_COMPHY_LOOPBACK_DBUS_WIDTH(n) ((n) << 1) +#define MVEBU_COMPHY_SYNC_PATTERN(n) (0x890 + (n) * 0x1000) +#define MVEBU_COMPHY_SYNC_PATTERN_RXD_INV BIT(11) +#define MVEBU_COMPHY_SYNC_PATTERN_TXD_INV BIT(10) +#define MVEBU_COMPHY_INTERFACE(n) (0x894 + (n) * 0x1000) +#define MVEBU_COMPHY_INTERFACE_GEN_MAX(n) ((n) << 10) +#define MVEBU_COMPHY_INTERFACE_DET_BYPASS BIT(12) +#define MVEBU_COMPHY_INTERFACE_LINK_TRAIN BIT(14) #define MVEBU_COMPHY_VDD_CAL0(n) (0x908 + (n) * 0x1000) #define MVEBU_COMPHY_VDD_CAL0_CONT_MODE BIT(15) #define MVEBU_COMPHY_EXT_SELV(n) (0x914 + (n) * 0x1000) #define MVEBU_COMPHY_EXT_SELV_RX_SAMPL(n) ((n) << 5) +#define MVEBU_COMPHY_PCIE_REG0(n) (0x920 + (n) * 0x1000) +#define MVEBU_COMPHY_PCIE_REG0_IDLE_SYNC BIT(12) +#define MVEBU_COMPHY_PCIE_REG0_SEL_BITS(n) ((n) << 13) +#define MVEBU_COMPHY_LANE_ALIGN(n) (0x924 + (n) * 0x1000) +#define MVEBU_COMPHY_LANE_ALIGN_BIT BIT(12) #define MVEBU_COMPHY_MISC_CTRL0(n) (0x93c + (n) * 0x1000) +#define MVEBU_COMPHY_MISC_CTRL0_CLK100M_125M BIT(4) #define MVEBU_COMPHY_MISC_CTRL0_ICP_FORCE BIT(5) +#define MVEBU_COMPHY_MISC_CTRL0_TXDCLK_2X BIT(6) +#define MVEBU_COMPHY_MISC_CTRL0_CLK500M_EN BIT(7) #define MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL BIT(10) #define MVEBU_COMPHY_RX_CTRL1(n) (0x940 + (n) * 0x1000) #define MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL BIT(11) #define MVEBU_COMPHY_RX_CTRL1_CLK8T_EN BIT(12) +#define MVEBU_COMPHY_PWR_CTR(n) (0x948 + (n) * 0x1000) +#define MVEBU_COMPHY_PWR_CTR_RST_DFE BIT(0) +#define MVEBU_COMPHY_PWR_CTR_SOFT_RST BIT(10) #define MVEBU_COMPHY_SPEED_DIV(n) (0x954 + (n) * 0x1000) #define MVEBU_COMPHY_SPEED_DIV_TX_FORCE BIT(7) #define MVEBU_SP_CALIB(n) (0x96c + (n) * 0x1000) @@ -81,7 +129,21 @@ #define MVEBU_COMPHY_TX_SLEW_RATE_EMPH(n) ((n) << 5) #define MVEBU_COMPHY_TX_SLEW_RATE_SLC(n) ((n) << 10) #define MVEBU_COMPHY_DTL_CTRL(n) (0x984 + (n) * 0x1000) +#define MVEBU_COMPHY_DTL_CTRL_DTL_DET_EN BIT(0) +#define MVEBU_COMPHY_DTL_CTRL_DTL_PLOOP_EN BIT(1) #define MVEBU_COMPHY_DTL_CTRL_DTL_FLOOP_EN BIT(2) +#define MVEBU_COMPHY_DTL_CTRL_DTL_CLAMP_SEL(n) ((n) << 4) +#define MVEBU_COMPHY_DTL_CTRL_DTL_INPCLK_DIV_FORCE BIT(10) +#define MVEBU_COMPHY_DTL_CTRL_DTL_CLK_MODE(n) ((n) << 12) +#define MVEBU_COMPHY_DTL_CTRL_DTL_CLK_MODE_FORCE BIT(14) +#define MVEBU_COMPHY_PHASE_CTRL(n) (0x988 + (n) * 0x1000) +#define MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF(n) ((n) << 0) +#define MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_FORCE BIT(7) +#define MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_VALID BIT(8) +#define MVEBU_COMPHY_TX_TRAIN_CTRL(n) (0xa6c + (n) * 0x1000) +#define MVEBU_COMPHY_TX_TRAIN_CTRL_G1 BIT(0) +#define MVEBU_COMPHY_TX_TRAIN_CTRL_GN1 BIT(1) +#define MVEBU_COMPHY_TX_TRAIN_CTRL_G0 BIT(2) #define MVEBU_COMPHY_FRAME_DETECT0(n) (0xa14 + (n) * 0x1000) #define MVEBU_COMPHY_FRAME_DETECT0_PATN(n) ((n) << 7) #define MVEBU_COMPHY_FRAME_DETECT3(n) (0xa20 + (n) * 0x1000) @@ -90,24 +152,100 @@ #define MVEBU_COMPHY_DME_ETH_MODE BIT(7) #define MVEBU_COMPHY_TRAINING0(n) (0xa68 + (n) * 0x1000) #define MVEBU_COMPHY_TRAINING0_P2P_HOLD BIT(15) +#define MVEBU_COMPHY_TRAINING4(n) (0xa78 + (n) * 0x1000) +#define MVEBU_COMPHY_TRAINING4_TIMER(n) ((n) << 0) #define MVEBU_COMPHY_TRAINING5(n) (0xaa4 + (n) * 0x1000) #define MVEBU_COMPHY_TRAINING5_RX_TIMER(n) ((n) << 0) +#define MVEBU_COMPHY_TRAINING5_START_SQ_EN BIT(11) +#define MVEBU_COMPHY_TRAINING5_FRM_DET_EN BIT(12) +#define MVEBU_COMPHY_TRAINING5_FRM_LOCK_EN BIT(13) +#define MVEBU_COMPHY_TRAINING5_WAIT_TIME_EN BIT(14) #define MVEBU_COMPHY_TX_TRAIN_PRESET(n) (0xb1c + (n) * 0x1000) +#define MVEBU_COMPHY_TX_TRAIN_CHK_INIT BIT(4) +#define MVEBU_COMPHY_TX_TRAIN_COEF_FM_PIN_PCIE3 BIT(7) #define MVEBU_COMPHY_TX_TRAIN_PRESET_16B_AUTO_EN BIT(8) #define MVEBU_COMPHY_TX_TRAIN_PRESET_PRBS11 BIT(9) +#define MVEBU_COMPHY_CDR_CONTROL(n) (0xc18 + (n) * 0x1000) +#define MVEBU_COMPHY_CDR_CONTROL_RX_MAX_DFE_ADAPT_1(n) ((n) << 12) +#define MVEBU_COMPHY_CDR_CONTROL_MAX_DFE_ADAPT_0(n) ((n) << 9) +#define MVEBU_COMPHY_CDR_CONTROL_MAX_DFE_ADAPT_1(n) ((n) << 6) +#define MVEBU_COMPHY_TX_TRAINING11(n) (0xc38 + (n) * 0x1000) +#define MVEBU_COMPHY_TX_TRAINING11_CHECK_MODE BIT(6) +#define MVEBU_COMPHY_TX_TRAINING11_PRESET_NUM(n) ((n) << 10) +#define MVEBU_COMPHY_TX_TRAINING11_PRESET_EN BIT(15) #define MVEBU_COMPHY_GEN1_S3(n) (0xc40 + (n) * 0x1000) +#define MVEBU_COMPHY_GEN1_S3_FFE_CAP_SEL(n) ((n) << 0) +#define MVEBU_COMPHY_GEN1_S3_FFE_RES_SEL(n) ((n) << 4) +#define MVEBU_COMPHY_GEN1_S3_SETTING_FORCE BIT(7) #define MVEBU_COMPHY_GEN1_S3_FBCK_SEL BIT(9) +#define MVEBU_COMPHY_GEN1_S3_FFE_DEG_RES_LVL(n) ((n) << 12) +#define MVEBU_COMPHY_GEN1_S3_FFE_LOAD_RES_LVL(n) ((n) << 14) #define MVEBU_COMPHY_GEN1_S4(n) (0xc44 + (n) * 0x1000) #define MVEBU_COMPHY_GEN1_S4_DFE_RES(n) ((n) << 8) +#define MVEBU_COMPHY_GEN2_S4(n) (0xc4c + (n) * 0x1000) +#define MVEBU_COMPHY_GEN2_S4_DFE_RES(n) ((n) << 8) +#define MVEBU_COMPHY_GEN3_S3(n) (0xc50 + (n) * 0x1000) +#define MVEBU_COMPHY_GEN3_S3_FFE_CAP_SEL(n) ((n) << 0) +#define MVEBU_COMPHY_GEN3_S3_FFE_RES_SEL(n) ((n) << 4) +#define MVEBU_COMPHY_GEN3_S3_SETTING_FORCE BIT(7) +#define MVEBU_COMPHY_GEN3_S3_FBCK_SEL BIT(9) +#define MVEBU_COMPHY_GEN3_S3_FFE_DEG_RES_LVL(n) ((n) << 12) +#define MVEBU_COMPHY_GEN3_S3_FFE_LOAD_RES_LVL(n) ((n) << 14) +#define MVEBU_COMPHY_GEN3_S4(n) (0xc54 + (n) * 0x1000) +#define MVEBU_COMPHY_GEN3_S4_DFE_RES(n) ((n) << 8) #define MVEBU_COMPHY_TX_PRESET(n) (0xc68 + (n) * 0x1000) #define MVEBU_COMPHY_TX_PRESET_INDEX(n) ((n) << 0) +#define MVEBU_COMPHY_DFE_CTRL(n) (0xc70 + (n) * 0x1000) +#define MVEBU_COMPHY_DFE_CTRL_TX_MAX_DFE_ADAPT(n) ((n) << 14) +#define MVEBU_COMPHY_DFE_CTRL_28(n) (0xc9c + (n) * 0x1000) +#define MVEBU_COMPHY_DFE_CTRL_28_PIPE4 BIT(7) #define MVEBU_COMPHY_GEN1_S5(n) (0xd38 + (n) * 0x1000) #define MVEBU_COMPHY_GEN1_S5_ICP(n) ((n) << 0) +#define MVEBU_COMPHY_GEN3_S5(n) (0xd48 + (n) * 0x1000) +#define MVEBU_COMPHY_GEN3_S5_ICP(n) ((n) << 0) +#define MVEBU_COMPHY_LANE_CFG0(n) (0xe00 + (n) * 0x1000) +#define MVEBU_COMPHY_LANE_CFG0_PRD_TXEEMPH0 BIT(0) +#define MVEBU_COMPHY_LANE_STATUS0(n) (0xe0c + (n) * 0x1000) +#define MVEBU_COMPHY_LANE_STATUS0_PCLK_EN BIT(0) +#define MVEBU_COMPHY_LANE_CFG4(n) (0xe20 + (n) * 0x1000) +#define MVEBU_COMPHY_LANE_CFG4_DFE_CTRL(n) ((n) << 0) +#define MVEBU_COMPHY_LANE_CFG4_DFE_EN_SEL BIT(3) +#define MVEBU_COMPHY_LANE_CFG4_DFE_OVER BIT(6) +#define MVEBU_COMPHY_LANE_CFG4_DFE_SSC BIT(7) +#define MVEBU_COMPHY_EQ_CONFIG0(n) (0xe9c + (n) * 0x1000) +#define MVEBU_COMPHY_EQ_CONFIG0_RC_MODE BIT(12) +#define MVEBU_COMPHY_LANE_EQ_CFG1(n) (0xea0 + (n) * 0x1000) +#define MVEBU_COMPHY_LANE_EQ_CFG1_UPDATE_POLARITY BIT(12) +#define MVEBU_COMPHY_LANE_EQ_REMOTE_CFG(n) (0xef8 + (n) * 0x1000) +#define MVEBU_COMPHY_LANE_EQ_REMOTE_CFG_DIRN_OVERRIDE BIT(0) +#define MVEBU_COMPHY_LANE_EQ_REMOTE_CFG_ONLY_MODE BIT(1) +#define MVEBU_COMPHY_LANE_EQ_REMOTE_CFG_PRESET_VECTOR(n) ((n) << 2) +#define MVEBU_COMPHY_PIPE_RST_CLK_CTRL(n) (0xf04 + (n) * 0x1000) +#define MVEBU_COMPHY_PIPE_RST_CLK_CTRL_RST BIT(0) +#define MVEBU_COMPHY_PIPE_RST_CLK_CTRL_FIXED_PCLK BIT(2) +#define MVEBU_COMPHY_PIPE_RST_CLK_CTRL_PIPE_WIDTH BIT(3) +#define MVEBU_COMPHY_PIPE_RST_CLK_CTRL_FREQ_SEL BIT(9) +#define MVEBU_COMPHY_MODE_CTRL(n) (0xf08 + (n) * 0x1000) +#define MVEBU_COMPHY_MODE_CTRL_MODE_MARGIN BIT(2) +#define MVEBU_COMPHY_PIPE_CLK_SRC_LO(n) (0xf0c + (n) * 0x1000) +#define MVEBU_COMPHY_PIPE_CLK_SRC_LO_PERIOD_SEL BIT(1) +#define MVEBU_COMPHY_PIPE_CLK_SRC_LO_PERIOD_SCALE(n) ((n) << 2) +#define MVEBU_COMPHY_PIPE_CLK_SRC_LO_PLL_RDY_DL(n) ((n) << 5) +#define MVEBU_COMPHY_PIPE_CLK_SRC_HI(n) (0xf10 + (n) * 0x1000) +#define MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_START BIT(0) +#define MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_BREAK BIT(1) +#define MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_MASTER BIT(2) +#define MVEBU_COMPHY_PIPE_CLK_SRC_HI_MODE_PIPE BIT(7) +#define MVEBU_COMPHY_PIPE_PM_CTRL(n) (0xf40 + (n) * 0x1000) +#define MVEBU_COMPHY_PIPE_PM_CTRL_RDLOZ_WAIT(n) ((n) << 0) /* Relative to priv->regmap */ #define MVEBU_COMPHY_CONF1(n) (0x1000 + (n) * 0x28) #define MVEBU_COMPHY_CONF1_PWRUP BIT(1) #define MVEBU_COMPHY_CONF1_USB_PCIE BIT(2) /* 0: Ethernet/SATA */ +#define MVEBU_COMPHY_CONF1_POR BIT(14) +#define MVEBU_COMPHY_CONF1_CORE_RESET BIT(13) +#define MVEBU_COMPHY_CONF1_PHY_MODE_USB BIT(15) /* 1: USB */ #define MVEBU_COMPHY_CONF6(n) (0x1014 + (n) * 0x28) #define MVEBU_COMPHY_CONF6_40B BIT(18) #define MVEBU_COMPHY_SELECTOR 0x1140 @@ -117,6 +255,20 @@ #define MVEBU_COMPHY_SD1_CTRL1 0x1148 #define MVEBU_COMPHY_SD1_CTRL1_RXAUI1_EN BIT(26) #define MVEBU_COMPHY_SD1_CTRL1_RXAUI0_EN BIT(27) +#define MVEBU_COMPHY_SD1_CTRL1_PCIE_X2_EN BIT(25) +#define MVEBU_COMPHY_SD1_CTRL1_PCIE_X4_EN BIT(24) +#define MVEBU_COMPHY_SD1_CTRL1_PHY0_3_MASK 0xffff +#define MVEBU_COMPHY_SD1_CTRL1_PHY0_1_MASK 0x00ff + +/* Relative to priv->cp_mgmt_regmap */ +#define DEVICE_SAR0 0x200 +#define DEV_SAR0_PCIE1_CLK_CP0 BIT(3) +#define DEV_SAR0_PCIE0_CLK_CP0 BIT(2) +#define DEV_SAR0_PCIE1_CLK_CP1 BIT(1) +#define DEV_SAR0_PCIE0_CLK_CP1 BIT(0) +#define DEVICE_SAR1 0x204 +#define DFX_DEV_GEN_CTRL12 0x280 +#define DFX_DEV_GEN_CTRL12_CLK_SRC(n) ((n) << 7) #define MVEBU_COMPHY_LANES 6 #define MVEBU_COMPHY_PORTS 3 @@ -194,27 +346,69 @@ .fw_mode = _fw, \ } -#define GEN_CONF(_lane, _port, _mode, _fw) \ +#define GEN_CONF(_lane, _port, _mode, _mux, _fw) \ { \ .lane = _lane, \ .port = _port, \ .mode = _mode, \ .submode = PHY_INTERFACE_MODE_NA, \ - .mux = -1, \ + .mux = _mux, \ .fw_mode = _fw, \ } +#define MVEBU_COMPHY_PIPE_CONF(_lane, _port, _mode, _mux) \ + { \ + .lane = _lane, \ + .port = _port, \ + .mode = _mode, \ + .submode = 0, \ + .mux = _mux, \ + } + +/* + * default values for 10GKR comphys amplitudes/emphasises. Those work + * on the A8K DB board, but most likely won't be suitable for other + * boards. + * + * The Marvell A8K DB board has a fairly long trace length from the + * CPU to the SFP cage, and a connector in between, therefore it needs + * fairly bosted up amplitude and emphasis settings in order to get a + * descent eye diagram. + * + * On other designs with shorter traces lengths this will most likely + * result in a fairly large overshoot of the signal and bad signal + * integrity. + */ +#define DEFAULT_GEN1_S0_AMP 0x1c +#define DEFAULT_GEN1_S0_EMPH 0xe +#define DEFAULT_GEN1_S2_EMPH 0x0 + +#define KR_DEFAULT_FFE_CAP_SEL 0xe +#define KR_DEFAULT_FFE_RES_SEL 0x4 +#define KR_DEFAULT_DFE_RES 0x1 +#define KR_DEFAULT_PHASE_OFFSET 0x60 + +/* + * default values for SATA comphys amplitudes/emphasises and DFE + * resolutions. Those work on the A8K DB board, but most likely won't + * be suitable for other boards. + */ +#define SATA_DEFAULT_GEN3_S0_AMP 0x1e +#define SATA_DEFAULT_GEN3_S0_EMPH 0x06 +#define SATA_DEFAULT_GEN3_S4_DFE_RES 0x2 +#define SATA_DEFAULT_PHASE_OFFSET 0x61 + static const struct mvebu_comphy_conf mvebu_comphy_cp110_modes[] = { /* lane 0 */ - GEN_CONF(0, 0, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), + GEN_CONF(0, 0, PHY_MODE_PCIE, 0x4, COMPHY_FW_MODE_PCIE), ETH_CONF(0, 1, PHY_INTERFACE_MODE_SGMII, 0x1, COMPHY_FW_MODE_SGMII), ETH_CONF(0, 1, PHY_INTERFACE_MODE_2500BASEX, 0x1, COMPHY_FW_MODE_HS_SGMII), - GEN_CONF(0, 1, PHY_MODE_SATA, COMPHY_FW_MODE_SATA), + GEN_CONF(0, 1, PHY_MODE_SATA, 0x4, COMPHY_FW_MODE_SATA), /* lane 1 */ - GEN_CONF(1, 0, PHY_MODE_USB_HOST_SS, COMPHY_FW_MODE_USB3H), - GEN_CONF(1, 0, PHY_MODE_USB_DEVICE_SS, COMPHY_FW_MODE_USB3D), - GEN_CONF(1, 0, PHY_MODE_SATA, COMPHY_FW_MODE_SATA), - GEN_CONF(1, 0, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), + GEN_CONF(1, 0, PHY_MODE_USB_HOST_SS, 0x1, COMPHY_FW_MODE_USB3H), + GEN_CONF(1, 0, PHY_MODE_USB_DEVICE_SS, 0x2, COMPHY_FW_MODE_USB3D), + GEN_CONF(1, 0, PHY_MODE_SATA, 0x4, COMPHY_FW_MODE_SATA), + GEN_CONF(1, 0, PHY_MODE_PCIE, 0x4, COMPHY_FW_MODE_PCIE), ETH_CONF(1, 2, PHY_INTERFACE_MODE_SGMII, 0x1, COMPHY_FW_MODE_SGMII), ETH_CONF(1, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1, COMPHY_FW_MODE_HS_SGMII), /* lane 2 */ @@ -222,43 +416,73 @@ ETH_CONF(2, 0, PHY_INTERFACE_MODE_2500BASEX, 0x1, COMPHY_FW_MODE_HS_SGMII), ETH_CONF(2, 0, PHY_INTERFACE_MODE_RXAUI, 0x1, COMPHY_FW_MODE_RXAUI), ETH_CONF(2, 0, PHY_INTERFACE_MODE_10GKR, 0x1, COMPHY_FW_MODE_XFI), - GEN_CONF(2, 0, PHY_MODE_USB_HOST_SS, COMPHY_FW_MODE_USB3H), - GEN_CONF(2, 0, PHY_MODE_SATA, COMPHY_FW_MODE_SATA), - GEN_CONF(2, 0, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), + GEN_CONF(2, 0, PHY_MODE_USB_HOST_SS, 0x1, COMPHY_FW_MODE_USB3H), + GEN_CONF(2, 0, PHY_MODE_SATA, 0x4, COMPHY_FW_MODE_SATA), + GEN_CONF(2, 0, PHY_MODE_PCIE, 0x4, COMPHY_FW_MODE_PCIE), /* lane 3 */ - GEN_CONF(3, 0, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), + GEN_CONF(3, 0, PHY_MODE_PCIE, 0x4, COMPHY_FW_MODE_PCIE), ETH_CONF(3, 1, PHY_INTERFACE_MODE_SGMII, 0x2, COMPHY_FW_MODE_SGMII), ETH_CONF(3, 1, PHY_INTERFACE_MODE_2500BASEX, 0x2, COMPHY_FW_MODE_HS_SGMII), ETH_CONF(3, 1, PHY_INTERFACE_MODE_RXAUI, 0x1, COMPHY_FW_MODE_RXAUI), - GEN_CONF(3, 1, PHY_MODE_USB_HOST_SS, COMPHY_FW_MODE_USB3H), - GEN_CONF(3, 1, PHY_MODE_SATA, COMPHY_FW_MODE_SATA), + GEN_CONF(3, 1, PHY_MODE_USB_HOST_SS, 0x1, COMPHY_FW_MODE_USB3H), + GEN_CONF(3, 1, PHY_MODE_SATA, 0x4, COMPHY_FW_MODE_SATA), /* lane 4 */ ETH_CONF(4, 0, PHY_INTERFACE_MODE_SGMII, 0x2, COMPHY_FW_MODE_SGMII), ETH_CONF(4, 0, PHY_INTERFACE_MODE_2500BASEX, 0x2, COMPHY_FW_MODE_HS_SGMII), ETH_CONF(4, 0, PHY_INTERFACE_MODE_10GKR, 0x2, COMPHY_FW_MODE_XFI), ETH_CONF(4, 0, PHY_INTERFACE_MODE_RXAUI, 0x2, COMPHY_FW_MODE_RXAUI), - GEN_CONF(4, 0, PHY_MODE_USB_DEVICE_SS, COMPHY_FW_MODE_USB3D), - GEN_CONF(4, 1, PHY_MODE_USB_HOST_SS, COMPHY_FW_MODE_USB3H), - GEN_CONF(4, 1, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), + GEN_CONF(4, 0, PHY_MODE_USB_DEVICE_SS, 0x2, COMPHY_FW_MODE_USB3D), + GEN_CONF(4, 1, PHY_MODE_USB_HOST_SS, 0x1, COMPHY_FW_MODE_USB3H), + GEN_CONF(4, 1, PHY_MODE_PCIE, 0x4, COMPHY_FW_MODE_PCIE), ETH_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1, COMPHY_FW_MODE_SGMII), ETH_CONF(4, 1, PHY_INTERFACE_MODE_2500BASEX, -1, COMPHY_FW_MODE_HS_SGMII), ETH_CONF(4, 1, PHY_INTERFACE_MODE_10GKR, -1, COMPHY_FW_MODE_XFI), /* lane 5 */ ETH_CONF(5, 1, PHY_INTERFACE_MODE_RXAUI, 0x2, COMPHY_FW_MODE_RXAUI), - GEN_CONF(5, 1, PHY_MODE_SATA, COMPHY_FW_MODE_SATA), + GEN_CONF(5, 1, PHY_MODE_SATA, 0x4, COMPHY_FW_MODE_SATA), ETH_CONF(5, 2, PHY_INTERFACE_MODE_SGMII, 0x1, COMPHY_FW_MODE_SGMII), ETH_CONF(5, 2, PHY_INTERFACE_MODE_2500BASEX, 0x1, COMPHY_FW_MODE_HS_SGMII), - GEN_CONF(5, 2, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), + GEN_CONF(5, 2, PHY_MODE_PCIE, 0x4, COMPHY_FW_MODE_PCIE), +}; + +static const struct mvebu_comphy_conf mvebu_comphy_cp110_pipe_modes[] = { + /* lane 0 */ + MVEBU_COMPHY_PIPE_CONF(0, 0, PHY_MODE_PCIE, 0x4), + + /* lane 1 */ + MVEBU_COMPHY_PIPE_CONF(1, 0, PHY_MODE_USB_HOST, 0x1), + MVEBU_COMPHY_PIPE_CONF(1, 0, PHY_MODE_USB_DEVICE, 0x2), + MVEBU_COMPHY_PIPE_CONF(1, 0, PHY_MODE_PCIE, 0x4), + + /* lane 2 */ + MVEBU_COMPHY_PIPE_CONF(2, 0, PHY_MODE_USB_HOST, 0x1), + MVEBU_COMPHY_PIPE_CONF(2, 0, PHY_MODE_PCIE, 0x4), + + /* lane 3 */ + MVEBU_COMPHY_PIPE_CONF(3, 1, PHY_MODE_USB_HOST, 0x1), + MVEBU_COMPHY_PIPE_CONF(3, 0, PHY_MODE_PCIE, 0x4), + + /* lane 4 */ + MVEBU_COMPHY_PIPE_CONF(4, 1, PHY_MODE_USB_HOST, 0x1), + MVEBU_COMPHY_PIPE_CONF(4, 0, PHY_MODE_USB_DEVICE, 0x2), + MVEBU_COMPHY_PIPE_CONF(4, 1, PHY_MODE_PCIE, 0x4), + + /* lane 5 */ + MVEBU_COMPHY_PIPE_CONF(5, 2, PHY_MODE_PCIE, 0x4), }; struct mvebu_comphy_priv { void __iomem *base; struct regmap *regmap; + struct regmap *sar_regmap; + struct regmap *cp_mgmt_regmap; struct device *dev; struct clk *mg_domain_clk; struct clk *mg_core_clk; struct clk *axi_clk; + struct clk *gop_clk; unsigned long cp_phys; + int modes[MVEBU_COMPHY_LANES]; }; struct mvebu_comphy_lane { @@ -267,6 +491,23 @@ enum phy_mode mode; int submode; int port; + + u32 kr_gen1_s0_amplitude; + u32 kr_gen1_s0_emphasis; + u32 kr_gen1_s2_emphasis; + + u32 kr_ffe_cap_sel; + u32 kr_ffe_res_sel; + u32 kr_dfe_res; + u32 kr_phase_offset; + + bool rx_swap_polarity; + bool tx_swap_polarity; + + u32 sata_gen3_s0_amplitude; + u32 sata_gen3_s0_emphasis; + u32 sata_gen3_s4_dfe_res; + u32 sata_phase_offset; }; static int mvebu_comphy_smc(unsigned long function, unsigned long phys, @@ -437,6 +678,138 @@ return 0; } +static void mvebu_comphy_sata_init_reset(struct mvebu_comphy_lane *lane) +{ + struct mvebu_comphy_priv *priv = lane->priv; + u32 val; + + /* RFU configurations - hard reset comphy */ + regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val); + val &= ~MVEBU_COMPHY_CONF1_USB_PCIE; + val &= ~MVEBU_COMPHY_CONF1_POR; + val &= ~MVEBU_COMPHY_CONF1_CORE_RESET; + val |= MVEBU_COMPHY_CONF1_PWRUP; + regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val); + + /* Set data width 40Bit - SATA mode only */ + regmap_read(priv->regmap, MVEBU_COMPHY_CONF6(lane->id), &val); + val |= MVEBU_COMPHY_CONF6_40B; + regmap_write(priv->regmap, MVEBU_COMPHY_CONF6(lane->id), val); + + /* reset */ + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); + val &= ~(MVEBU_COMPHY_SERDES_CFG1_RESET | + MVEBU_COMPHY_SERDES_CFG1_CORE_RESET | + MVEBU_COMPHY_SERDES_CFG1_RF_RESET); + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); + + /* de-assert reset */ + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); + val |= MVEBU_COMPHY_SERDES_CFG1_RESET | + MVEBU_COMPHY_SERDES_CFG1_CORE_RESET; + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); + + /* wait until clocks are ready */ + mdelay(1); + + /* Set reference clock to comes from group 1 - chose 25Mhz */ + val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); + val &= ~MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL; + writel(val,priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); + + /* power and pll selection */ + val = readl(priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id)); + val &= ~(MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x1f) | + MVEBU_COMPHY_PWRPLL_PHY_MODE(0x7)); + /* Reference frequency select set 1 (for SATA = 25Mhz) */ + /* PHY mode select (set SATA = 0x0 */ + val |= MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x1) | + MVEBU_COMPHY_PWRPLL_PHY_MODE(0x0); + writel(val, priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id)); + + /* Set max PHY generation setting - 6Gbps */ + val = readl(priv->base + MVEBU_COMPHY_INTERFACE(lane->id)); + val &= ~MVEBU_COMPHY_INTERFACE_GEN_MAX(0x3); + val |= MVEBU_COMPHY_INTERFACE_GEN_MAX(0x2); + writel(val, priv->base + MVEBU_COMPHY_INTERFACE(lane->id)); + + /* Set select data width 40Bit (SEL_BITS[2:0]) */ + val = readl(priv->base + MVEBU_COMPHY_LOOPBACK(lane->id)); + val &= ~MVEBU_COMPHY_LOOPBACK_DBUS_WIDTH(0x7); + val |= MVEBU_COMPHY_LOOPBACK_DBUS_WIDTH(0x2); + writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id)); +} + +static void mvebu_comphy_usb3_init_reset(struct mvebu_comphy_lane *lane) +{ + struct mvebu_comphy_priv *priv = lane->priv; + u32 val; + + /* RFU configurations - hard reset comphy */ + regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val); + val &= ~MVEBU_COMPHY_CONF1_POR; + val &= ~MVEBU_COMPHY_CONF1_CORE_RESET; + val |= MVEBU_COMPHY_CONF1_PWRUP; + val |= MVEBU_COMPHY_CONF1_PHY_MODE_USB; + val |= MVEBU_COMPHY_CONF1_USB_PCIE; + regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val); + + /* release from hard reset */ + regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val); + val |= MVEBU_COMPHY_CONF1_POR; + val |= MVEBU_COMPHY_CONF1_CORE_RESET; + regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val); + + /* wait until clocks are ready */ + mdelay(1); + + /* Set PIPE soft reset */ + val = readl(priv->base + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(lane->id)); + val |= MVEBU_COMPHY_PIPE_RST_CLK_CTRL_RST; + val &= ~MVEBU_COMPHY_PIPE_RST_CLK_CTRL_FIXED_PCLK; + val &= ~MVEBU_COMPHY_PIPE_RST_CLK_CTRL_PIPE_WIDTH; + val &= ~MVEBU_COMPHY_PIPE_RST_CLK_CTRL_FREQ_SEL; + writel(val, priv->base + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(lane->id)); + + /* Set PLL ready delay for 0x2 */ + val = readl(priv->base + MVEBU_COMPHY_PIPE_CLK_SRC_LO(lane->id)); + val &= ~MVEBU_COMPHY_PIPE_CLK_SRC_LO_PLL_RDY_DL(0x7); + val |= MVEBU_COMPHY_PIPE_CLK_SRC_LO_PLL_RDY_DL(0x2); + writel(val, priv->base + MVEBU_COMPHY_PIPE_CLK_SRC_LO(lane->id)); + + /* Set reference clock to come from group 1 - 25Mhz */ + val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); + val &= ~MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL; + writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); + + /* power and pll selection */ + val = readl(priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id)); + val &= ~(MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x1f) | + MVEBU_COMPHY_PWRPLL_PHY_MODE(0x7)); + val |= MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x2) | + MVEBU_COMPHY_PWRPLL_PHY_MODE(0x5); + writel(val, priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id)); + + + /* Set the amount of time spent in the LoZ state - set for 0x7 */ + val = readl(priv->base + MVEBU_COMPHY_PIPE_PM_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PIPE_PM_CTRL_RDLOZ_WAIT(0xff); + val |= MVEBU_COMPHY_PIPE_PM_CTRL_RDLOZ_WAIT(0x7); + writel(val, priv->base + MVEBU_COMPHY_PIPE_PM_CTRL(lane->id)); + + /* Set max PHY generation setting - 5Gbps */ + val = readl(priv->base + MVEBU_COMPHY_INTERFACE(lane->id)); + val &= ~MVEBU_COMPHY_INTERFACE_GEN_MAX(0x3); + val |= MVEBU_COMPHY_INTERFACE_GEN_MAX(0x1); + writel(val, priv->base + MVEBU_COMPHY_INTERFACE(lane->id)); + + /* Set select data width 20Bit (SEL_BITS[2:0]) */ + val = readl(priv->base + MVEBU_COMPHY_LOOPBACK(lane->id)); + val &= ~MVEBU_COMPHY_LOOPBACK_DBUS_WIDTH(0x7); + val |= MVEBU_COMPHY_LOOPBACK_DBUS_WIDTH(0x1); + writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id)); +} + static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane) { struct mvebu_comphy_priv *priv = lane->priv; @@ -478,6 +851,125 @@ return 0; } +static void mvebu_comphy_pcie_init_reset(struct mvebu_comphy_lane *lane, + int pcie_clk_config, int pcie_width) +{ + struct mvebu_comphy_priv *priv = lane->priv; + u32 val; + + /* RFU configurations - hard reset comphy */ + regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val); + val &= ~MVEBU_COMPHY_CONF1_POR; + val &= ~MVEBU_COMPHY_CONF1_CORE_RESET; + val &= ~MVEBU_COMPHY_CONF1_PHY_MODE_USB; + val |= MVEBU_COMPHY_CONF1_PWRUP; + val |= MVEBU_COMPHY_CONF1_USB_PCIE; + regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val); + + /* release from hard reset */ + regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val); + val |= MVEBU_COMPHY_CONF1_POR; + val |= MVEBU_COMPHY_CONF1_CORE_RESET; + regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val); + + /* wait until clocks are ready */ + mdelay(1); + + /* Start comphy Configuration */ + val = readl(priv->base + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(lane->id)); + val |= MVEBU_COMPHY_PIPE_RST_CLK_CTRL_RST; + val |= MVEBU_COMPHY_PIPE_RST_CLK_CTRL_FIXED_PCLK; + val &= ~MVEBU_COMPHY_PIPE_RST_CLK_CTRL_PIPE_WIDTH; + val &= ~MVEBU_COMPHY_PIPE_RST_CLK_CTRL_FREQ_SEL; + writel(val, priv->base + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(lane->id)); + + /* Set PLL ready delay for 0x2 */ + val = readl(priv->base + MVEBU_COMPHY_PIPE_CLK_SRC_LO(lane->id)); + val &= ~MVEBU_COMPHY_PIPE_CLK_SRC_LO_PLL_RDY_DL(0x7); + val |= MVEBU_COMPHY_PIPE_CLK_SRC_LO_PLL_RDY_DL(0x2); + if (pcie_width > 1) { + val |= MVEBU_COMPHY_PIPE_CLK_SRC_LO_PERIOD_SEL; + val &= ~MVEBU_COMPHY_PIPE_CLK_SRC_LO_PERIOD_SCALE(0x3); + val |= MVEBU_COMPHY_PIPE_CLK_SRC_LO_PERIOD_SCALE(0x1); + } + writel(val, priv->base + MVEBU_COMPHY_PIPE_CLK_SRC_LO(lane->id)); + + /* Set PIPE mode interface to PCIe3 - 0x1 & set lane order */ + val = readl(priv->base + MVEBU_COMPHY_PIPE_CLK_SRC_HI(lane->id)); + val |= MVEBU_COMPHY_PIPE_CLK_SRC_HI_MODE_PIPE; + if (pcie_width > 1) { + if (lane->id == 0) { + val |= MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_START; + val |= MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_MASTER; + } else { + val &= ~MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_START; + val &= ~MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_MASTER; + } + if (lane->id == pcie_width - 1) + val |= MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_BREAK; + else + val &= ~MVEBU_COMPHY_PIPE_CLK_SRC_HI_LANE_BREAK; + } + writel(val, priv->base + MVEBU_COMPHY_PIPE_CLK_SRC_HI(lane->id)); + + /* Config update polarity equalization */ + val = readl(priv->base + MVEBU_COMPHY_LANE_EQ_CFG1(lane->id)); + val |= MVEBU_COMPHY_LANE_EQ_CFG1_UPDATE_POLARITY; + writel(val, priv->base + MVEBU_COMPHY_LANE_EQ_CFG1(lane->id)); + + /* Set PIPE version 4 to mode enable */ + val = readl(priv->base + MVEBU_COMPHY_DFE_CTRL_28(lane->id)); + val |= MVEBU_COMPHY_DFE_CTRL_28_PIPE4; + writel(val, priv->base + MVEBU_COMPHY_DFE_CTRL_28(lane->id)); + + val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); + val &= ~MVEBU_COMPHY_MISC_CTRL0_TXDCLK_2X; + val |= MVEBU_COMPHY_MISC_CTRL0_CLK500M_EN; + val |= MVEBU_COMPHY_MISC_CTRL0_ICP_FORCE; + if (pcie_clk_config) { + val &= ~MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL; + val |= MVEBU_COMPHY_MISC_CTRL0_CLK100M_125M; + } else { + val |= MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL; + } + writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id)); + + val = readl(priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x1f); + val &= ~MVEBU_COMPHY_PWRPLL_PHY_MODE(0x7); + if (pcie_clk_config) + val |= MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x2); + else + val |= MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x0); + val |= MVEBU_COMPHY_PWRPLL_PHY_MODE(0x3); + writel(val, priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id)); + + if (pcie_width > 1) { + /* reference clock alignment */ + val = readl(priv->base + MVEBU_COMPHY_LANE_ALIGN(lane->id)); + val &= ~MVEBU_COMPHY_LANE_ALIGN_BIT; + writel(val, priv->base + MVEBU_COMPHY_LANE_ALIGN(lane->id)); + } + + /* + * Set the amount of time spent in the LoZ state - set for 0x7 + * only if the PCIe clock is output + */ + if (pcie_clk_config) { + val = readl(priv->base + MVEBU_COMPHY_PIPE_PM_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PIPE_PM_CTRL_RDLOZ_WAIT(0xff); + val |= MVEBU_COMPHY_PIPE_PM_CTRL_RDLOZ_WAIT(0x7); + writel(val, priv->base + MVEBU_COMPHY_PIPE_PM_CTRL(lane->id)); + } + + val = readl(priv->base + MVEBU_COMPHY_INTERFACE(lane->id)); + val &= ~MVEBU_COMPHY_INTERFACE_GEN_MAX(0x3); + val |= MVEBU_COMPHY_INTERFACE_GEN_MAX(0x2); + val |= MVEBU_COMPHY_INTERFACE_DET_BYPASS; + val |= MVEBU_COMPHY_INTERFACE_LINK_TRAIN; + writel(val, priv->base + MVEBU_COMPHY_INTERFACE(lane->id)); +} + static int mvebu_comphy_set_mode_sgmii(struct phy *phy) { struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); @@ -506,6 +998,9 @@ val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); val &= ~MVEBU_COMPHY_GEN1_S0_TX_EMPH(0xf); val |= MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x1); + /* set it back to hardware default value to fix unstable bcm + * link on fbx proto */ + val |= MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x9); writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); return mvebu_comphy_init_plls(lane); @@ -584,6 +1079,17 @@ val |= MVEBU_COMPHY_DTL_CTRL_DTL_FLOOP_EN; writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); + printk("10gkr rx settings: 0x%x 0x%x 0x%x 0x%x\n", + lane->kr_ffe_cap_sel, lane->kr_ffe_res_sel, + lane->kr_dfe_res, lane->kr_phase_offset); + val = readl(priv->base + MVEBU_COMPHY_GEN1_S3(lane->id)); + val |= MVEBU_COMPHY_GEN1_S3_SETTING_FORCE; + val &= ~MVEBU_COMPHY_GEN1_S3_FFE_CAP_SEL(0xf); + val &= ~MVEBU_COMPHY_GEN1_S3_FFE_RES_SEL(0x7); + val |= MVEBU_COMPHY_GEN1_S3_FFE_CAP_SEL(lane->kr_ffe_cap_sel); + val |= MVEBU_COMPHY_GEN1_S3_FFE_RES_SEL(lane->kr_ffe_res_sel); + writel(val, priv->base + MVEBU_COMPHY_GEN1_S3(lane->id)); + /* Speed divider */ val = readl(priv->base + MVEBU_COMPHY_SPEED_DIV(lane->id)); val |= MVEBU_COMPHY_SPEED_DIV_TX_FORCE; @@ -601,12 +1107,13 @@ val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); val &= ~(MVEBU_COMPHY_GEN1_S0_TX_AMP(0x1f) | MVEBU_COMPHY_GEN1_S0_TX_EMPH(0xf)); - val |= MVEBU_COMPHY_GEN1_S0_TX_AMP(0x1c) | - MVEBU_COMPHY_GEN1_S0_TX_EMPH(0xe); + val |= MVEBU_COMPHY_GEN1_S0_TX_AMP(lane->kr_gen1_s0_amplitude) | + MVEBU_COMPHY_GEN1_S0_TX_EMPH(lane->kr_gen1_s0_emphasis); writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); val = readl(priv->base + MVEBU_COMPHY_GEN1_S2(lane->id)); val &= ~MVEBU_COMPHY_GEN1_S2_TX_EMPH(0xf); + val |= MVEBU_COMPHY_GEN1_S2_TX_EMPH(lane->kr_gen1_s2_emphasis); val |= MVEBU_COMPHY_GEN1_S2_TX_EMPH_EN; writel(val, priv->base + MVEBU_COMPHY_GEN1_S2(lane->id)); @@ -615,6 +1122,25 @@ MVEBU_COMPHY_TX_SLEW_RATE_SLC(0x3f); writel(val, priv->base + MVEBU_COMPHY_TX_SLEW_RATE(lane->id)); + /* phase offset */ + val = readl(priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF(0x7f); + val |= MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF(lane->kr_phase_offset); + val |= MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_FORCE; + val &= ~MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_VALID; + writel(val, priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + + /* + * phase offset sampled on rising edge of OS_PH_OFF_VALID. + */ + val = readl(priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + val |= MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_VALID; + writel(val, priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + + val = readl(priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_VALID; + writel(val, priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + /* Impedance calibration */ val = readl(priv->base + MVEBU_COMPHY_IMP_CAL(lane->id)); val &= ~MVEBU_COMPHY_IMP_CAL_TX_EXT(0x1f); @@ -644,7 +1170,7 @@ val = readl(priv->base + MVEBU_COMPHY_GEN1_S4(lane->id)); val &= ~MVEBU_COMPHY_GEN1_S4_DFE_RES(0x3); - val |= MVEBU_COMPHY_GEN1_S4_DFE_RES(0x1); + val |= MVEBU_COMPHY_GEN1_S4_DFE_RES(lane->kr_dfe_res); writel(val, priv->base + MVEBU_COMPHY_GEN1_S4(lane->id)); val = readl(priv->base + MVEBU_COMPHY_GEN1_S3(lane->id)); @@ -706,20 +1232,603 @@ return mvebu_comphy_init_plls(lane); } +static inline bool phy_mode_is_pipe_mode(int mode) +{ + switch (mode) { + case PHY_MODE_USB_HOST_SS: + case PHY_MODE_USB_DEVICE_SS: + case PHY_MODE_PCIE: + return true; + default: + return false; + } +} + +static int mvebu_comphy_set_mode_sata(struct phy *phy) +{ + struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); + struct mvebu_comphy_priv *priv = lane->priv; + u32 val; + + mvebu_comphy_sata_init_reset(lane); + + /* G1 Settings */ + val = readl(priv->base + MVEBU_COMPHY_GEN1_S1(lane->id)); + val &= ~(MVEBU_COMPHY_GEN1_S1_RX_MUL_PI(0x7) | + MVEBU_COMPHY_GEN1_S1_RX_MUL_PF(0x7) | + MVEBU_COMPHY_GEN1_S1_RX_MUL_FI(0x3) | + MVEBU_COMPHY_GEN1_S1_RX_MUL_FF(0x3) | + MVEBU_COMPHY_GEN1_S1_RX_DIV(0x3)); + val |= MVEBU_COMPHY_GEN1_S1_RX_MUL_PI(0x0) | + MVEBU_COMPHY_GEN1_S1_RX_MUL_PF(0x1) | + MVEBU_COMPHY_GEN1_S1_RX_MUL_FI(0x0) | + MVEBU_COMPHY_GEN1_S1_RX_MUL_FF(0x3) | + MVEBU_COMPHY_GEN1_S1_RX_DIV(0x1); + writel(val, priv->base + MVEBU_COMPHY_GEN1_S1(lane->id)); + + val = readl(priv->base + MVEBU_COMPHY_GEN1_S3(lane->id)); + val &= ~(MVEBU_COMPHY_GEN1_S3_FFE_CAP_SEL(0xf) | + MVEBU_COMPHY_GEN1_S3_FFE_RES_SEL(0x7) | + MVEBU_COMPHY_GEN1_S3_FFE_DEG_RES_LVL(0x3) | + MVEBU_COMPHY_GEN1_S3_FFE_LOAD_RES_LVL(0x3)); + val |= MVEBU_COMPHY_GEN1_S3_SETTING_FORCE | + MVEBU_COMPHY_GEN1_S3_FFE_CAP_SEL(0xf) | + MVEBU_COMPHY_GEN1_S3_FFE_RES_SEL(0x2) | + MVEBU_COMPHY_GEN1_S3_FFE_DEG_RES_LVL(0x1) | + MVEBU_COMPHY_GEN1_S3_FFE_LOAD_RES_LVL(0x1); + writel(val, priv->base + MVEBU_COMPHY_GEN1_S3(lane->id)); + + /* G2 Settings */ + val = readl(priv->base + MVEBU_COMPHY_GEN2_S1(lane->id)); + val &= ~(MVEBU_COMPHY_GEN2_S1_RX_MUL_PI(0x7) | + MVEBU_COMPHY_GEN2_S1_RX_MUL_PF(0x7) | + MVEBU_COMPHY_GEN2_S1_RX_MUL_FI(0x3) | + MVEBU_COMPHY_GEN2_S1_RX_MUL_FF(0x3) | + MVEBU_COMPHY_GEN2_S1_RX_DIV(0x3)); + val |= MVEBU_COMPHY_GEN2_S1_RX_MUL_PI(0x0) | + MVEBU_COMPHY_GEN2_S1_RX_MUL_PF(0x1) | + MVEBU_COMPHY_GEN2_S1_RX_MUL_FI(0x0) | + MVEBU_COMPHY_GEN2_S1_RX_MUL_FF(0x3) | + MVEBU_COMPHY_GEN2_S1_RX_DIV(0x1); + writel(val, priv->base + MVEBU_COMPHY_GEN2_S1(lane->id)); + + /* G3 Settings */ + val = readl(priv->base + MVEBU_COMPHY_GEN3_S1(lane->id)); + val &= ~(MVEBU_COMPHY_GEN3_S1_RX_MUL_PI(0x7) | + MVEBU_COMPHY_GEN3_S1_RX_MUL_PF(0x7) | + MVEBU_COMPHY_GEN3_S1_RX_MUL_FI(0x3) | + MVEBU_COMPHY_GEN3_S1_RX_MUL_FF(0x3) | + MVEBU_COMPHY_GEN2_S1_RX_DIV(0x3) | + MVEBU_COMPHY_GEN3_S1_SMPL_INPX2_EN); + val |= MVEBU_COMPHY_GEN3_S1_RX_MUL_PI(0x2) | + MVEBU_COMPHY_GEN3_S1_RX_MUL_PF(0x2) | + MVEBU_COMPHY_GEN3_S1_RX_MUL_FI(0x3) | + MVEBU_COMPHY_GEN3_S1_RX_MUL_FF(0x3) | + MVEBU_COMPHY_GEN3_S1_RX_DIV(0x2) | + MVEBU_COMPHY_GEN3_S1_RX_DFE_EN; + writel(val, priv->base + MVEBU_COMPHY_GEN3_S1(lane->id)); + + /* DTL Control */ + val = readl(priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); + val &= ~(MVEBU_COMPHY_DTL_CTRL_DTL_CLAMP_SEL(0x7) | + MVEBU_COMPHY_DTL_CTRL_DTL_CLK_MODE(0x3)); + val |= MVEBU_COMPHY_DTL_CTRL_DTL_DET_EN | + MVEBU_COMPHY_DTL_CTRL_DTL_PLOOP_EN | + MVEBU_COMPHY_DTL_CTRL_DTL_FLOOP_EN | + MVEBU_COMPHY_DTL_CTRL_DTL_CLAMP_SEL(0x1) | + MVEBU_COMPHY_DTL_CTRL_DTL_INPCLK_DIV_FORCE | + MVEBU_COMPHY_DTL_CTRL_DTL_CLK_MODE(0x1) | + MVEBU_COMPHY_DTL_CTRL_DTL_CLK_MODE_FORCE; + writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); + + /* Trigger sampler enable pulses */ + val = readl(priv->base + MVEBU_SP_CALIB(lane->id)); + val |= MVEBU_SP_CALIB_SAMPLER_EN; + writel(val, priv->base + MVEBU_SP_CALIB(lane->id)); + val = readl(priv->base + MVEBU_SP_CALIB(lane->id)); + val &= ~MVEBU_SP_CALIB_SAMPLER_EN; + writel(val, priv->base + MVEBU_SP_CALIB(lane->id)); + + /* VDD Calibration Control 3 */ + val = readl(priv->base + MVEBU_COMPHY_EXT_SELV(lane->id)); + val &= ~MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x1f); + val |= MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x10); + writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id)); + + /* DFE Resolution Control */ + val = readl(priv->base + MVEBU_COMPHY_DFE_RES(lane->id)); + val |= MVEBU_COMPHY_DFE_RES_FORCE_GEN_TBL; + writel(val, priv->base + MVEBU_COMPHY_DFE_RES(lane->id)); + + /* DFE F3-F5 Coefficient Control */ + val = readl(priv->base + MVEBU_COMPHY_COEF(lane->id)); + val &= ~(MVEBU_COMPHY_COEF_DFE_EN | MVEBU_COMPHY_COEF_DFE_CTRL); + writel(val, priv->base + MVEBU_COMPHY_COEF(lane->id)); + + /* G3 Setting 3 */ + val = readl(priv->base + MVEBU_COMPHY_GEN3_S3(lane->id)); + val &= ~(MVEBU_COMPHY_GEN3_S3_FFE_CAP_SEL(0xf) | + MVEBU_COMPHY_GEN3_S3_FFE_RES_SEL(0x7) | + MVEBU_COMPHY_GEN3_S3_FFE_DEG_RES_LVL(0x3) | + MVEBU_COMPHY_GEN3_S3_FFE_LOAD_RES_LVL(0x3)); + val |= MVEBU_COMPHY_GEN3_S3_SETTING_FORCE | + MVEBU_COMPHY_GEN3_S3_FFE_CAP_SEL(0xf) | + MVEBU_COMPHY_GEN3_S3_FFE_RES_SEL(0x4) | + MVEBU_COMPHY_GEN3_S3_FFE_DEG_RES_LVL(0x1) | + MVEBU_COMPHY_GEN3_S3_FFE_LOAD_RES_LVL(0x3); + writel(val, priv->base + MVEBU_COMPHY_GEN3_S3(lane->id)); + + /* G3 Setting 4 */ + val = readl(priv->base + MVEBU_COMPHY_GEN3_S4(lane->id)); + val &= ~MVEBU_COMPHY_GEN3_S4_DFE_RES(0x3); + val |= MVEBU_COMPHY_GEN3_S4_DFE_RES(lane->sata_gen3_s4_dfe_res); + writel(val, priv->base + MVEBU_COMPHY_GEN3_S4(lane->id)); + + /* Offset Phase Control */ + val = readl(priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF(0x7f); + val |= MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF(lane->sata_phase_offset); + val |= MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_FORCE; + val &= ~MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_VALID; + writel(val, priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + + val = readl(priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + val |= MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_VALID; + writel(val, priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + + val = readl(priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PHASE_CTRL_OS_PH_OFF_VALID; + writel(val, priv->base + MVEBU_COMPHY_PHASE_CTRL(lane->id)); + + /* Set G1 TX amplitude and TX post emphasis value */ + val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); + val &= ~(MVEBU_COMPHY_GEN1_S0_TX_AMP(0x1f) | + MVEBU_COMPHY_GEN1_S0_TX_EMPH(0xf)); + val |= MVEBU_COMPHY_GEN1_S0_TX_AMP(0x8) | + MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x1) | + MVEBU_COMPHY_GEN1_S0_TX_AMP_ADJ | + MVEBU_COMPHY_GEN1_S0_TX_EMPH_EN; + writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id)); + + /* Set G2 TX amplitude and TX post emphasis value */ + val = readl(priv->base + MVEBU_COMPHY_GEN2_S0(lane->id)); + val &= ~(MVEBU_COMPHY_GEN2_S0_TX_AMP(0x1f) | + MVEBU_COMPHY_GEN2_S0_TX_EMPH(0xf)); + val |= MVEBU_COMPHY_GEN2_S0_TX_AMP(0xa) | + MVEBU_COMPHY_GEN2_S0_TX_EMPH(0x2) | + MVEBU_COMPHY_GEN2_S0_TX_AMP_ADJ | + MVEBU_COMPHY_GEN2_S0_TX_EMPH_EN; + writel(val, priv->base + MVEBU_COMPHY_GEN2_S0(lane->id)); + + /* Set G3 TX amplitude and TX post emphasis value */ + val = readl(priv->base + MVEBU_COMPHY_GEN3_S0(lane->id)); + val &= ~(MVEBU_COMPHY_GEN3_S0_TX_AMP(0x1f) | + MVEBU_COMPHY_GEN3_S0_TX_EMPH(0xf) | + MVEBU_COMPHY_GEN3_S0_TX_SLEW_RATE_SEL(0x7) | + MVEBU_COMPHY_GEN3_S0_TX_SLEW_CTRL_EN); + val |= MVEBU_COMPHY_GEN3_S0_TX_AMP(lane->sata_gen3_s0_amplitude) | + MVEBU_COMPHY_GEN3_S0_TX_EMPH(lane->sata_gen3_s0_emphasis) | + MVEBU_COMPHY_GEN3_S0_TX_SLEW_RATE_SEL(0x4) | + MVEBU_COMPHY_GEN3_S0_TX_AMP_ADJ | + MVEBU_COMPHY_GEN3_S0_TX_EMPH_EN; + writel(val, priv->base + MVEBU_COMPHY_GEN3_S0(lane->id)); + + /* SERDES External Configuration 2 register */ + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id)); + val |= MVEBU_COMPHY_SERDES_CFG2_SSC_EN; + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id)); + + /* DFE reset sequence */ + val = readl(priv->base + MVEBU_COMPHY_PWR_CTR(lane->id)); + val |= MVEBU_COMPHY_PWR_CTR_RST_DFE; + writel(val, priv->base + MVEBU_COMPHY_PWR_CTR(lane->id)); + val = readl(priv->base + MVEBU_COMPHY_PWR_CTR(lane->id)); + val &= ~MVEBU_COMPHY_PWR_CTR_RST_DFE; + writel(val, priv->base + MVEBU_COMPHY_PWR_CTR(lane->id)); + + /* SW reset for interrupt logic */ + val = readl(priv->base + MVEBU_COMPHY_PWR_CTR(lane->id)); + val |= MVEBU_COMPHY_PWR_CTR_SOFT_RST; + writel(val, priv->base + MVEBU_COMPHY_PWR_CTR(lane->id)); + val = readl(priv->base + MVEBU_COMPHY_PWR_CTR(lane->id)); + val &= ~MVEBU_COMPHY_PWR_CTR_SOFT_RST; + writel(val, priv->base + MVEBU_COMPHY_PWR_CTR(lane->id)); + + /* wait for PLL ready */ + readl_poll_timeout(priv->base + MVEBU_COMPHY_SERDES_STATUS0(lane->id), + val, + val & (MVEBU_COMPHY_SERDES_STATUS0_RX_PLL_RDY | + MVEBU_COMPHY_SERDES_STATUS0_TX_PLL_RDY), + 1000, 150000); + if (!(val & (MVEBU_COMPHY_SERDES_STATUS0_RX_PLL_RDY | + MVEBU_COMPHY_SERDES_STATUS0_TX_PLL_RDY))) + return -ETIMEDOUT; + + return 0; +} + +static int mvebu_comphy_set_mode_usb3(struct phy *phy) +{ + struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); + struct mvebu_comphy_priv *priv = lane->priv; + u32 val; + + mvebu_comphy_usb3_init_reset(lane); + + /* select de-emphasize 3.5db */ + val = readl(priv->base + MVEBU_COMPHY_LANE_CFG0(lane->id)); + val |= MVEBU_COMPHY_LANE_CFG0_PRD_TXEEMPH0; + writel(val, priv->base + MVEBU_COMPHY_LANE_CFG0(lane->id)); + + /* override tx margining from the MAC */ + val = readl(priv->base + MVEBU_COMPHY_MODE_CTRL(lane->id)); + val |= MVEBU_COMPHY_MODE_CTRL_MODE_MARGIN; + writel(val, priv->base + MVEBU_COMPHY_MODE_CTRL(lane->id)); + + /* Start analog paramters from ETP(HW) */ + val = readl(priv->base + MVEBU_COMPHY_LANE_CFG4(lane->id)); + val &= ~MVEBU_COMPHY_LANE_CFG4_DFE_CTRL(0x7); + val |= MVEBU_COMPHY_LANE_CFG4_DFE_CTRL(0x1); + val |= MVEBU_COMPHY_LANE_CFG4_DFE_OVER; + val |= MVEBU_COMPHY_LANE_CFG4_DFE_SSC; + writel(val, priv->base + MVEBU_COMPHY_LANE_CFG4(lane->id)); + + /* Release from PIPE soft reset */ + val = readl(priv->base + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PIPE_RST_CLK_CTRL_RST; + writel(val, priv->base + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(lane->id)); + + /* wait for PLL ready */ + readl_poll_timeout(priv->base + MVEBU_COMPHY_LANE_STATUS0(lane->id), + val, + val & MVEBU_COMPHY_LANE_STATUS0_PCLK_EN, + 1000, 150000); + if (!(val & MVEBU_COMPHY_LANE_STATUS0_PCLK_EN)) + return -ETIMEDOUT; + + return 0; +} + +static int mvebu_comphy_pcie_get_width(struct mvebu_comphy_lane *lane) +{ + int i; + struct mvebu_comphy_priv *priv = lane->priv; + int ret; + + if (lane->id == 4 || lane->id == 5) { + return 1; + } + + for (ret = 0, i = 0; i < 4; ++i) { + if (priv->modes[i] == PHY_MODE_PCIE) + ++ret; + else + break; + } + + if (ret == 0 || ret == 3) + /* + * filter out invalid configurations. + */ + return -EINVAL; + + return ret; +} + +static int mvebu_comphy_set_mode_pcie(struct phy *phy) +{ + struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); + struct mvebu_comphy_priv *priv = lane->priv; + int pcie_clk_config; + int pcie_width; + u32 val; + int start_lane; + int end_lane; + int i; + + /* + * first get PCIe clk configuration from sample at reset + * register. + * values for pcie_clk_config: + * - 0: external PCIe clock generation + * - 1: internal PCIe clock generation + * + * NOTE: on A8K, only the master CP holds the proper pcie + * clock configuration. the PCIE1 bit control the clock + * configuration for both lane 4 and lane 5. + * + * FIXME: we should use the CP1 configuration values when + * initialising the CP1 PCIe interfaces. + */ + regmap_read(priv->sar_regmap, DEVICE_SAR0, &val); + if (lane->id == 4 || lane->id == 5) { + pcie_clk_config = !!(val & DEV_SAR0_PCIE1_CLK_CP0); + } else { + pcie_clk_config = !!(val & DEV_SAR0_PCIE0_CLK_CP0); + } + + pcie_width = mvebu_comphy_pcie_get_width(lane); + if (pcie_width < 0) + return pcie_width; + + /* + * PCIe width configuration on lane 0 + */ + if (lane->id == 0) { + regmap_read(priv->regmap, MVEBU_COMPHY_SD1_CTRL1, &val); + switch (pcie_width) { + case 1: + val &= ~MVEBU_COMPHY_SD1_CTRL1_PCIE_X2_EN; + val &= ~MVEBU_COMPHY_SD1_CTRL1_PCIE_X4_EN; + break; + case 2: + val |= MVEBU_COMPHY_SD1_CTRL1_PCIE_X2_EN; + val &= ~MVEBU_COMPHY_SD1_CTRL1_PCIE_X4_EN; + break; + case 4: + val &= ~MVEBU_COMPHY_SD1_CTRL1_PCIE_X2_EN; + val |= MVEBU_COMPHY_SD1_CTRL1_PCIE_X4_EN; + break; + } + regmap_write(priv->regmap, MVEBU_COMPHY_SD1_CTRL1, val); + } + + /* + * if PCIe clock is output and clock source from SerDes lane + * 5, need to configure the clock-source MUX. By default, the + * clock source is from lane 4 + */ + if (pcie_clk_config && lane->id == 5) { + regmap_read(priv->cp_mgmt_regmap, DFX_DEV_GEN_CTRL12, &val); + val &= ~DFX_DEV_GEN_CTRL12_CLK_SRC(0x7); + val |= DFX_DEV_GEN_CTRL12_CLK_SRC(0x3); + regmap_write(priv->cp_mgmt_regmap, DFX_DEV_GEN_CTRL12, val); + } + + mvebu_comphy_pcie_init_reset(lane, pcie_clk_config, pcie_width); + + val = readl(priv->base + MVEBU_COMPHY_PCIE_REG0(lane->id)); + val |= MVEBU_COMPHY_PCIE_REG0_IDLE_SYNC; + val &= ~MVEBU_COMPHY_PCIE_REG0_SEL_BITS(0x3); + val |= MVEBU_COMPHY_PCIE_REG0_SEL_BITS(0x2); + writel(val, priv->base + MVEBU_COMPHY_PCIE_REG0(lane->id)); + + + val = readl(priv->base + MVEBU_COMPHY_TX_TRAIN_CTRL(lane->id)); + val |= MVEBU_COMPHY_TX_TRAIN_CTRL_G1; + val |= MVEBU_COMPHY_TX_TRAIN_CTRL_GN1; + val &= ~MVEBU_COMPHY_TX_TRAIN_CTRL_G0; + writel(val, priv->base + MVEBU_COMPHY_TX_TRAIN_CTRL(lane->id)); + + val = readl(priv->base + MVEBU_COMPHY_TX_TRAIN_PRESET(lane->id)); + val &= ~MVEBU_COMPHY_TX_TRAIN_CHK_INIT; + val |= MVEBU_COMPHY_TX_TRAIN_COEF_FM_PIN_PCIE3; + writel(val, priv->base + MVEBU_COMPHY_TX_TRAIN_PRESET(lane->id)); + + /* Set Preset sweep configurations */ + val = readl(priv->base + MVEBU_COMPHY_TX_TRAINING11(lane->id)); + val |= MVEBU_COMPHY_TX_TRAINING11_CHECK_MODE; + val |= MVEBU_COMPHY_TX_TRAINING11_PRESET_NUM(0x7); + val |= MVEBU_COMPHY_TX_TRAINING11_PRESET_EN; + writel(val, priv->base + MVEBU_COMPHY_TX_TRAINING11(lane->id)); + + /* Tx train start configuration */ + val = readl(priv->base + MVEBU_COMPHY_TRAINING5(lane->id)); + val |= MVEBU_COMPHY_TRAINING5_START_SQ_EN; + val &= ~MVEBU_COMPHY_TRAINING5_FRM_DET_EN; + val &= ~MVEBU_COMPHY_TRAINING5_FRM_LOCK_EN; + val |= MVEBU_COMPHY_TRAINING5_WAIT_TIME_EN; + writel(val, priv->base + MVEBU_COMPHY_TRAINING5(lane->id)); + + /* Enable Tx train P2P */ + val = readl(priv->base + MVEBU_COMPHY_TRAINING0(lane->id)); + val |= MVEBU_COMPHY_TRAINING0_P2P_HOLD; + writel(val, priv->base + MVEBU_COMPHY_TRAINING0(lane->id)); + + + /* Configure Tx train timeout */ + val = readl(priv->base + MVEBU_COMPHY_TRAINING4(lane->id)); + val &= ~MVEBU_COMPHY_TRAINING4_TIMER(0x3ff); + val |= MVEBU_COMPHY_TRAINING4_TIMER(0x17); + writel(val, priv->base + MVEBU_COMPHY_TRAINING4(lane->id)); + + /* Disable G0/G1/GN1 adaptation */ + val = readl(priv->base + MVEBU_COMPHY_TX_TRAIN_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_TX_TRAIN_CTRL_G1; + val &= ~MVEBU_COMPHY_TX_TRAIN_CTRL_GN1; + val &= ~MVEBU_COMPHY_TX_TRAIN_CTRL_G0; + writel(val, priv->base + MVEBU_COMPHY_TX_TRAIN_CTRL(lane->id)); + + /* Disable DTL frequency loop */ + val = readl(priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_DTL_CTRL_DTL_FLOOP_EN; + writel(val, priv->base + MVEBU_COMPHY_DTL_CTRL(lane->id)); + + /* Configure G3 DFE */ + val = readl(priv->base + MVEBU_COMPHY_GEN3_S4(lane->id)); + val &= ~MVEBU_COMPHY_GEN3_S4_DFE_RES(0x3); + val |= MVEBU_COMPHY_GEN3_S4_DFE_RES(0x3); + writel(val, priv->base + MVEBU_COMPHY_GEN3_S4(lane->id)); + + /* Use TX/RX training result for DFE */ + val = readl(priv->base + MVEBU_COMPHY_DFE_RES(lane->id)); + val &= ~MVEBU_COMPHY_DFE_RES_FORCE_GEN_TBL; + writel(val, priv->base + MVEBU_COMPHY_DFE_RES(lane->id)); + + /* Configure initial and final coefficient value for receiver */ + val = readl(priv->base + MVEBU_COMPHY_GEN3_S1(lane->id)); + val &= ~(MVEBU_COMPHY_GEN3_S1_RX_MUL_PI(0x7) | + MVEBU_COMPHY_GEN3_S1_RX_MUL_PF(0x7) | + MVEBU_COMPHY_GEN3_S1_SMPL_INPX2_EN); + val |= MVEBU_COMPHY_GEN3_S1_RX_MUL_PI(0x1) | + MVEBU_COMPHY_GEN3_S1_RX_MUL_PF(0x1); + writel(val, priv->base + MVEBU_COMPHY_GEN3_S1(lane->id)); + + /* Trigger sampler enable pulse */ + val = readl(priv->base + MVEBU_SP_CALIB(lane->id)); + val |= MVEBU_SP_CALIB_SAMPLER_EN; + writel(val, priv->base + MVEBU_SP_CALIB(lane->id)); + udelay(5); + val = readl(priv->base + MVEBU_SP_CALIB(lane->id)); + val &= ~MVEBU_SP_CALIB_SAMPLER_EN; + writel(val, priv->base + MVEBU_SP_CALIB(lane->id)); + + /* FFE resistor tuning for different bandwidth */ + /* G3 Setting 3 */ + val = readl(priv->base + MVEBU_COMPHY_GEN3_S3(lane->id)); + val &= ~(MVEBU_COMPHY_GEN3_S3_FFE_DEG_RES_LVL(0x3) | + MVEBU_COMPHY_GEN3_S3_FFE_LOAD_RES_LVL(0x3)); + val |= MVEBU_COMPHY_GEN3_S3_FFE_DEG_RES_LVL(0x1) | + MVEBU_COMPHY_GEN3_S3_FFE_LOAD_RES_LVL(0x3); + writel(val, priv->base + MVEBU_COMPHY_GEN3_S3(lane->id)); + + /* Pattern lock lost timeout disable */ + val = readl(priv->base + MVEBU_COMPHY_FRAME_DETECT3(lane->id)); + val &= ~MVEBU_COMPHY_FRAME_DETECT3_LOST_TIMEOUT_EN; + writel(val, priv->base + MVEBU_COMPHY_FRAME_DETECT3(lane->id)); + + /* Configure DFE adaptations */ + val = readl(priv->base + MVEBU_COMPHY_CDR_CONTROL(lane->id)); + val &= ~MVEBU_COMPHY_CDR_CONTROL_RX_MAX_DFE_ADAPT_1(0x3); + val &= ~MVEBU_COMPHY_CDR_CONTROL_MAX_DFE_ADAPT_1(0x7); + val &= ~MVEBU_COMPHY_CDR_CONTROL_MAX_DFE_ADAPT_0(0x7); + val |= MVEBU_COMPHY_CDR_CONTROL_RX_MAX_DFE_ADAPT_1(0x0); + val |= MVEBU_COMPHY_CDR_CONTROL_MAX_DFE_ADAPT_1(0x1); + val |= MVEBU_COMPHY_CDR_CONTROL_MAX_DFE_ADAPT_0(0x0); + writel(val, priv->base + MVEBU_COMPHY_CDR_CONTROL(lane->id)); + + val = readl(priv->base + MVEBU_COMPHY_DFE_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_DFE_CTRL_TX_MAX_DFE_ADAPT(0x3); + writel(val, priv->base + MVEBU_COMPHY_DFE_CTRL(lane->id)); + + /* Generation 2 setting 1*/ + val = readl(priv->base + MVEBU_COMPHY_GEN2_S1(lane->id)); + val &= ~MVEBU_COMPHY_GEN2_S1_RX_MUL_PI(0x7); + val &= ~MVEBU_COMPHY_GEN2_S1_RX_MUL_PF(0x7); + val &= ~MVEBU_COMPHY_GEN2_S1_RX_MUL_FI(0x3); + val |= MVEBU_COMPHY_GEN2_S1_RX_MUL_PI(0x0); + val |= MVEBU_COMPHY_GEN2_S1_RX_MUL_PF(0x1); + val |= MVEBU_COMPHY_GEN2_S1_RX_MUL_FI(0x0); + writel(val, priv->base + MVEBU_COMPHY_GEN2_S1(lane->id)); + + /* DFE enable */ + val = readl(priv->base + MVEBU_COMPHY_GEN2_S4(lane->id)); + val &= ~MVEBU_COMPHY_GEN2_S4_DFE_RES(0x3); + val |= MVEBU_COMPHY_GEN2_S4_DFE_RES(0x3); + writel(val, priv->base + MVEBU_COMPHY_GEN2_S4(lane->id)); + + /* Configure DFE Resolution */ + val = readl(priv->base + MVEBU_COMPHY_LANE_CFG4(lane->id)); + val |= MVEBU_COMPHY_LANE_CFG4_DFE_EN_SEL; + writel(val, priv->base + MVEBU_COMPHY_LANE_CFG4(lane->id)); + + /* VDD calibration control */ + val = readl(priv->base + MVEBU_COMPHY_EXT_SELV(lane->id)); + val &= ~MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x1f); + val |= MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x16); + writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id)); + + /* Set PLL Charge-pump Current Control */ + val = readl(priv->base + MVEBU_COMPHY_GEN3_S5(lane->id)); + val &= ~MVEBU_COMPHY_GEN3_S5_ICP(0xf); + val |= MVEBU_COMPHY_GEN3_S5_ICP(0x4); + writel(val, priv->base + MVEBU_COMPHY_GEN3_S5(lane->id)); + + /* Set lane equalization remote setting */ + val = readl(priv->base + MVEBU_COMPHY_LANE_EQ_REMOTE_CFG(lane->id)); + val |= MVEBU_COMPHY_LANE_EQ_REMOTE_CFG_DIRN_OVERRIDE; + val |= MVEBU_COMPHY_LANE_EQ_REMOTE_CFG_ONLY_MODE; + val &= ~MVEBU_COMPHY_LANE_EQ_REMOTE_CFG_PRESET_VECTOR(0xf); + val |= MVEBU_COMPHY_LANE_EQ_REMOTE_CFG_PRESET_VECTOR(0x2); + writel(val, priv->base + MVEBU_COMPHY_LANE_EQ_REMOTE_CFG(lane->id)); + + /* Set phy in root complex mode */ + val = readl(priv->base + MVEBU_COMPHY_EQ_CONFIG0(lane->id)); + val |= MVEBU_COMPHY_EQ_CONFIG0_RC_MODE; + writel(val, priv->base + MVEBU_COMPHY_EQ_CONFIG0(lane->id)); + + /* we're done for now if we are not in the last lane. */ + if (pcie_width > 1 && lane->id != (pcie_width - 1)) + return 0; + + if (pcie_width > 1) { + /* + * for x2 or x4: we need to release the pipe reset in + * one single write on all comphys. + */ + regmap_read(priv->regmap, MVEBU_COMPHY_SD1_CTRL1, &val); + if (pcie_width == 2) + val &= ~MVEBU_COMPHY_SD1_CTRL1_PHY0_1_MASK; + else + val &= ~MVEBU_COMPHY_SD1_CTRL1_PHY0_3_MASK; + regmap_write(priv->regmap, MVEBU_COMPHY_SD1_CTRL1, val); + + /* + * now all writes to comphy register block 0 will hit + * all PCIe PHYs. + */ + val = readl(priv->base + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(0)); + val &= ~MVEBU_COMPHY_PIPE_RST_CLK_CTRL_RST; + writel(val, priv->base + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(0)); + + /* + * restore writes to all individual phys. + */ + regmap_read(priv->regmap, MVEBU_COMPHY_SD1_CTRL1, &val); + if (pcie_width == 2) + val |= 0x0010; + else + val |= 0x3210; + regmap_write(priv->regmap, MVEBU_COMPHY_SD1_CTRL1, val); + + start_lane = 0; + end_lane = pcie_width - 1; + } else { + /* release pipe soft reset */ + val = readl(priv->base + + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(lane->id)); + val &= ~MVEBU_COMPHY_PIPE_RST_CLK_CTRL_RST; + writel(val, priv->base + + MVEBU_COMPHY_PIPE_RST_CLK_CTRL(lane->id)); + start_lane = end_lane = lane->id; + } + + for (i = start_lane; i <= end_lane; ++i) { + readl_poll_timeout(priv->base + MVEBU_COMPHY_LANE_STATUS0(i), + val, + val & MVEBU_COMPHY_LANE_STATUS0_PCLK_EN, + 1000, 150000); + if (!(val & MVEBU_COMPHY_LANE_STATUS0_PCLK_EN)) { + printk("timedout waiting for lane pclk on lane %d\n", + lane->id); + return -ETIMEDOUT; + } + } + + return 0; +} + static int mvebu_comphy_power_on_legacy(struct phy *phy) { struct mvebu_comphy_lane *lane = phy_get_drvdata(phy); struct mvebu_comphy_priv *priv = lane->priv; - int ret, mux; + int ret, mux = 0, pipe_mux = 0, mux_val; u32 val; - mux = mvebu_comphy_get_mux(lane->id, lane->port, + mux_val = mvebu_comphy_get_mux(lane->id, lane->port, lane->mode, lane->submode); + if (mux < 0) return -ENOTSUPP; + if (phy_mode_is_pipe_mode(lane->mode)) + pipe_mux = mux_val; + else + mux = mux_val; + regmap_read(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, &val); val &= ~(0xf << MVEBU_COMPHY_PIPE_SELECTOR_PIPE(lane->id)); + val |= pipe_mux << MVEBU_COMPHY_PIPE_SELECTOR_PIPE(lane->id); regmap_write(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, val); regmap_read(priv->regmap, MVEBU_COMPHY_SELECTOR, &val); @@ -727,6 +1836,8 @@ val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id); regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val); + switch (lane->mode) { + case PHY_MODE_ETHERNET: switch (lane->submode) { case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_2500BASEX: @@ -738,6 +1849,18 @@ case PHY_INTERFACE_MODE_10GKR: ret = mvebu_comphy_set_mode_10gkr(phy); break; + } + break; + case PHY_MODE_SATA: + ret = mvebu_comphy_set_mode_sata(phy); + break; + case PHY_MODE_USB_HOST_SS: + case PHY_MODE_USB_DEVICE_SS: + ret = mvebu_comphy_set_mode_usb3(phy); + break; + case PHY_MODE_PCIE: + ret = mvebu_comphy_set_mode_pcie(phy); + break; default: return -ENOTSUPP; } @@ -747,6 +1870,20 @@ val |= MVEBU_COMPHY_SERDES_CFG1_RF_RESET; writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); + /* + * swap rx/tx N/P polarities if needed. + */ + val = readl(priv->base + MVEBU_COMPHY_SYNC_PATTERN(lane->id)); + if (lane->rx_swap_polarity) + val |= MVEBU_COMPHY_SYNC_PATTERN_RXD_INV; + else + val &= ~MVEBU_COMPHY_SYNC_PATTERN_RXD_INV; + if (lane->tx_swap_polarity) + val |= MVEBU_COMPHY_SYNC_PATTERN_TXD_INV; + else + val &= ~MVEBU_COMPHY_SYNC_PATTERN_TXD_INV; + writel(val, priv->base + MVEBU_COMPHY_SYNC_PATTERN(lane->id)); + return ret; } @@ -820,10 +1957,10 @@ return ret; if (ret == COMPHY_FW_NOT_SUPPORTED) - dev_err(priv->dev, + dev_dbg(priv->dev, "unsupported SMC call, try updating your firmware\n"); - dev_warn(priv->dev, + dev_dbg(priv->dev, "Firmware could not configure PHY %d with mode %d (ret: %d), trying legacy method\n", lane->id, lane->mode, ret); @@ -843,6 +1980,7 @@ if (mvebu_comphy_get_fw_mode(lane->id, lane->port, mode, submode) < 0) return -EINVAL; + lane->priv->modes[lane->id] = mode; lane->mode = mode; lane->submode = submode; @@ -865,6 +2003,11 @@ MVEBU_COMPHY_SERDES_CFG1_RF_RESET); writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id)); + regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val); + val &= ~MVEBU_COMPHY_CONF1_POR; + val &= ~MVEBU_COMPHY_CONF1_CORE_RESET; + regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val); + regmap_read(priv->regmap, MVEBU_COMPHY_SELECTOR, &val); val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id)); regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val); @@ -949,8 +2092,21 @@ if (ret < 0) goto dis_mg_core_clk; + priv->gop_clk = devm_clk_get(priv->dev, "gop_clk"); + if (IS_ERR(priv->gop_clk)) { + ret = PTR_ERR(priv->gop_clk); + goto dis_axi_clk; + } + + ret = clk_prepare_enable(priv->gop_clk); + if (ret < 0) + goto dis_axi_clk; + return 0; +dis_axi_clk: + clk_disable_unprepare(priv->axi_clk); + dis_mg_core_clk: clk_disable_unprepare(priv->mg_core_clk); @@ -966,6 +2122,9 @@ static void mvebu_comphy_disable_unprepare_clks(struct mvebu_comphy_priv *priv) { + if (priv->mg_core_clk) + clk_disable_unprepare(priv->gop_clk); + if (priv->axi_clk) clk_disable_unprepare(priv->axi_clk); @@ -994,6 +2153,19 @@ "marvell,system-controller"); if (IS_ERR(priv->regmap)) return PTR_ERR(priv->regmap); + + priv->sar_regmap = + syscon_regmap_lookup_by_phandle(pdev->dev.of_node, + "marvell,sar"); + if (IS_ERR(priv->sar_regmap)) + return PTR_ERR(priv->sar_regmap); + + priv->cp_mgmt_regmap = + syscon_regmap_lookup_by_phandle(pdev->dev.of_node, + "marvell,cp_mgmt"); + if (IS_ERR(priv->cp_mgmt_regmap)) + return PTR_ERR(priv->cp_mgmt_regmap); + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); priv->base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(priv->base)) @@ -1054,13 +2226,61 @@ lane->port = -1; phy_set_drvdata(phy, lane); + lane->kr_gen1_s0_amplitude = DEFAULT_GEN1_S0_AMP; + lane->kr_gen1_s0_emphasis = DEFAULT_GEN1_S0_EMPH; + lane->kr_gen1_s2_emphasis = DEFAULT_GEN1_S2_EMPH; + lane->kr_ffe_cap_sel = KR_DEFAULT_FFE_CAP_SEL; + lane->kr_ffe_res_sel = KR_DEFAULT_FFE_RES_SEL; + lane->kr_phase_offset = KR_DEFAULT_PHASE_OFFSET; + lane->kr_dfe_res = KR_DEFAULT_DFE_RES; + + /* + * fetch optional 10GKR amplitude and emphasis + * parameters from device tree for this comphy. + */ + of_property_read_u32(child, "kr-gen1-s0-amplitude", + &lane->kr_gen1_s0_amplitude); + of_property_read_u32(child, "kr-gen1-s0-emphasis", + &lane->kr_gen1_s0_emphasis); + of_property_read_u32(child, "kr-gen1-s2-emphasis", + &lane->kr_gen1_s2_emphasis); + of_property_read_u32(child, "kr-ffe-cap-sel", + &lane->kr_ffe_cap_sel); + of_property_read_u32(child, "kr-ffe-res-sel", + &lane->kr_ffe_res_sel); + of_property_read_u32(child, "kr-dfe-res", + &lane->kr_dfe_res); + of_property_read_u32(child, "kr-phase-offset", + &lane->kr_phase_offset); + + lane->sata_gen3_s0_amplitude = SATA_DEFAULT_GEN3_S0_AMP; + lane->sata_gen3_s0_emphasis = SATA_DEFAULT_GEN3_S0_EMPH; + lane->sata_gen3_s4_dfe_res = SATA_DEFAULT_GEN3_S4_DFE_RES; + lane->sata_phase_offset = SATA_DEFAULT_PHASE_OFFSET; + /* + * fetch optional SATA amplitude and emphasis + * parameter from device tree, for this comphy. + */ + of_property_read_u32(child, "sata-gen3-s0-amplitude", + &lane->sata_gen3_s0_amplitude); + of_property_read_u32(child, "sata-gen3-s0-emphasis", + &lane->sata_gen3_s0_emphasis); + of_property_read_u32(child, "sata-gen3-s4-dfe-res", + &lane->sata_gen3_s4_dfe_res); + of_property_read_u32(child, "sata-phase-offset", + &lane->sata_phase_offset); + + lane->rx_swap_polarity = of_property_read_bool(child, + "rx-swap-polarity"); + lane->tx_swap_polarity = of_property_read_bool(child, + "tx-swap-polarity"); + /* - * All modes are supported in this driver so we could call - * mvebu_comphy_power_off(phy) here to avoid relying on the - * bootloader/firmware configuration, but for compatibility - * reasons we cannot de-configure the COMPHY without being sure - * that the firmware is up-to-date and fully-featured. + * All modes are now supported in this driver so call + * mvebu_comphy_power_off(phy) here to avoid relying + * on the bootloader/firmware configuration. */ + mvebu_comphy_power_off(phy); } dev_set_drvdata(&pdev->dev, priv); diff -ruw linux-5.4.60/drivers/pinctrl/bcm/Kconfig linux-5.4.60-fbx/drivers/pinctrl/bcm/Kconfig --- linux-5.4.60/drivers/pinctrl/bcm/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/pinctrl/bcm/Kconfig 2021-03-04 13:20:59.547505634 +0100 @@ -28,6 +28,15 @@ help Say Y here to enable the Broadcom BCM2835 GPIO driver. +config PINCTRL_BCM63138 + bool "Broadcom 63138 pinmux driver" + depends on OF && (ARCH_BCM_63XX || ARCH_BCM63XX || COMPILE_TEST) + default ARCH_BCM_63XX + select PINMUX + select PINCONF + select GENERIC_PINCONF + select GPIOLIB + config PINCTRL_IPROC_GPIO bool "Broadcom iProc GPIO (with PINCONF) driver" depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST) diff -ruw linux-5.4.60/drivers/pinctrl/bcm/Makefile linux-5.4.60-fbx/drivers/pinctrl/bcm/Makefile --- linux-5.4.60/drivers/pinctrl/bcm/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/pinctrl/bcm/Makefile 2021-03-04 13:20:59.547505634 +0100 @@ -3,6 +3,7 @@ obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o +obj-$(CONFIG_PINCTRL_BCM63138) += pinctrl-bcm63138.o obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o diff -ruw linux-5.4.60/drivers/platform/Kconfig linux-5.4.60-fbx/drivers/platform/Kconfig --- linux-5.4.60/drivers/platform/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/platform/Kconfig 2021-03-04 13:20:59.597505636 +0100 @@ -13,3 +13,9 @@ source "drivers/platform/mellanox/Kconfig" source "drivers/platform/olpc/Kconfig" + +if X86_INTEL_CE +source "drivers/platform/intelce/Kconfig" +endif + +source "drivers/platform/fbxgw7r/Kconfig" diff -ruw linux-5.4.60/drivers/platform/Makefile linux-5.4.60-fbx/drivers/platform/Makefile --- linux-5.4.60/drivers/platform/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/platform/Makefile 2021-03-04 13:20:59.597505636 +0100 @@ -9,3 +9,5 @@ obj-$(CONFIG_OLPC_EC) += olpc/ obj-$(CONFIG_GOLDFISH) += goldfish/ obj-$(CONFIG_CHROME_PLATFORMS) += chrome/ +obj-$(CONFIG_X86_INTEL_CE) += intelce/ +obj-$(CONFIG_FBXGW7R_PLATFORM) += fbxgw7r/ diff -ruw linux-5.4.60/drivers/soc/bcm/Kconfig linux-5.4.60-fbx/drivers/soc/bcm/Kconfig --- linux-5.4.60/drivers/soc/bcm/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/soc/bcm/Kconfig 2021-03-04 13:20:59.834172314 +0100 @@ -34,5 +34,6 @@ If unsure, say N. source "drivers/soc/bcm/brcmstb/Kconfig" +source "drivers/soc/bcm/bcm63xx/Kconfig" endmenu diff -ruw linux-5.4.60/drivers/soc/bcm/Makefile linux-5.4.60-fbx/drivers/soc/bcm/Makefile --- linux-5.4.60/drivers/soc/bcm/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/soc/bcm/Makefile 2021-03-04 13:20:59.834172314 +0100 @@ -2,3 +2,4 @@ obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/ +obj-$(CONFIG_SOC_BCM63XX) += bcm63xx/ diff -ruw linux-5.4.60/drivers/spi/Kconfig linux-5.4.60-fbx/drivers/spi/Kconfig --- linux-5.4.60/drivers/spi/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/spi/Kconfig 2021-03-04 13:20:59.847505647 +0100 @@ -147,7 +147,7 @@ config SPI_BCM63XX_HSSPI tristate "Broadcom BCM63XX HS SPI controller driver" - depends on BCM63XX || ARCH_BCM_63XX || COMPILE_TEST + depends on BCM63XX || ARCH_BCM63XX || ARCH_BCM_63XX || COMPILE_TEST help This enables support for the High Speed SPI controller present on newer Broadcom BCM63XX SoCs. @@ -539,6 +539,12 @@ help This selects a driver for the PPC4xx SPI Controller. +config SPI_TDM_ORION + tristate "Orion TDM SPI master" + depends on PLAT_ORION + help + This enables using the TDM SPI master controller on the Orion chips. + config SPI_PXA2XX tristate "PXA2xx SSP SPI master" depends on (ARCH_PXA || ARCH_MMP || PCI || ACPI) diff -ruw linux-5.4.60/drivers/spi/Makefile linux-5.4.60-fbx/drivers/spi/Makefile --- linux-5.4.60/drivers/spi/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/spi/Makefile 2021-03-04 13:20:59.847505647 +0100 @@ -76,6 +76,7 @@ obj-$(CONFIG_SPI_ORION) += spi-orion.o obj-$(CONFIG_SPI_PIC32) += spi-pic32.o obj-$(CONFIG_SPI_PIC32_SQI) += spi-pic32-sqi.o +obj-$(CONFIG_SPI_TDM_ORION) += orion_tdm_spi.o obj-$(CONFIG_SPI_PL022) += spi-pl022.o obj-$(CONFIG_SPI_PPC4xx) += spi-ppc4xx.o spi-pxa2xx-platform-objs := spi-pxa2xx.o spi-pxa2xx-dma.o diff -ruw linux-5.4.60/drivers/spi/spi-orion.c linux-5.4.60-fbx/drivers/spi/spi-orion.c --- linux-5.4.60/drivers/spi/spi-orion.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/spi/spi-orion.c 2021-03-04 13:20:59.854172315 +0100 @@ -48,6 +48,9 @@ /* Register for the "Direct Mode" */ #define SPI_DIRECT_WRITE_CONFIG_REG 0x20 +/* per-CS register parameters */ +#define SPI_CSN_TIMING_PARM_REGS(n) (0x30 + 4 * (n)) + #define ORION_SPI_TMISO_SAMPLE_MASK (0x3 << 6) #define ORION_SPI_TMISO_SAMPLE_1 (1 << 6) #define ORION_SPI_TMISO_SAMPLE_2 (2 << 6) @@ -683,6 +686,25 @@ goto out_rel_axi_clk; } + /* + * on A8K (using a380 compatible) and A380, there are per-CS + * timing parameters registers, which may be used and left + * active by the bootloader. + * + * This drivers uses the global timing parameter register(s) + * and interface configuration register, and could silently + * fallback to previously configured per-CS timing parameters, + * unless those registers are cleared beforehand. + */ + if (of_device_is_compatible(pdev->dev.of_node, + "marvell,armada-380-spi")) { + int cs; + + for (cs = 0; cs < 8; ++cs) + writel(0x0, spi->base + SPI_CSN_TIMING_PARM_REGS(cs)); + + } + for_each_available_child_of_node(pdev->dev.of_node, np) { struct orion_direct_acc *dir_acc; u32 cs; diff -ruw linux-5.4.60/drivers/thermal/thermal_core.c linux-5.4.60-fbx/drivers/thermal/thermal_core.c --- linux-5.4.60/drivers/thermal/thermal_core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/thermal/thermal_core.c 2021-03-04 13:21:00.014172322 +0100 @@ -931,6 +931,7 @@ /** * __thermal_cooling_device_register() - register a new thermal cooling device + * @dev: parent device * @np: a pointer to a device tree node. * @type: the thermal cooling device type. * @devdata: device private data. @@ -946,7 +947,7 @@ * ERR_PTR. Caller must check return value with IS_ERR*() helpers. */ static struct thermal_cooling_device * -__thermal_cooling_device_register(struct device_node *np, +__thermal_cooling_device_register(struct device *pdev, struct device_node *np, const char *type, void *devdata, const struct thermal_cooling_device_ops *ops) { @@ -982,6 +983,7 @@ cdev->devdata = devdata; thermal_cooling_device_setup_sysfs(cdev); dev_set_name(&cdev->device, "cooling_device%d", cdev->id); + cdev->device.parent = pdev; result = device_register(&cdev->device); if (result) { ida_simple_remove(&thermal_cdev_ida, cdev->id); @@ -1024,11 +1026,30 @@ thermal_cooling_device_register(const char *type, void *devdata, const struct thermal_cooling_device_ops *ops) { - return __thermal_cooling_device_register(NULL, type, devdata, ops); + return __thermal_cooling_device_register(NULL, NULL, type, devdata, ops); } EXPORT_SYMBOL_GPL(thermal_cooling_device_register); /** + * thermal_cooling_device_register_with_parent() - register a new thermal cooling device + * @pdev: parent device + * @type: the thermal cooling device type. + * @devdata: device private data. + * @ops: standard thermal cooling devices callbacks. + * + * Same as thermal_cooling_device_register but take also the parent device. + * Then, hwpath will include the parent device to uniquely identify this device + */ +struct thermal_cooling_device * +thermal_cooling_device_register_with_parent(struct device *pdev, + const char *type, void *devdata, + const struct thermal_cooling_device_ops *ops) +{ + return __thermal_cooling_device_register(pdev, NULL, type, devdata, ops); +} +EXPORT_SYMBOL_GPL(thermal_cooling_device_register_with_parent); + +/** * thermal_of_cooling_device_register() - register an OF thermal cooling device * @np: a pointer to a device tree node. * @type: the thermal cooling device type. @@ -1048,7 +1069,7 @@ const char *type, void *devdata, const struct thermal_cooling_device_ops *ops) { - return __thermal_cooling_device_register(np, type, devdata, ops); + return __thermal_cooling_device_register(NULL, np, type, devdata, ops); } EXPORT_SYMBOL_GPL(thermal_of_cooling_device_register); @@ -1088,7 +1109,7 @@ if (!ptr) return ERR_PTR(-ENOMEM); - tcd = __thermal_cooling_device_register(np, type, devdata, ops); + tcd = __thermal_cooling_device_register(NULL, np, type, devdata, ops); if (IS_ERR(tcd)) { devres_free(ptr); return tcd; diff -ruw linux-5.4.60/drivers/tty/serial/Kconfig linux-5.4.60-fbx/drivers/tty/serial/Kconfig --- linux-5.4.60/drivers/tty/serial/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/tty/serial/Kconfig 2021-03-04 13:21:00.027505655 +0100 @@ -1134,6 +1134,11 @@ BCM68xx (PON) BCM7xxx (STB) - DOCSIS console +config SERIAL_BCM63XX_HS + tristate "Broadcom BCM63xx HS UART support" + select SERIAL_CORE + depends on ARCH_BCM63XX || COMPILE_TEST + config SERIAL_BCM63XX_CONSOLE bool "Console on BCM63xx serial port" depends on SERIAL_BCM63XX=y diff -ruw linux-5.4.60/drivers/tty/serial/Makefile linux-5.4.60-fbx/drivers/tty/serial/Makefile --- linux-5.4.60/drivers/tty/serial/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/tty/serial/Makefile 2021-03-04 13:21:00.027505655 +0100 @@ -30,6 +30,7 @@ obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o obj-$(CONFIG_SERIAL_SA1100) += sa1100.o obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o +obj-$(CONFIG_SERIAL_BCM63XX_HS) += bcm63xx-hs-uart.o obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o obj-$(CONFIG_SERIAL_MAX3100) += max3100.o obj-$(CONFIG_SERIAL_MAX310X) += max310x.o diff -ruw linux-5.4.60/drivers/usb/host/Kconfig linux-5.4.60-fbx/drivers/usb/host/Kconfig --- linux-5.4.60/drivers/usb/host/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/usb/host/Kconfig 2021-03-04 13:21:00.080838992 +0100 @@ -70,13 +70,13 @@ If unsure, say N. config USB_XHCI_MVEBU - tristate "xHCI support for Marvell Armada 375/38x/37xx" + tristate "xHCI support for Marvell Armada 375/38x/37xx/70x0/80x0" select USB_XHCI_PLATFORM depends on HAS_IOMEM depends on ARCH_MVEBU || COMPILE_TEST ---help--- Say 'Y' to enable the support for the xHCI host controller - found in Marvell Armada 375/38x/37xx ARM SOCs. + found in Marvell Armada 375/38x/37xx/70x0/80x0 ARM SOCs. config USB_XHCI_RCAR tristate "xHCI support for Renesas R-Car SoCs" @@ -734,6 +734,10 @@ If unsure, say N. +config USB_BCM63158 + tristate "Broadcom BCM63158 SoC USB host driver" + depends on ARCH_BCM63XX || COMPILE_TEST + config USB_HCD_SSB tristate "SSB usb host driver" depends on SSB diff -ruw linux-5.4.60/drivers/usb/host/Makefile linux-5.4.60-fbx/drivers/usb/host/Makefile --- linux-5.4.60/drivers/usb/host/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/usb/host/Makefile 2021-03-04 13:21:00.080838992 +0100 @@ -88,3 +88,4 @@ obj-$(CONFIG_USB_HCD_SSB) += ssb-hcd.o obj-$(CONFIG_USB_FOTG210_HCD) += fotg210-hcd.o obj-$(CONFIG_USB_MAX3421_HCD) += max3421-hcd.o +obj-$(CONFIG_USB_BCM63158) += usb-bcm63158.o diff -ruw linux-5.4.60/drivers/usb/host/xhci-plat.c linux-5.4.60-fbx/drivers/usb/host/xhci-plat.c --- linux-5.4.60/drivers/usb/host/xhci-plat.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/usb/host/xhci-plat.c 2021-03-04 13:21:00.090838992 +0100 @@ -127,6 +127,8 @@ .compatible = "marvell,armada3700-xhci", .data = &xhci_plat_marvell_armada3700, }, { + .compatible = "marvell,armada-8k-xhci", + }, { .compatible = "renesas,xhci-r8a7790", .data = &xhci_plat_renesas_rcar_gen2, }, { diff -ruw linux-5.4.60/drivers/usb/storage/usb.c linux-5.4.60-fbx/drivers/usb/storage/usb.c --- linux-5.4.60/drivers/usb/storage/usb.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/usb/storage/usb.c 2021-03-04 13:21:00.120838993 +0100 @@ -67,7 +67,7 @@ MODULE_DESCRIPTION("USB Mass Storage driver for Linux"); MODULE_LICENSE("GPL"); -static unsigned int delay_use = 1; +static unsigned int delay_use = 5; module_param(delay_use, uint, S_IRUGO | S_IWUSR); MODULE_PARM_DESC(delay_use, "seconds to delay before using a new device"); diff -ruw linux-5.4.60/drivers/video/fbdev/Kconfig linux-5.4.60-fbx/drivers/video/fbdev/Kconfig --- linux-5.4.60/drivers/video/fbdev/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/video/fbdev/Kconfig 2021-03-04 13:21:00.130838993 +0100 @@ -2263,6 +2263,24 @@ called sm712fb. If you want to compile it as a module, say M here and read . +config FB_SSD1320 + tristate "SSD1320 OLED driver" + depends on FB && SPI + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select FB_SYS_FOPS + select FB_BACKLIGHT + +config FB_SSD1327 + tristate "SSD1327 OLED driver" + depends on FB && SPI + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select FB_SYS_FOPS + select FB_BACKLIGHT + source "drivers/video/fbdev/omap/Kconfig" source "drivers/video/fbdev/omap2/Kconfig" source "drivers/video/fbdev/mmp/Kconfig" diff -ruw linux-5.4.60/drivers/video/fbdev/Makefile linux-5.4.60-fbx/drivers/video/fbdev/Makefile --- linux-5.4.60/drivers/video/fbdev/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/video/fbdev/Makefile 2021-03-04 13:21:00.130838993 +0100 @@ -131,6 +131,8 @@ obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o obj-$(CONFIG_FB_SSD1307) += ssd1307fb.o obj-$(CONFIG_FB_SIMPLE) += simplefb.o +obj-$(CONFIG_FB_SSD1327) += ssd1327.o +obj-$(CONFIG_FB_SSD1320) += ssd1320.o # the test framebuffer is last obj-$(CONFIG_FB_VIRTUAL) += vfb.o diff -ruw linux-5.4.60/drivers/video/Kconfig linux-5.4.60-fbx/drivers/video/Kconfig --- linux-5.4.60/drivers/video/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/drivers/video/Kconfig 2021-03-04 13:21:00.127505660 +0100 @@ -46,5 +46,4 @@ endif - endmenu diff -ruw linux-5.4.60/fs/exec.c linux-5.4.60-fbx/fs/exec.c --- linux-5.4.60/fs/exec.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/fs/exec.c 2021-03-04 13:21:00.760839022 +0100 @@ -1729,6 +1729,23 @@ return PTR_ERR(filename); /* + * handle current->exec_mode: + * - if unlimited, then nothing to do. + * - if once, then set it to denied and continue (next execve + * after this one will fail). + * - if denied, then effectively fail the execve call with EPERM. + */ + switch (current->exec_mode) { + case EXEC_MODE_UNLIMITED: + break; + case EXEC_MODE_ONCE: + current->exec_mode = EXEC_MODE_DENIED; + break; + case EXEC_MODE_DENIED: + return -EPERM; + } + + /* * We move the actual failure in case of RLIMIT_NPROC excess from * set*uid() to execve() because too many poorly written programs * don't check setuid() return code. Here we additionally recheck diff -ruw linux-5.4.60/fs/Kconfig linux-5.4.60-fbx/fs/Kconfig --- linux-5.4.60/fs/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/fs/Kconfig 2021-03-04 13:21:00.697505685 +0100 @@ -143,6 +143,7 @@ source "fs/fat/Kconfig" source "fs/ntfs/Kconfig" +source "fs/exfat/Kconfig" endmenu endif # BLOCK @@ -286,6 +287,8 @@ source "fs/nfs/Kconfig" source "fs/nfsd/Kconfig" +source "fs/cifsd/Kconfig" + config GRACE_PERIOD tristate diff -ruw linux-5.4.60/fs/Makefile linux-5.4.60-fbx/fs/Makefile --- linux-5.4.60/fs/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/fs/Makefile 2021-03-04 13:21:00.697505685 +0100 @@ -91,6 +91,7 @@ obj-$(CONFIG_NFS_FS) += nfs/ obj-$(CONFIG_EXPORTFS) += exportfs/ obj-$(CONFIG_NFSD) += nfsd/ +obj-$(CONFIG_SMB_SERVER) += cifsd/ obj-$(CONFIG_LOCKD) += lockd/ obj-$(CONFIG_NLS) += nls/ obj-$(CONFIG_UNICODE) += unicode/ @@ -132,3 +133,4 @@ obj-$(CONFIG_PSTORE) += pstore/ obj-$(CONFIG_EFIVAR_FS) += efivarfs/ obj-$(CONFIG_EROFS_FS) += erofs/ +obj-$(CONFIG_EXFAT_FS_FBX) += exfat/ diff -ruw linux-5.4.60/fs/proc/array.c linux-5.4.60-fbx/fs/proc/array.c --- linux-5.4.60/fs/proc/array.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/fs/proc/array.c 2021-03-04 13:21:00.864172360 +0100 @@ -149,6 +149,21 @@ return task_state_array[task_state_index(tsk)]; } +static const char *const task_exec_mode_array[] = { + "0 (Denied)", + "1 (Once)", + "2 (Unlimited)", +}; + +static inline const char *get_task_exec_mode(struct task_struct *tsk) +{ + unsigned int exec_mode = tsk->exec_mode; + + if (exec_mode > EXEC_MODE_UNLIMITED) + return "? (Invalid)"; + return task_exec_mode_array[exec_mode]; +} + static inline void task_state(struct seq_file *m, struct pid_namespace *ns, struct pid *pid, struct task_struct *p) { @@ -378,6 +393,12 @@ seq_putc(m, '\n'); } +static inline void task_exec_mode(struct seq_file *m, + struct task_struct *p) +{ + seq_printf(m, "Exec mode: %s\n", get_task_exec_mode(p)); +} + static void task_cpus_allowed(struct seq_file *m, struct task_struct *task) { seq_printf(m, "Cpus_allowed:\t%*pb\n", @@ -424,6 +445,7 @@ task_cpus_allowed(m, task); cpuset_task_status_allowed(m, task); task_context_switch_counts(m, task); + task_exec_mode(m, task); return 0; } diff -ruw linux-5.4.60/fs/pstore/inode.c linux-5.4.60-fbx/fs/pstore/inode.c --- linux-5.4.60/fs/pstore/inode.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/fs/pstore/inode.c 2021-03-04 13:21:00.864172360 +0100 @@ -321,9 +321,10 @@ goto fail; inode->i_mode = S_IFREG | 0444; inode->i_fop = &pstore_file_operations; - scnprintf(name, sizeof(name), "%s-%s-%llu%s", + scnprintf(name, sizeof(name), "%s-%s-%s%llu%s", pstore_type_to_name(record->type), - record->psi->name, record->id, + record->psi->name, record->old ? "old-" : "", + record->id, record->compressed ? ".enc.z" : ""); private = kzalloc(sizeof(*private), GFP_KERNEL); diff -ruw linux-5.4.60/fs/pstore/ram.c linux-5.4.60-fbx/fs/pstore/ram.c --- linux-5.4.60/fs/pstore/ram.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/fs/pstore/ram.c 2021-03-04 13:21:00.867505693 +0100 @@ -131,6 +131,7 @@ record->type = prz->type; record->id = id; + record->old = prz->old_zone; return prz; } @@ -516,7 +517,7 @@ static int ramoops_init_przs(const char *name, struct device *dev, struct ramoops_context *cxt, struct persistent_ram_zone ***przs, - phys_addr_t *paddr, size_t mem_sz, + phys_addr_t *paddr, void *vaddr, size_t mem_sz, ssize_t record_size, unsigned int *cnt, u32 sig, u32 flags) { @@ -580,7 +581,7 @@ else label = kasprintf(GFP_KERNEL, "ramoops:%s(%d/%d)", name, i, *cnt - 1); - prz_ar[i] = persistent_ram_new(*paddr, zone_sz, sig, + prz_ar[i] = persistent_ram_new(*paddr, vaddr, zone_sz, sig, &cxt->ecc_info, cxt->memtype, flags, label); kfree(label); @@ -612,7 +613,7 @@ static int ramoops_init_prz(const char *name, struct device *dev, struct ramoops_context *cxt, struct persistent_ram_zone **prz, - phys_addr_t *paddr, size_t sz, u32 sig) + phys_addr_t *paddr, void *vaddr, size_t sz, u32 sig) { char *label; @@ -627,7 +628,7 @@ } label = kasprintf(GFP_KERNEL, "ramoops:%s", name); - *prz = persistent_ram_new(*paddr, sz, sig, &cxt->ecc_info, + *prz = persistent_ram_new(*paddr, vaddr, sz, sig, &cxt->ecc_info, cxt->memtype, PRZ_FLAG_ZAP_OLD, label); kfree(label); if (IS_ERR(*prz)) { @@ -794,12 +795,14 @@ dump_mem_sz = cxt->size - cxt->console_size - cxt->ftrace_size - cxt->pmsg_size; err = ramoops_init_przs("dmesg", dev, cxt, &cxt->dprzs, &paddr, + pdata->mem_ptr, dump_mem_sz, cxt->record_size, &cxt->max_dump_cnt, 0, 0); if (err) goto fail_out; err = ramoops_init_prz("console", dev, cxt, &cxt->cprz, &paddr, + pdata->mem_ptr, cxt->console_size, 0); if (err) goto fail_init_cprz; @@ -808,6 +811,7 @@ ? nr_cpu_ids : 1; err = ramoops_init_przs("ftrace", dev, cxt, &cxt->fprzs, &paddr, + pdata->mem_ptr, cxt->ftrace_size, -1, &cxt->max_ftrace_cnt, LINUX_VERSION_CODE, (cxt->flags & RAMOOPS_FLAG_FTRACE_PER_CPU) @@ -816,6 +820,7 @@ goto fail_init_fprz; err = ramoops_init_prz("pmsg", dev, cxt, &cxt->mprz, &paddr, + pdata->mem_ptr, cxt->pmsg_size, 0); if (err) goto fail_init_mprz; diff -ruw linux-5.4.60/fs/pstore/ram_core.c linux-5.4.60-fbx/fs/pstore/ram_core.c --- linux-5.4.60/fs/pstore/ram_core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/fs/pstore/ram_core.c 2021-03-04 13:21:00.867505693 +0100 @@ -34,6 +34,7 @@ uint32_t sig; atomic_t start; atomic_t size; + atomic_t flags; uint8_t data[0]; }; @@ -395,6 +396,7 @@ { atomic_set(&prz->buffer->start, 0); atomic_set(&prz->buffer->size, 0); + atomic_set(&prz->buffer->flags, 0); persistent_ram_update_header_ecc(prz); } @@ -463,13 +465,16 @@ return va; } -static int persistent_ram_buffer_map(phys_addr_t start, phys_addr_t size, +static int persistent_ram_buffer_map(phys_addr_t start, void *vaddr, + phys_addr_t size, struct persistent_ram_zone *prz, int memtype) { prz->paddr = start; prz->size = size; - if (pfn_valid(start >> PAGE_SHIFT)) + if (vaddr) + prz->vaddr = vaddr; + else if (pfn_valid(start >> PAGE_SHIFT)) prz->vaddr = persistent_ram_vmap(start, size, memtype); else prz->vaddr = persistent_ram_iomap(start, size, memtype, @@ -516,6 +521,15 @@ pr_debug("found existing buffer, size %zu, start %zu\n", buffer_size(prz), buffer_start(prz)); persistent_ram_save_old(prz); + + if (atomic_read(&prz->buffer->flags) > 0) { + pr_info("old ramoops!\n"); + prz->old_zone = true; + } else { + pr_info("fresh ramoops!\n"); + atomic_set(&prz->buffer->flags, 1); + } + persistent_ram_update_header_ecc(prz); } } else { pr_debug("no valid data in buffer (sig = 0x%08x)\n", @@ -558,7 +572,8 @@ kfree(prz); } -struct persistent_ram_zone *persistent_ram_new(phys_addr_t start, size_t size, +struct persistent_ram_zone *persistent_ram_new(phys_addr_t start, + void *vaddr, size_t size, u32 sig, struct persistent_ram_ecc_info *ecc_info, unsigned int memtype, u32 flags, char *label) { @@ -576,7 +591,7 @@ prz->flags = flags; prz->label = kstrdup(label, GFP_KERNEL); - ret = persistent_ram_buffer_map(start, size, prz, memtype); + ret = persistent_ram_buffer_map(start, vaddr, size, prz, memtype); if (ret) goto err; diff -ruw linux-5.4.60/include/asm-generic/vmlinux.lds.h linux-5.4.60-fbx/include/asm-generic/vmlinux.lds.h --- linux-5.4.60/include/asm-generic/vmlinux.lds.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/asm-generic/vmlinux.lds.h 2021-03-04 13:21:00.920839029 +0100 @@ -264,7 +264,7 @@ #define KERNEL_DTB() \ STRUCT_ALIGN(); \ __dtb_start = .; \ - KEEP(*(.dtb.init.rodata)) \ + KEEP(*(.dtb.rodata)) \ __dtb_end = .; /* @@ -354,6 +354,7 @@ . = ALIGN((align)); \ .rodata : AT(ADDR(.rodata) - LOAD_OFFSET) { \ __start_rodata = .; \ + KERNEL_DTB() \ *(.rodata) *(.rodata.*) \ RO_AFTER_INIT_DATA /* Read only after init */ \ . = ALIGN(8); \ @@ -644,7 +645,6 @@ TIMER_OF_TABLES() \ CPU_METHOD_OF_TABLES() \ CPUIDLE_METHOD_OF_TABLES() \ - KERNEL_DTB() \ IRQCHIP_OF_MATCH_TABLE() \ ACPI_PROBE_TABLE(irqchip) \ ACPI_PROBE_TABLE(timer) \ diff -ruw linux-5.4.60/include/linux/ethtool.h linux-5.4.60-fbx/include/linux/ethtool.h --- linux-5.4.60/include/linux/ethtool.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/ethtool.h 2021-03-04 13:21:00.967505698 +0100 @@ -404,6 +404,14 @@ struct ethtool_fecparam *); void (*get_ethtool_phy_stats)(struct net_device *, struct ethtool_stats *, u64 *); + int (*get_epon_param)(struct net_device *, + struct ethtool_epon_param *); + int (*set_epon_param)(struct net_device *, + const struct ethtool_epon_param *); + int (*set_shaper_param)(struct net_device *, + const struct ethtool_shaper_params *); + int (*get_shaper_param)(struct net_device *, + struct ethtool_shaper_params *); }; struct ethtool_rx_flow_rule { diff -ruw linux-5.4.60/include/linux/genhd.h linux-5.4.60-fbx/include/linux/genhd.h --- linux-5.4.60/include/linux/genhd.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/genhd.h 2021-03-04 13:21:00.970839031 +0100 @@ -91,6 +91,7 @@ unsigned long io_ticks; unsigned long time_in_queue; local_t in_flight[2]; + unsigned long io_errors[2]; }; #define PARTITION_META_INFO_VOLNAMELTH 64 @@ -614,6 +615,7 @@ #define ADDPART_FLAG_NONE 0 #define ADDPART_FLAG_RAID 1 #define ADDPART_FLAG_WHOLEDISK 2 +#define ADDPART_FLAG_RO 4 extern int blk_alloc_devt(struct hd_struct *part, dev_t *devt); extern void blk_free_devt(dev_t devt); diff -ruw linux-5.4.60/include/linux/if_vlan.h linux-5.4.60-fbx/include/linux/if_vlan.h --- linux-5.4.60/include/linux/if_vlan.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/if_vlan.h 2021-03-04 13:21:00.977505698 +0100 @@ -12,6 +12,7 @@ #include #include #include +#include #define VLAN_HLEN 4 /* The additional bytes required by VLAN * (in addition to the Ethernet header) @@ -134,6 +135,7 @@ int (*action)(struct net_device *dev, int vid, void *arg), void *arg); extern struct net_device *vlan_dev_real_dev(const struct net_device *dev); +extern struct net_device *vlan_dev_upper_dev(const struct net_device *dev); extern u16 vlan_dev_vlan_id(const struct net_device *dev); extern __be16 vlan_dev_vlan_proto(const struct net_device *dev); @@ -200,7 +202,7 @@ mp = vlan_dev_priv(dev)->egress_priority_map[(skprio & 0xF)]; while (mp) { - if (mp->priority == skprio) { + if (mp->priority == (skprio & TC_H_MIN_MASK)) { return mp->vlan_qos; /* This should already be shifted * to mask correctly with the * VLAN's TCI */ @@ -242,6 +244,12 @@ { BUG(); return NULL; +} + +static inline struct net_device *vlan_dev_upper_dev(const struct net_device *dev) +{ + BUG(); + return NULL; } static inline u16 vlan_dev_vlan_id(const struct net_device *dev) diff -ruw linux-5.4.60/include/linux/in.h linux-5.4.60-fbx/include/linux/in.h --- linux-5.4.60/include/linux/in.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/in.h 2021-03-04 13:21:00.980839031 +0100 @@ -30,6 +30,9 @@ return 0; case IPPROTO_AH: /* SPI */ return 4; + case IPPROTO_IPV6: + /* third byte of ipv6 destination address */ + return 36; default: return -EINVAL; } diff -ruw linux-5.4.60/include/linux/miscdevice.h linux-5.4.60-fbx/include/linux/miscdevice.h --- linux-5.4.60/include/linux/miscdevice.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/miscdevice.h 2021-03-04 13:21:01.004172366 +0100 @@ -21,6 +21,7 @@ #define APOLLO_MOUSE_MINOR 7 /* unused */ #define PC110PAD_MINOR 9 /* unused */ /*#define ADB_MOUSE_MINOR 10 FIXME OBSOLETE */ +#define TALDEV_MINOR 74 /* Marvell TAL device */ #define WATCHDOG_MINOR 130 /* Watchdog timer */ #define TEMP_MINOR 131 /* Temperature Sensor */ #define APM_MINOR_DEV 134 diff -ruw linux-5.4.60/include/linux/mtd/mtd.h linux-5.4.60-fbx/include/linux/mtd/mtd.h --- linux-5.4.60/include/linux/mtd/mtd.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/mtd/mtd.h 2021-03-04 13:21:01.010839033 +0100 @@ -247,6 +247,12 @@ */ unsigned int bitflip_threshold; + /* NAND related attributes */ + const char *nand_type; + const char *nand_manufacturer; + const char *onfi_model; + uint8_t onfi_ecc_bits; + /* Kernel-only stuff starts here. */ const char *name; int index; diff -ruw linux-5.4.60/include/linux/mtd/spi-nor.h linux-5.4.60-fbx/include/linux/mtd/spi-nor.h --- linux-5.4.60/include/linux/mtd/spi-nor.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/mtd/spi-nor.h 2021-03-04 13:21:01.010839033 +0100 @@ -56,9 +56,11 @@ #define SPINOR_OP_PP_1_8_8 0xc2 /* Octal page program */ #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */ #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ +#define SPINOR_OP_EWRSR 0x50 /* SST: Enable write to status reg */ #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */ #define SPINOR_OP_CHIP_ERASE 0xc7 /* Erase whole flash chip */ #define SPINOR_OP_SE 0xd8 /* Sector erase (usually 64KiB) */ +#define SPINOR_OP_RDID_ALT 0x90 /* Read ID (alt) */ #define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */ #define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */ #define SPINOR_OP_RDCR 0x35 /* Read configuration register */ @@ -598,6 +600,8 @@ ssize_t (*write)(struct spi_nor *nor, loff_t to, size_t len, const u_char *write_buf); int (*erase)(struct spi_nor *nor, loff_t offs); + int (*read_alt_id)(struct spi_nor *nor, u8 cmd, u8 *val, int len); + int (*read_atmel_id)(struct spi_nor *nor, u8 cmd, u8 *val, int len); int (*clear_sr_bp)(struct spi_nor *nor); struct spi_nor_flash_parameter params; diff -ruw linux-5.4.60/include/linux/netdevice.h linux-5.4.60-fbx/include/linux/netdevice.h --- linux-5.4.60/include/linux/netdevice.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/netdevice.h 2021-03-04 13:21:01.014172366 +0100 @@ -65,6 +65,20 @@ struct bpf_prog; struct xdp_buff; +#ifdef CONFIG_NETRXTHREAD + +#define RXTHREAD_MAX_PKTS 512 +struct krxd { + struct sk_buff_head pkt_queue; + unsigned int stats_pkts; + unsigned int stats_dropped; + wait_queue_head_t wq; + struct task_struct *task; +}; + +extern struct krxd gkrxd[CONFIG_NETRXTHREAD_RX_QUEUE]; +#endif + void netdev_set_default_ethtool_ops(struct net_device *dev, const struct ethtool_ops *ops); @@ -1522,6 +1536,8 @@ IFF_FAILOVER_SLAVE = 1<<28, IFF_L3MDEV_RX_HANDLER = 1<<29, IFF_LIVE_RENAME_OK = 1<<30, + IFF_FBXBRIDGE = 1ULL<<31, + IFF_FBXBRIDGE_PORT = 1ULL<<32, }; #define IFF_802_1Q_VLAN IFF_802_1Q_VLAN @@ -1554,6 +1570,8 @@ #define IFF_FAILOVER_SLAVE IFF_FAILOVER_SLAVE #define IFF_L3MDEV_RX_HANDLER IFF_L3MDEV_RX_HANDLER #define IFF_LIVE_RENAME_OK IFF_LIVE_RENAME_OK +#define IFF_FBXBRIDGE IFF_FBXBRIDGE +#define IFF_FBXBRIDGE_PORT IFF_FBXBRIDGE_PORT /** * struct net_device - The DEVICE structure. @@ -1858,7 +1876,7 @@ const struct header_ops *header_ops; unsigned int flags; - unsigned int priv_flags; + u64 priv_flags; unsigned short gflags; unsigned short padded; @@ -4616,6 +4634,16 @@ return dev->priv_flags & IFF_BRIDGE_PORT; } +static inline bool netif_is_fbxbridge_master(const struct net_device *dev) +{ + return dev->priv_flags & IFF_FBXBRIDGE; +} + +static inline bool netif_is_fbxbridge_port(const struct net_device *dev) +{ + return dev->priv_flags & IFF_FBXBRIDGE_PORT; +} + static inline bool netif_is_ovs_master(const struct net_device *dev) { return dev->priv_flags & IFF_OPENVSWITCH; diff -ruw linux-5.4.60/include/linux/netfilter/nf_conntrack_ftp.h linux-5.4.60-fbx/include/linux/netfilter/nf_conntrack_ftp.h --- linux-5.4.60/include/linux/netfilter/nf_conntrack_ftp.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/netfilter/nf_conntrack_ftp.h 2021-03-04 13:21:01.014172366 +0100 @@ -22,6 +22,11 @@ u_int16_t seq_aft_nl_num[IP_CT_DIR_MAX]; /* pickup sequence tracking, useful for conntrackd */ u_int16_t flags[IP_CT_DIR_MAX]; +#if defined(CONFIG_FREEBOX_BRIDGE) || defined(CONFIG_FREEBOX_BRIDGE_MODULE) + unsigned int is_fbxbridge; + unsigned long fbxbridge_remote; + unsigned long fbxbridge_wan; +#endif }; /* For NAT to hook in when we find a packet which describes what other diff -ruw linux-5.4.60/include/linux/netfilter/nf_conntrack_sip.h linux-5.4.60-fbx/include/linux/netfilter/nf_conntrack_sip.h --- linux-5.4.60/include/linux/netfilter/nf_conntrack_sip.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/netfilter/nf_conntrack_sip.h 2021-03-04 13:21:01.014172366 +0100 @@ -5,6 +5,7 @@ #include #include #include +#include #define SIP_PORT 5060 #define SIP_TIMEOUT 3600 @@ -30,6 +31,10 @@ enum sip_expectation_classes class; }; +struct nf_ct_sip_expect { + u8 cid_hash[SHA256_DIGEST_SIZE]; +}; + #define SDP_MEDIA_TYPE(__name, __class) \ { \ .name = (__name), \ diff -ruw linux-5.4.60/include/linux/netfilter/nf_conntrack_tcp.h linux-5.4.60-fbx/include/linux/netfilter/nf_conntrack_tcp.h --- linux-5.4.60/include/linux/netfilter/nf_conntrack_tcp.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/netfilter/nf_conntrack_tcp.h 2021-03-04 13:21:01.014172366 +0100 @@ -28,6 +28,7 @@ /* For SYN packets while we may be out-of-sync */ u_int8_t last_wscale; /* Last window scaling factor seen */ u_int8_t last_flags; /* Last flags set */ + u_int32_t no_window_track; }; #endif /* _NF_CONNTRACK_TCP_H */ diff -ruw linux-5.4.60/include/linux/of_fdt.h linux-5.4.60-fbx/include/linux/of_fdt.h --- linux-5.4.60/include/linux/of_fdt.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/of_fdt.h 2021-03-04 13:21:01.017505700 +0100 @@ -89,6 +89,7 @@ extern void unflatten_and_copy_device_tree(void); extern void early_init_devtree(void *); extern void early_get_first_memblock_info(void *, phys_addr_t *); +const void *of_fdt_find_compatible_dtb(const char *name); #else /* CONFIG_OF_EARLY_FLATTREE */ static inline int early_init_dt_scan_chosen_stdout(void) { return -ENODEV; } static inline void early_init_fdt_scan_reserved_mem(void) {} diff -ruw linux-5.4.60/include/linux/pci_ids.h linux-5.4.60-fbx/include/linux/pci_ids.h --- linux-5.4.60/include/linux/pci_ids.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/pci_ids.h 2021-03-04 13:21:01.020839033 +0100 @@ -1838,6 +1838,7 @@ #define PCI_DEVICE_ID_PERICOM_PI7C9X7952 0x7952 #define PCI_DEVICE_ID_PERICOM_PI7C9X7954 0x7954 #define PCI_DEVICE_ID_PERICOM_PI7C9X7958 0x7958 +#define PCI_DEVICE_ID_PI7C9X20303SL 0xa303 #define PCI_SUBVENDOR_ID_CHASE_PCIFAST 0x12E0 #define PCI_SUBDEVICE_ID_CHASE_PCIFAST4 0x0031 diff -ruw linux-5.4.60/include/linux/phy.h linux-5.4.60-fbx/include/linux/phy.h --- linux-5.4.60/include/linux/phy.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/phy.h 2021-03-04 13:21:01.020839033 +0100 @@ -102,6 +102,14 @@ /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */ PHY_INTERFACE_MODE_10GKR, PHY_INTERFACE_MODE_USXGMII, + + PHY_INTERFACE_MODE_1000BASEPX_D, + PHY_INTERFACE_MODE_1000BASEPX_U, + PHY_INTERFACE_MODE_10000BASEPR_D, + PHY_INTERFACE_MODE_10000BASEPR_U, + PHY_INTERFACE_MODE_10000_1000_BASEPRX_D, + PHY_INTERFACE_MODE_10000_1000_BASEPRX_U, + PHY_INTERFACE_MODE_MAX, } phy_interface_t; @@ -179,6 +187,18 @@ return "10gbase-kr"; case PHY_INTERFACE_MODE_USXGMII: return "usxgmii"; + case PHY_INTERFACE_MODE_1000BASEPX_D: + return "1000base-px-d"; + case PHY_INTERFACE_MODE_1000BASEPX_U: + return "1000base-px-u"; + case PHY_INTERFACE_MODE_10000BASEPR_D: + return "10000base-pr-d"; + case PHY_INTERFACE_MODE_10000BASEPR_U: + return "10000base-pr-u"; + case PHY_INTERFACE_MODE_10000_1000_BASEPRX_D: + return "10000_1000base-prx-d"; + case PHY_INTERFACE_MODE_10000_1000_BASEPRX_U: + return "10000_1000base-prx-u"; default: return "unknown"; } diff -ruw linux-5.4.60/include/linux/phylink.h linux-5.4.60-fbx/include/linux/phylink.h --- linux-5.4.60/include/linux/phylink.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/phylink.h 2021-03-04 13:21:01.020839033 +0100 @@ -279,4 +279,7 @@ void phylink_set_port_modes(unsigned long *bits); void phylink_helper_basex_speed(struct phylink_link_state *state); +int phylink_set_interface_mode(struct phylink *pl, int mode); +void phylink_revalidate(struct phylink *pl); + #endif diff -ruw linux-5.4.60/include/linux/ppp_channel.h linux-5.4.60-fbx/include/linux/ppp_channel.h --- linux-5.4.60/include/linux/ppp_channel.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/ppp_channel.h 2021-03-04 13:21:01.030839034 +0100 @@ -45,6 +45,9 @@ /* Called by the channel when it can send some more data. */ extern void ppp_output_wakeup(struct ppp_channel *); +/* Called by the channel when it want to prevent further transmit on it */ +extern void ppp_output_stop(struct ppp_channel *); + /* Called by the channel to process a received PPP packet. The packet should have just the 2-byte PPP protocol header. */ extern void ppp_input(struct ppp_channel *, struct sk_buff *); diff -ruw linux-5.4.60/include/linux/pstore.h linux-5.4.60-fbx/include/linux/pstore.h --- linux-5.4.60/include/linux/pstore.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/pstore.h 2021-03-04 13:21:01.034172367 +0100 @@ -64,6 +64,7 @@ * @reason: kdump reason for notification * @part: position in a multipart record * @compressed: whether the buffer is compressed + * @old: reflects underlying prz old_zone. * */ struct pstore_record { @@ -79,6 +80,7 @@ enum kmsg_dump_reason reason; unsigned int part; bool compressed; + bool old; }; /** diff -ruw linux-5.4.60/include/linux/pstore_ram.h linux-5.4.60-fbx/include/linux/pstore_ram.h --- linux-5.4.60/include/linux/pstore_ram.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/pstore_ram.h 2021-03-04 13:21:01.034172367 +0100 @@ -75,6 +75,10 @@ * @old_log_size: * bytes contained in @old_log * + * @old_zone: + * tells whether the zone has just been freshly created, and has + * been read for the first time, this boot, or if it is old, and + * has been created many boots ago. */ struct persistent_ram_zone { phys_addr_t paddr; @@ -97,9 +101,12 @@ char *old_log; size_t old_log_size; + + bool old_zone; }; -struct persistent_ram_zone *persistent_ram_new(phys_addr_t start, size_t size, +struct persistent_ram_zone *persistent_ram_new(phys_addr_t start, + void *addr, size_t size, u32 sig, struct persistent_ram_ecc_info *ecc_info, unsigned int memtype, u32 flags, char *label); void persistent_ram_free(struct persistent_ram_zone *prz); @@ -128,6 +135,7 @@ struct ramoops_platform_data { unsigned long mem_size; phys_addr_t mem_address; + void *mem_ptr; unsigned int mem_type; unsigned long record_size; unsigned long console_size; diff -ruw linux-5.4.60/include/linux/regmap.h linux-5.4.60-fbx/include/linux/regmap.h --- linux-5.4.60/include/linux/regmap.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/regmap.h 2021-03-04 13:21:01.037505700 +0100 @@ -1278,6 +1278,7 @@ int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); +void __iomem *regmap_get_mmio_base_address(struct regmap *map); #else /* diff -ruw linux-5.4.60/include/linux/sched.h linux-5.4.60-fbx/include/linux/sched.h --- linux-5.4.60/include/linux/sched.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/sched.h 2021-03-04 13:21:01.040839034 +0100 @@ -621,6 +621,12 @@ struct wake_q_node *next; }; +enum task_exec_mode { + EXEC_MODE_DENIED, + EXEC_MODE_ONCE, + EXEC_MODE_UNLIMITED, +}; + struct task_struct { #ifdef CONFIG_THREAD_INFO_IN_TASK /* @@ -643,6 +649,7 @@ /* Per task flags (PF_*), defined further below: */ unsigned int flags; unsigned int ptrace; + enum task_exec_mode exec_mode; #ifdef CONFIG_SMP struct llist_node wake_entry; diff -ruw linux-5.4.60/include/linux/sfp.h linux-5.4.60-fbx/include/linux/sfp.h --- linux-5.4.60/include/linux/sfp.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/sfp.h 2021-03-04 13:21:01.044172368 +0100 @@ -506,6 +506,7 @@ int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo); int sfp_get_module_eeprom(struct sfp_bus *bus, struct ethtool_eeprom *ee, u8 *data); +int sfp_get_sfp_state(struct sfp_bus *bus, struct ethtool_sfp_state *st); void sfp_upstream_start(struct sfp_bus *bus); void sfp_upstream_stop(struct sfp_bus *bus); struct sfp_bus *sfp_register_upstream(struct fwnode_handle *fwnode, @@ -544,6 +545,12 @@ { return -EOPNOTSUPP; } + +static inline int sfp_get_sfp_state(struct sfp_bus *the_bus, + struct ethtool_sfp_state *st) +{ + return -EOPNOTSUPP; +} static inline void sfp_upstream_start(struct sfp_bus *bus) { diff -ruw linux-5.4.60/include/linux/skbuff.h linux-5.4.60-fbx/include/linux/skbuff.h --- linux-5.4.60/include/linux/skbuff.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/skbuff.h 2021-03-04 13:21:01.047505701 +0100 @@ -604,6 +604,13 @@ typedef unsigned char *sk_buff_data_t; #endif +enum { + FFN_STATE_INIT = 0, + FFN_STATE_FORWARDABLE, + FFN_STATE_FAST_FORWARDED, + FFN_STATE_INCOMPATIBLE, +}; + /** * struct sk_buff - socket buffer * @next: Next buffer in list @@ -730,11 +737,20 @@ #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) unsigned long _nfct; #endif + +#if defined(CONFIG_IP_FFN) || defined(CONFIG_IPV6_FFN) + int ffn_state; + int ffn_orig_tos; +#endif unsigned int len, data_len; __u16 mac_len, hdr_len; +#ifdef CONFIG_NETRXTHREAD + int rxthread_prio; +#endif + /* Following fields are _not_ copied in __copy_skb_header() * Note that queue_mapping is here mostly to fill a hole. */ @@ -2632,6 +2648,10 @@ * get_rps_cpus() for example only access one 64 bytes aligned block : * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8) */ +#ifdef CONFIG_NETSKBPAD +#define NET_SKB_PAD CONFIG_NETSKBPAD +#endif + #ifndef NET_SKB_PAD #define NET_SKB_PAD max(32, L1_CACHE_BYTES) #endif diff -ruw linux-5.4.60/include/linux/tcp.h linux-5.4.60-fbx/include/linux/tcp.h --- linux-5.4.60/include/linux/tcp.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/tcp.h 2021-03-04 13:21:01.054172368 +0100 @@ -225,7 +225,8 @@ fastopen_connect:1, /* FASTOPEN_CONNECT sockopt */ fastopen_no_cookie:1, /* Allow send/recv SYN+data without a cookie */ is_sack_reneg:1, /* in recovery from loss with SACK reneg? */ - unused:2; + linear_rto : 1, + unused:1; u8 nonagle : 4,/* Disable Nagle algorithm? */ thin_lto : 1,/* Use linear timeouts for thin streams */ recvmsg_inq : 1,/* Indicate # of bytes in queue upon recvmsg */ diff -ruw linux-5.4.60/include/linux/thermal.h linux-5.4.60-fbx/include/linux/thermal.h --- linux-5.4.60/include/linux/thermal.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/linux/thermal.h 2021-03-04 13:21:01.054172368 +0100 @@ -444,6 +444,9 @@ struct thermal_cooling_device *thermal_cooling_device_register(const char *, void *, const struct thermal_cooling_device_ops *); +struct thermal_cooling_device *thermal_cooling_device_register_with_parent( + struct device *pdev, const char *, void *, + const struct thermal_cooling_device_ops *); struct thermal_cooling_device * thermal_of_cooling_device_register(struct device_node *np, const char *, void *, const struct thermal_cooling_device_ops *); diff -ruw linux-5.4.60/include/media/dvb-usb-ids.h linux-5.4.60-fbx/include/media/dvb-usb-ids.h --- linux-5.4.60/include/media/dvb-usb-ids.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/media/dvb-usb-ids.h 2021-03-04 13:21:01.067505702 +0100 @@ -117,6 +117,7 @@ #define USB_PID_DELOCK_USB2_DVBT 0xb803 #define USB_PID_DIBCOM_HOOK_DEFAULT 0x0064 #define USB_PID_DIBCOM_HOOK_DEFAULT_REENUM 0x0065 +#define USB_PID_DIBCOM_HOOK_DEFAULT_STK7770P 0x0066 #define USB_PID_DIBCOM_MOD3000_COLD 0x0bb8 #define USB_PID_DIBCOM_MOD3000_WARM 0x0bb9 #define USB_PID_DIBCOM_MOD3001_COLD 0x0bc6 diff -ruw linux-5.4.60/include/net/cfg80211.h linux-5.4.60-fbx/include/net/cfg80211.h --- linux-5.4.60/include/net/cfg80211.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/cfg80211.h 2021-03-04 13:21:01.077505702 +0100 @@ -117,6 +117,7 @@ (IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS) #define IEEE80211_DFS_MIN_CAC_TIME_MS 60000 +#define IEEE80211_DFS_WEATHER_MIN_CAC_TIME_MS 600000 #define IEEE80211_DFS_MIN_NOP_TIME_MS (30 * 60 * 1000) /** @@ -1823,6 +1824,17 @@ }; /** + * struct mesh_setup - 802.11s mesh setup configuration + * @ie: vendor information elements + * @ie_len: length of vendor information elements + * These parameters are updated peroidically after mesh creation. + */ +struct mesh_vendor_ie { + const u8 *ie; + u8 ie_len; +}; + +/** * struct ocb_setup - 802.11p OCB mode setup configuration * @chandef: defines the channel to use * @@ -3684,6 +3696,10 @@ int (*add_mpath)(struct wiphy *wiphy, struct net_device *dev, const u8 *dst, const u8 *next_hop); + int (*update_mpp)(struct wiphy *wiphy, struct net_device *dev, + const u8 *dst, const u8 *next_hop); + int (*delete_mpp)(struct wiphy *wiphy, struct net_device *dev, + const u8 *dst); int (*del_mpath)(struct wiphy *wiphy, struct net_device *dev, const u8 *dst); int (*change_mpath)(struct wiphy *wiphy, struct net_device *dev, @@ -3708,6 +3724,12 @@ const struct mesh_config *conf, const struct mesh_setup *setup); int (*leave_mesh)(struct wiphy *wiphy, struct net_device *dev); + int (*update_mesh_vendor_node_metrics_ie)(struct wiphy *wiphy, + struct net_device *dev, + const struct mesh_vendor_ie *vendor_ie); + int (*update_mesh_vendor_path_metrics_ie)(struct wiphy *wiphy, + struct net_device *dev, + const struct mesh_vendor_ie *vendor_ie); int (*join_ocb)(struct wiphy *wiphy, struct net_device *dev, struct ocb_setup *setup); @@ -7449,7 +7471,40 @@ */ bool cfg80211_iftype_allowed(struct wiphy *wiphy, enum nl80211_iftype iftype, bool is_4addr, u8 check_swif); - +/** + * cfg80211_notify_mesh_peer_node_metrics - notify cfg80211 of new mesh peer node metrics + * + * @dev: network device + * @macaddr: the MAC address of the new candidate + * @stype: Management frame sub type + * @signal: Frame received signal strength + * @beacon_int: Beacon interval advertised in received beacon frame + * @ie: vendor specific information elements advertised by the peer candidate + * @ie_len: lenght of the vendor specific information elements buffer + * @gfp: allocation flags + * + * This function notifies cfg80211 that the mesh peer management frame has been + * detected, most likely via a beacon or, less likely, via a probe response, probe request. + * cfg80211 then sends a notification to userspace. + */ +void cfg80211_notify_mesh_peer_node_metrics(struct net_device *dev, + const u8 *macaddr, u16 stype, s8 signal, + u32 beacon_int, const u8 *ie, u8 ie_len, gfp_t gfp); +/** + * cfg80211_notify_mesh_peer_path_metrics - notify cfg80211 of mesh peer path metrics recieved + * + * @dev: network device + * @macaddr: the MAC address of the new candidate + * @ie: information elements advertised by the peer candidate + * @ie_len: lenght of the information elements buffer + * @gfp: allocation flags + * + * This function notifies cfg80211 that the mesh path metrics has been + * recieved, most likely via a beacon or, less likely, via a probe response. + * cfg80211 then sends a notification to userspace. + */ +void cfg80211_notify_mesh_peer_path_metrics(struct net_device *dev, const u8 *macaddr, + const u8 *ie, u8 ie_len, gfp_t gfp); /* Logging, debugging and troubleshooting/diagnostic helpers. */ diff -ruw linux-5.4.60/include/net/dsa.h linux-5.4.60-fbx/include/net/dsa.h --- linux-5.4.60/include/net/dsa.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/dsa.h 2021-03-04 13:21:01.080839036 +0100 @@ -42,6 +42,7 @@ #define DSA_TAG_PROTO_8021Q_VALUE 12 #define DSA_TAG_PROTO_SJA1105_VALUE 13 #define DSA_TAG_PROTO_KSZ8795_VALUE 14 +#define DSA_TAG_PROTO_BRCM_FBX_VALUE 15 enum dsa_tag_protocol { DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE, @@ -59,6 +60,7 @@ DSA_TAG_PROTO_8021Q = DSA_TAG_PROTO_8021Q_VALUE, DSA_TAG_PROTO_SJA1105 = DSA_TAG_PROTO_SJA1105_VALUE, DSA_TAG_PROTO_KSZ8795 = DSA_TAG_PROTO_KSZ8795_VALUE, + DSA_TAG_PROTO_BRCM_FBX = DSA_TAG_PROTO_BRCM_FBX_VALUE, }; struct packet_type; @@ -123,11 +125,6 @@ struct dsa_platform_data *pd; /* - * The switch port to which the CPU is attached. - */ - struct dsa_port *cpu_dp; - - /* * Data for the individual switch chips. */ struct dsa_switch *ds[DSA_MAX_SWITCHES]; @@ -179,6 +176,8 @@ DSA_PORT_TYPE_DSA, DSA_PORT_TYPE_USER, } type; + bool is_def_cpu_port; + struct device_node *force_cpu_dn; struct dsa_switch *ds; unsigned int index; @@ -601,6 +600,7 @@ struct net_device *master; unsigned int port_number; unsigned int switch_number; + unsigned int cpu_port_number; }; static inline struct net_device * diff -ruw linux-5.4.60/include/net/ip6_tunnel.h linux-5.4.60-fbx/include/net/ip6_tunnel.h --- linux-5.4.60/include/net/ip6_tunnel.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/ip6_tunnel.h 2021-03-04 13:21:01.080839036 +0100 @@ -18,6 +18,18 @@ /* determine capability on a per-packet basis */ #define IP6_TNL_F_CAP_PER_PACKET 0x40000 +/* IPv6 tunnel FMR */ +struct __ip6_tnl_fmr { + struct __ip6_tnl_fmr *next; /* next fmr in list */ + struct in6_addr ip6_prefix; + struct in_addr ip4_prefix; + + __u8 ip6_prefix_len; + __u8 ip4_prefix_len; + __u8 ea_len; + __u8 offset; +}; + struct __ip6_tnl_parm { char name[IFNAMSIZ]; /* name of tunnel device */ int link; /* ifindex of underlying L2 interface */ @@ -29,6 +41,7 @@ __u32 flags; /* tunnel flags */ struct in6_addr laddr; /* local tunnel end-point address */ struct in6_addr raddr; /* remote tunnel end-point address */ + struct __ip6_tnl_fmr *fmrs; /* FMRs */ __be16 i_flags; __be16 o_flags; diff -ruw linux-5.4.60/include/net/ip.h linux-5.4.60-fbx/include/net/ip.h --- linux-5.4.60/include/net/ip.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/ip.h 2021-03-04 13:21:01.080839036 +0100 @@ -685,6 +685,20 @@ #endif /* + * Functions provided by ip_ffn.c + */ + +enum { + IP_FFN_FINISH_OUT, + IP_FFN_LOCAL_IN, +}; + +extern void ip_ffn_init(void); +extern int ip_ffn_process(struct sk_buff *skb); +extern void ip_ffn_add(struct sk_buff *skb, int when); +extern void ip_ffn_flush_all(void); + +/* * Functions provided by ip_forward.c */ diff -ruw linux-5.4.60/include/net/ipv6.h linux-5.4.60-fbx/include/net/ipv6.h --- linux-5.4.60/include/net/ipv6.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/ipv6.h 2021-03-04 13:21:01.080839036 +0100 @@ -1032,6 +1032,7 @@ int ip6_output(struct net *net, struct sock *sk, struct sk_buff *skb); int ip6_forward(struct sk_buff *skb); int ip6_input(struct sk_buff *skb); +int ip6_input_finish(struct net *net, struct sock *sk, struct sk_buff *skb); int ip6_mc_input(struct sk_buff *skb); void ip6_protocol_deliver_rcu(struct net *net, struct sk_buff *skb, int nexthdr, bool have_final); @@ -1161,4 +1162,19 @@ const struct in6_addr *addr, unsigned int mode); int ipv6_sock_mc_drop(struct sock *sk, int ifindex, const struct in6_addr *addr); + +/* + * Functions provided by ipv6_ffn.c + */ + +enum { + IPV6_FFN_FINISH_OUT, + IPV6_FFN_LOCAL_IN, +}; + +extern void ipv6_ffn_init(void); +extern int ipv6_ffn_process(struct sk_buff *skb); +extern void ipv6_ffn_add(struct sk_buff *skb, int when); +extern void ipv6_ffn_flush_all(void); + #endif /* _NET_IPV6_H */ diff -ruw linux-5.4.60/include/net/mac80211.h linux-5.4.60-fbx/include/net/mac80211.h --- linux-5.4.60/include/net/mac80211.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/mac80211.h 2021-03-04 13:21:01.084172370 +0100 @@ -2337,6 +2337,8 @@ IEEE80211_HW_SUPPORTS_ONLY_HE_MULTI_BSSID, IEEE80211_HW_AMPDU_KEYBORDER_SUPPORT, + IEEE80211_HW_APVLAN_NEED_MCAST_TO_UCAST, + /* keep last, obviously */ NUM_IEEE80211_HW_FLAGS }; @@ -3759,6 +3761,8 @@ struct sk_buff *skb); int (*start)(struct ieee80211_hw *hw); void (*stop)(struct ieee80211_hw *hw); + int (*set_powered)(struct ieee80211_hw *hw); + int (*get_powered)(struct ieee80211_hw *hw, bool *up, bool *busy); #ifdef CONFIG_PM int (*suspend)(struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan); int (*resume)(struct ieee80211_hw *hw); @@ -5816,6 +5820,13 @@ void ieee80211_send_bar(struct ieee80211_vif *vif, u8 *ra, u16 tid, u16 ssn); /** + * same as ieee80211_send_bar but for given STA, allow sending to a + * STA on AP_VLAN and get a valid control->sta in the driver + */ +void ieee80211_send_bar_sta(struct ieee80211_sta *pubsta, + u16 tid, u16 ssn); + +/** * ieee80211_manage_rx_ba_offl - helper to queue an RX BA work * @vif: &struct ieee80211_vif pointer from the add_interface callback * @addr: station mac address @@ -6417,4 +6428,10 @@ struct cfg80211_nan_match_params *match, gfp_t gfp); +/** + * force dtim count value on given VIF + */ +void ieee80211_force_dtim(struct ieee80211_vif *vif, + unsigned int dtim_count); + #endif /* MAC80211_H */ diff -ruw linux-5.4.60/include/net/netfilter/nf_conntrack_expect.h linux-5.4.60-fbx/include/net/netfilter/nf_conntrack_expect.h --- linux-5.4.60/include/net/netfilter/nf_conntrack_expect.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/netfilter/nf_conntrack_expect.h 2021-03-04 13:21:01.084172370 +0100 @@ -58,13 +58,24 @@ #endif struct rcu_head rcu; + + /* private expect information. */ + char data[32] __aligned(8); }; +#define NF_CT_EXPECT_BUILD_BUG_ON(structsize) \ + BUILD_BUG_ON((structsize) > FIELD_SIZEOF(struct nf_conntrack_expect, data)) + static inline struct net *nf_ct_exp_net(struct nf_conntrack_expect *exp) { return nf_ct_net(exp->master); } +static inline void *nf_ct_exp_data(struct nf_conntrack_expect *exp) +{ + return (void *)exp->data; +} + #define NF_CT_EXP_POLICY_NAME_LEN 16 struct nf_conntrack_expect_policy { diff -ruw linux-5.4.60/include/net/netfilter/nf_conntrack.h linux-5.4.60-fbx/include/net/netfilter/nf_conntrack.h --- linux-5.4.60/include/net/netfilter/nf_conntrack.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/netfilter/nf_conntrack.h 2021-03-04 13:21:01.084172370 +0100 @@ -100,6 +100,9 @@ u_int32_t secmark; #endif + union nf_conntrack_man_proto nat_src_proto_min; + union nf_conntrack_man_proto nat_src_proto_max; + /* Extensions */ struct nf_ct_ext *ext; diff -ruw linux-5.4.60/include/net/sock.h linux-5.4.60-fbx/include/net/sock.h --- linux-5.4.60/include/net/sock.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/net/sock.h 2021-03-04 13:21:01.090839037 +0100 @@ -174,6 +174,7 @@ unsigned char skc_reuseport:1; unsigned char skc_ipv6only:1; unsigned char skc_net_refcnt:1; + unsigned char skc_reuse_conflict; int skc_bound_dev_if; union { struct hlist_node skc_bind_node; @@ -350,6 +351,7 @@ #define sk_reuseport __sk_common.skc_reuseport #define sk_ipv6only __sk_common.skc_ipv6only #define sk_net_refcnt __sk_common.skc_net_refcnt +#define sk_reuse_conflict __sk_common.skc_reuse_conflict #define sk_bound_dev_if __sk_common.skc_bound_dev_if #define sk_bind_node __sk_common.skc_bind_node #define sk_prot __sk_common.skc_prot @@ -819,6 +821,7 @@ SOCK_TXTIME, SOCK_XDP, /* XDP is attached */ SOCK_TSTAMP_NEW, /* Indicates 64 bit timestamps always */ + SOCK_UDP_DUP_UNICAST, }; #define SK_FLAGS_TIMESTAMP ((1UL << SOCK_TIMESTAMP) | (1UL << SOCK_TIMESTAMPING_RX_SOFTWARE)) diff -ruw linux-5.4.60/include/uapi/asm-generic/socket.h linux-5.4.60-fbx/include/uapi/asm-generic/socket.h --- linux-5.4.60/include/uapi/asm-generic/socket.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/asm-generic/socket.h 2021-03-04 13:21:01.114172371 +0100 @@ -30,9 +30,10 @@ #define SO_PEERCRED 17 #define SO_RCVLOWAT 18 #define SO_SNDLOWAT 19 +#endif + #define SO_RCVTIMEO_OLD 20 #define SO_SNDTIMEO_OLD 21 -#endif /* Security levels - as per NRL IPv6 - don't actually do anything */ #define SO_SECURITY_AUTHENTICATION 22 @@ -119,6 +120,8 @@ #define SO_DETACH_REUSEPORT_BPF 68 +#define SO_UDP_DUP_UNICAST 100 + #if !defined(__KERNEL__) #if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__)) diff -ruw linux-5.4.60/include/uapi/linux/ethtool.h linux-5.4.60-fbx/include/uapi/linux/ethtool.h --- linux-5.4.60/include/uapi/linux/ethtool.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/ethtool.h 2021-03-04 13:21:01.124172371 +0100 @@ -221,6 +221,8 @@ ETHTOOL_RX_COPYBREAK, ETHTOOL_TX_COPYBREAK, ETHTOOL_PFC_PREVENTION_TOUT, /* timeout in msecs */ + ETHTOOL_MAC_MODE, + /* * Add your fresh new tunable attribute above and remember to update * tunable_strings[] in net/core/ethtool.c @@ -1329,6 +1331,69 @@ #define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT) #define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT) +/** + * struct ethtool_epon_param + * @cmd: Command number = %ETHTOOL_GEPON_PARAM or %ETHTOOL_SEPON_* + */ +struct ethtool_epon_param { + __u32 cmd; + __u8 discovery_rx; + __u8 registered; + __u16 llid; + __u32 burst_cap; + __u32 change_count; + __u32 keys_update_id; + __u8 key_sci[8]; + __u8 down_key0[16]; + __u8 down_key1[16]; + __u32 down_encrypt; + __u32 down_last_rx_encrypted; + __u32 down_last_rx_key_id; + __u16 mcast_llid; + __u16 pad; +}; + +/* + * currently a 1:1 mapping for SFP SM in drivers/net/phy/sfp.c + */ +enum { + ETHTOOL_SFP_S_DOWN = 0, + ETHTOOL_SFP_S_INIT, + ETHTOOL_SFP_S_WAIT_LOS, + ETHTOOL_SFP_S_LINK_UP, + ETHTOOL_SFP_S_TX_FAULT, + ETHTOOL_SFP_S_REINIT, + ETHTOOL_SFP_S_TX_DISABLE, +}; + +/** + * struct ethtool_sfp_state + * @cmd: Command number = %ETHTOOL_GSFP_STATE + */ +struct ethtool_sfp_state { + __u32 cmd; + + __u32 fsm_state; + + __u8 o_pwren; + __u8 o_txdis; + __u8 i_presence; + __u8 i_rxlos; + __u8 i_txfault; +}; + +/** + * struct ethtool_shaper_params + * @cmd: %ETHTOOL_GSHAPER_PARAMS / %ETHTOOL_SSHAPER_PARAMS + */ +struct ethtool_shaper_params { + __u32 cmd; + + __u64 rate; + __u32 burst; + __u32 mtu; +}; + /* CMDs currently supported */ #define ETHTOOL_GSET 0x00000001 /* DEPRECATED, Get settings. * Please use ETHTOOL_GLINKSETTINGS @@ -1424,6 +1489,20 @@ #define ETHTOOL_GFECPARAM 0x00000050 /* Get FEC settings */ #define ETHTOOL_SFECPARAM 0x00000051 /* Set FEC settings */ +#define ETHTOOL_GEPON_PARAM 0x00000052 /* Get EPON params */ +#define ETHTOOL_SEPON_KEYS 0x00000053 /* Set EPON encryption keys */ +#define ETHTOOL_SEPON_ENCRYPT 0x00000054 /* Set EPON encryption keys */ +#define ETHTOOL_SEPON_RESTART 0x00000055 /* restart epon link */ +#define ETHTOOL_SEPON_BURST 0x00000056 /* update burst value */ +#define ETHTOOL_SEPON_ADD_MCLLID 0x00000057 /* add epon llid */ +#define ETHTOOL_SEPON_DEL_MCLLID 0x00000058 /* remove epon llid */ +#define ETHTOOL_SEPON_CLR_MCLLID 0x00000059 /* remove all epon llid */ + +#define ETHTOOL_GSFP_STATE 0x00000060 /* get SFP state (IOs/FSM) */ + +#define ETHTOOL_SSHAPER_PARAMS 0x00000061 /* set HW TX shaper params */ +#define ETHTOOL_GSHAPER_PARAMS 0x00000062 /* get HW TX shaper params */ + /* compatibility with older code */ #define SPARC_ETH_GSET ETHTOOL_GSET #define SPARC_ETH_SSET ETHTOOL_SSET @@ -1508,6 +1587,13 @@ ETHTOOL_LINK_MODE_100baseT1_Full_BIT = 67, ETHTOOL_LINK_MODE_1000baseT1_Full_BIT = 68, + ETHTOOL_LINK_MODE_1000basePX_D_Full_BIT = 69, + ETHTOOL_LINK_MODE_1000basePX_U_Full_BIT = 70, + ETHTOOL_LINK_MODE_10000basePR_D_Full_BIT = 71, + ETHTOOL_LINK_MODE_10000basePR_U_Full_BIT = 72, + ETHTOOL_LINK_MODE_10000_1000basePRX_D_Full_BIT = 73, + ETHTOOL_LINK_MODE_10000_1000basePRX_U_Full_BIT = 74, + /* must be last entry */ __ETHTOOL_LINK_MODE_MASK_NBITS }; diff -ruw linux-5.4.60/include/uapi/linux/if_ether.h linux-5.4.60-fbx/include/uapi/linux/if_ether.h --- linux-5.4.60/include/uapi/linux/if_ether.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/if_ether.h 2021-03-04 13:21:01.127505705 +0100 @@ -116,6 +116,7 @@ #define ETH_P_802_3_MIN 0x0600 /* If the value in the ethernet type is less than this value * then the frame is Ethernet II. Else it is 802.3 */ +#define ETH_P_NMESH_MBH 0xFFFE /* NMESHD beacon eth protocol */ /* * Non DIX types. Won't clash for 1500 types. diff -ruw linux-5.4.60/include/uapi/linux/if_tun.h linux-5.4.60-fbx/include/uapi/linux/if_tun.h --- linux-5.4.60/include/uapi/linux/if_tun.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/if_tun.h 2021-03-04 13:21:01.127505705 +0100 @@ -62,6 +62,32 @@ #define TUNSETCARRIER _IOW('T', 226, int) #define TUNGETDEVNETNS _IO('T', 227) + +struct smalltun_rule { + __u8 proto; + __be16 src_port_start; + __be16 src_port_end; + __be16 dst_port_start; + __be16 dst_port_end; +}; + +struct smalltun_fp { + __be32 inner_src; + __be32 inner_dst; + + __u32 af; + __u8 outer_src[16]; + __u8 outer_dst[16]; + __be16 outer_src_port; + __be16 outer_dst_port; + + struct smalltun_rule rules[8]; + __u32 rule_count; +}; + +#define TUNSMALLTUNSETFP _IOW('T', 228, struct smalltun_fp) +#define TUNSMALLTUNDELFP _IOW('T', 229, struct smalltun_fp) + /* TUNSETIFF ifr flags */ #define IFF_TUN 0x0001 #define IFF_TAP 0x0002 diff -ruw linux-5.4.60/include/uapi/linux/if_tunnel.h linux-5.4.60-fbx/include/uapi/linux/if_tunnel.h --- linux-5.4.60/include/uapi/linux/if_tunnel.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/if_tunnel.h 2021-03-04 13:21:01.127505705 +0100 @@ -77,10 +77,23 @@ IFLA_IPTUN_ENCAP_DPORT, IFLA_IPTUN_COLLECT_METADATA, IFLA_IPTUN_FWMARK, + IFLA_IPTUN_FMRS, __IFLA_IPTUN_MAX, }; #define IFLA_IPTUN_MAX (__IFLA_IPTUN_MAX - 1) +enum { + IFLA_IPTUN_FMR_UNSPEC, + IFLA_IPTUN_FMR_IP6_PREFIX, + IFLA_IPTUN_FMR_IP4_PREFIX, + IFLA_IPTUN_FMR_IP6_PREFIX_LEN, + IFLA_IPTUN_FMR_IP4_PREFIX_LEN, + IFLA_IPTUN_FMR_EA_LEN, + IFLA_IPTUN_FMR_OFFSET, + __IFLA_IPTUN_FMR_MAX, +}; +#define IFLA_IPTUN_FMR_MAX (__IFLA_IPTUN_FMR_MAX - 1) + enum tunnel_encap_types { TUNNEL_ENCAP_NONE, TUNNEL_ENCAP_FOU, diff -ruw linux-5.4.60/include/uapi/linux/libc-compat.h linux-5.4.60-fbx/include/uapi/linux/libc-compat.h --- linux-5.4.60/include/uapi/linux/libc-compat.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/libc-compat.h 2021-03-04 13:21:01.130839039 +0100 @@ -49,11 +49,11 @@ #ifndef _UAPI_LIBC_COMPAT_H #define _UAPI_LIBC_COMPAT_H -/* We have included glibc headers... */ -#if defined(__GLIBC__) +/* We have included libc headers... */ +#if !defined(__KERNEL__) -/* Coordinate with glibc net/if.h header. */ -#if defined(_NET_IF_H) && defined(__USE_MISC) +/* Coordinate with libc net/if.h header. */ +#if defined(_NET_IF_H) && (!defined(__GLIBC__) || defined(__USE_MISC)) /* GLIBC headers included first so don't define anything * that would already be defined. */ @@ -65,9 +65,11 @@ /* Everything up to IFF_DYNAMIC, matches net/if.h until glibc 2.23 */ #define __UAPI_DEF_IF_NET_DEVICE_FLAGS 0 /* For the future if glibc adds IFF_LOWER_UP, IFF_DORMANT and IFF_ECHO */ +#ifndef IFF_ECHO #ifndef __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO #define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 1 #endif /* __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO */ +#endif /* IFF_ECHO */ #else /* _NET_IF_H */ @@ -170,7 +172,7 @@ * or we are being included in the kernel, then define everything * that we need. Check for previous __UAPI_* definitions to give * unsupported C libraries a way to opt out of any kernel definition. */ -#else /* !defined(__GLIBC__) */ +#else /* !defined(__KERNEL__) */ /* Definitions for if.h */ #ifndef __UAPI_DEF_IF_IFCONF @@ -262,6 +264,6 @@ #define __UAPI_DEF_XATTR 1 #endif -#endif /* __GLIBC__ */ +#endif /* __KERNEL__ */ #endif /* _UAPI_LIBC_COMPAT_H */ diff -ruw linux-5.4.60/include/uapi/linux/nl80211.h linux-5.4.60-fbx/include/uapi/linux/nl80211.h --- linux-5.4.60/include/uapi/linux/nl80211.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/nl80211.h 2021-03-04 13:21:01.137505705 +0100 @@ -1324,6 +1324,10 @@ NL80211_CMD_UPDATE_OWE_INFO, NL80211_CMD_PROBE_MESH_LINK, + NL80211_CMD_MESH_PEER_NODE_METRICS, + NL80211_CMD_MESH_PEER_PATH_METRICS, + NL80211_CMD_SET_MPP, + NL80211_CMD_DEL_MPP, /* add new commands above here */ @@ -2834,6 +2838,7 @@ NL80211_ATTR_WIPHY_EDMG_CHANNELS, NL80211_ATTR_WIPHY_EDMG_BW_CONFIG, + NL80211_ATTR_SIGNAL_STRENGTH, /* add attributes here, update the policy in nl80211.c */ @@ -2842,6 +2847,8 @@ NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1 }; +# define NL80211_QBC_UPDATE_NODE_METRICS_IE 1 +# define NL80211_QBC_UPDATE_PATH_METRICS_IE 2 /* source-level API compatibility */ #define NL80211_ATTR_SCAN_GENERATION NL80211_ATTR_GENERATION #define NL80211_ATTR_MESH_PARAMS NL80211_ATTR_MESH_CONFIG diff -ruw linux-5.4.60/include/uapi/linux/serial_core.h linux-5.4.60-fbx/include/uapi/linux/serial_core.h --- linux-5.4.60/include/uapi/linux/serial_core.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/serial_core.h 2021-03-04 13:21:01.140839039 +0100 @@ -293,4 +293,7 @@ /* Freescale Linflex UART */ #define PORT_LINFLEXUART 122 +/* BCM63xx HS */ +#define PORT_BCM63XX_HS 123 + #endif /* _UAPILINUX_SERIAL_CORE_H */ diff -ruw linux-5.4.60/include/uapi/linux/sockios.h linux-5.4.60-fbx/include/uapi/linux/sockios.h --- linux-5.4.60/include/uapi/linux/sockios.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/sockios.h 2021-03-04 13:21:01.140839039 +0100 @@ -153,6 +153,14 @@ #define SIOCSHWTSTAMP 0x89b0 /* set and get config */ #define SIOCGHWTSTAMP 0x89b1 /* get config */ +/* fbxbridge call */ +#define SIOCGFBXBRIDGE 0x89c0 /* fbxbridge support */ +#define SIOCSFBXBRIDGE 0x89c1 /* Set fbxbridge options */ + +/* fbxdiverter call */ +#define SIOCGFBXDIVERT 0x89d0 /* fbxdiverter support */ +#define SIOCSFBXDIVERT 0x89d1 /* Set fbxdiverter options */ + /* Device private ioctl calls */ /* diff -ruw linux-5.4.60/include/uapi/linux/swab.h linux-5.4.60-fbx/include/uapi/linux/swab.h --- linux-5.4.60/include/uapi/linux/swab.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/swab.h 2021-03-04 13:21:01.140839039 +0100 @@ -3,7 +3,7 @@ #define _UAPI_LINUX_SWAB_H #include -#include +#include #include #include diff -ruw linux-5.4.60/include/uapi/linux/tcp.h linux-5.4.60-fbx/include/uapi/linux/tcp.h --- linux-5.4.60/include/uapi/linux/tcp.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/tcp.h 2021-03-04 13:21:01.144172372 +0100 @@ -134,6 +134,8 @@ #define TCP_REPAIR_OFF 0 #define TCP_REPAIR_OFF_NO_WP -1 /* Turn off without window probes */ +#define TCP_LINEAR_RTO 128 /* force use of linear timeouts */ + struct tcp_repair_opt { __u32 opt_code; __u32 opt_val; diff -ruw linux-5.4.60/include/uapi/linux/tty.h linux-5.4.60-fbx/include/uapi/linux/tty.h --- linux-5.4.60/include/uapi/linux/tty.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/include/uapi/linux/tty.h 2021-03-04 13:21:01.144172372 +0100 @@ -38,5 +38,6 @@ #define N_NCI 25 /* NFC NCI UART */ #define N_SPEAKUP 26 /* Speakup communication with synths */ #define N_NULL 27 /* Null ldisc used for error handling */ +#define N_REMOTI 28 /* RemoTI over UART */ #endif /* _UAPI_LINUX_TTY_H */ diff -ruw linux-5.4.60/init/initramfs.c linux-5.4.60-fbx/init/initramfs.c --- linux-5.4.60/init/initramfs.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/init/initramfs.c 2021-03-04 13:21:01.157505706 +0100 @@ -10,6 +10,7 @@ #include #include #include +#include static ssize_t __init xwrite(int fd, const char *p, size_t count) { @@ -621,6 +622,10 @@ { ssize_t written; int fd; +#ifdef CONFIG_FBX_DECRYPT_INITRD + int ret; + extern int fbx_decrypt_initrd(char *start, u32 size); +#endif unpack_to_rootfs(__initramfs_start, __initramfs_size); @@ -630,6 +635,15 @@ if (fd < 0) return; +#ifdef CONFIG_FBX_DECRYPT_INITRD + ret = fbx_decrypt_initrd((char*)initrd_start, + initrd_end - initrd_start); + if (ret) { + printk(KERN_ERR "Decrypt failed: %i\n", ret); + return; + } +#endif + written = xwrite(fd, (char *)initrd_start, initrd_end - initrd_start); if (written != initrd_end - initrd_start) pr_err("/initrd.image: incomplete write (%zd != %ld)\n", diff -ruw linux-5.4.60/init/init_task.c linux-5.4.60-fbx/init/init_task.c --- linux-5.4.60/init/init_task.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/init/init_task.c 2021-03-04 13:21:01.157505706 +0100 @@ -66,6 +66,7 @@ .stack = init_stack, .usage = REFCOUNT_INIT(2), .flags = PF_KTHREAD, + .exec_mode = EXEC_MODE_UNLIMITED, .prio = MAX_PRIO - 20, .static_prio = MAX_PRIO - 20, .normal_prio = MAX_PRIO - 20, diff -ruw linux-5.4.60/init/Kconfig linux-5.4.60-fbx/init/Kconfig --- linux-5.4.60/init/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/init/Kconfig 2021-03-04 13:21:01.157505706 +0100 @@ -74,6 +74,15 @@ Maximum of each of the number of arguments and environment variables passed to init from the kernel command line. + +config CROSS_COMPILE + string "Cross-compiler tool prefix" + help + Same as running 'make CROSS_COMPILE=prefix-' but stored for + default make runs in this kernel build directory. You don't + need to set this unless you want the configured kernel build + directory to select the cross-compiler automatically. + config COMPILE_TEST bool "Compile also drivers which will not load" depends on !UML @@ -671,6 +680,15 @@ 13 => 8 KB for each CPU 12 => 4 KB for each CPU +config FBX_DECRYPT_INITRD + bool "Decrypt initrd at boot" + depends on BLK_DEV_RAM + default n + +config FBX_DECRYPT_INITRD_KEY + string "Decryption key" + depends on FBX_DECRYPT_INITRD + # # Architectures with an unreliable sched_clock() should select this: # diff -ruw linux-5.4.60/init/Makefile linux-5.4.60-fbx/init/Makefile --- linux-5.4.60/init/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/init/Makefile 2021-03-04 13:21:01.157505706 +0100 @@ -15,6 +15,8 @@ obj-y += init_task.o +obj-$(CONFIG_FBX_DECRYPT_INITRD)+= fbx_decrypt_initrd.o rc4.o + mounts-y := do_mounts.o mounts-$(CONFIG_BLK_DEV_RAM) += do_mounts_rd.o mounts-$(CONFIG_BLK_DEV_INITRD) += do_mounts_initrd.o diff -ruw linux-5.4.60/kernel/fork.c linux-5.4.60-fbx/kernel/fork.c --- linux-5.4.60/kernel/fork.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/kernel/fork.c 2021-03-04 13:21:01.280839045 +0100 @@ -944,6 +944,12 @@ #ifdef CONFIG_MEMCG tsk->active_memcg = NULL; #endif + + /* + * inherit parent exec_mode. + */ + tsk->exec_mode = orig->exec_mode; + return tsk; free_stack: diff -ruw linux-5.4.60/kernel/sys.c linux-5.4.60-fbx/kernel/sys.c --- linux-5.4.60/kernel/sys.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/kernel/sys.c 2021-03-04 13:21:01.304172379 +0100 @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -2486,6 +2487,18 @@ return -EINVAL; error = GET_TAGGED_ADDR_CTRL(); break; + case PR_SET_EXEC_MODE: + if (arg2 != EXEC_MODE_UNLIMITED && + arg2 != EXEC_MODE_ONCE && + arg2 != EXEC_MODE_DENIED) + return -EINVAL; + + if (arg2 > current->exec_mode) + return -EPERM; + current->exec_mode = arg2; + return 0; + case PR_GET_EXEC_MODE: + return current->exec_mode; default: error = -EINVAL; break; diff -ruw linux-5.4.60/lib/Kconfig linux-5.4.60-fbx/lib/Kconfig --- linux-5.4.60/lib/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/lib/Kconfig 2021-03-04 13:21:01.320839047 +0100 @@ -635,6 +635,13 @@ config STRING_SELFTEST tristate "Test string functions" +config ARCH_HAS_FBXSERIAL + bool + +config FBXSERIAL + bool "fbxserial" + select CRC32 + endmenu config GENERIC_LIB_ASHLDI3 diff -ruw linux-5.4.60/lib/Makefile linux-5.4.60-fbx/lib/Makefile --- linux-5.4.60/lib/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/lib/Makefile 2021-03-04 13:21:01.320839047 +0100 @@ -290,3 +290,5 @@ obj-$(CONFIG_GENERIC_LIB_CMPDI2) += cmpdi2.o obj-$(CONFIG_GENERIC_LIB_UCMPDI2) += ucmpdi2.o obj-$(CONFIG_OBJAGG) += objagg.o + +obj-$(CONFIG_FBXSERIAL) += fbxserial.o diff -ruw linux-5.4.60/Makefile linux-5.4.60-fbx/Makefile --- linux-5.4.60/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/Makefile 2021-03-30 10:53:09.514257217 +0200 @@ -355,6 +355,8 @@ # CROSS_COMPILE can be set on the command line # make CROSS_COMPILE=ia64-linux- # Alternatively CROSS_COMPILE can be set in the environment. +# A third alternative is to store a setting in .config so that plain +# "make" in the configured kernel build directory always uses that. # Default value for CROSS_COMPILE is not to prefix executables # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile ARCH ?= $(SUBARCH) @@ -387,6 +389,9 @@ KCONFIG_CONFIG ?= .config export KCONFIG_CONFIG +CONFIG_CROSS_COMPILE := $(shell grep ^CONFIG_CROSS_COMPILE= $(KCONFIG_CONFIG) | cut -f 2 -d = | tr -d '"') +CROSS_COMPILE ?= $(CONFIG_CROSS_COMPILE:"%"=%) + # SHELL used by kbuild CONFIG_SHELL := sh @@ -1181,7 +1186,7 @@ quiet_cmd_headers_install = INSTALL $(INSTALL_HDR_PATH)/include cmd_headers_install = \ mkdir -p $(INSTALL_HDR_PATH); \ - rsync -mrl --include='*/' --include='*\.h' --exclude='*' \ + rsync -cmrl --include='*/' --include='*\.h' --exclude='*' \ usr/include $(INSTALL_HDR_PATH) PHONY += headers_install diff -ruw linux-5.4.60/net/8021q/vlan.c linux-5.4.60-fbx/net/8021q/vlan.c --- linux-5.4.60/net/8021q/vlan.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/8021q/vlan.c 2021-03-04 13:21:01.367505716 +0100 @@ -210,7 +210,7 @@ /* Attach a VLAN device to a mac address (ie Ethernet Card). * Returns 0 if the device was created or a negative error code otherwise. */ -static int register_vlan_device(struct net_device *real_dev, u16 vlan_id) +int register_vlan_device(struct net_device *real_dev, u16 vlan_id) { struct net_device *new_dev; struct vlan_dev_priv *vlan; diff -ruw linux-5.4.60/net/8021q/vlan_core.c linux-5.4.60-fbx/net/8021q/vlan_core.c --- linux-5.4.60/net/8021q/vlan_core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/8021q/vlan_core.c 2021-03-04 13:21:01.367505716 +0100 @@ -98,6 +98,12 @@ } EXPORT_SYMBOL(__vlan_find_dev_deep_rcu); +struct net_device *vlan_dev_upper_dev(const struct net_device *dev) +{ + return vlan_dev_priv(dev)->real_dev; +} +EXPORT_SYMBOL(vlan_dev_upper_dev); + struct net_device *vlan_dev_real_dev(const struct net_device *dev) { struct net_device *ret = vlan_dev_priv(dev)->real_dev; diff -ruw linux-5.4.60/net/8021q/vlanproc.c linux-5.4.60-fbx/net/8021q/vlanproc.c --- linux-5.4.60/net/8021q/vlanproc.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/8021q/vlanproc.c 2021-03-04 13:21:01.370839049 +0100 @@ -252,7 +252,7 @@ stats = dev_get_stats(vlandev, &temp); seq_printf(seq, - "%s VID: %d REORDER_HDR: %i dev->priv_flags: %hx\n", + "%s VID: %d REORDER_HDR: %i dev->priv_flags: %llx\n", vlandev->name, vlan->vlan_id, (int)(vlan->flags & 1), vlandev->priv_flags); diff -ruw linux-5.4.60/net/bridge/br_device.c linux-5.4.60-fbx/net/bridge/br_device.c --- linux-5.4.60/net/bridge/br_device.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/bridge/br_device.c 2021-03-04 13:21:01.387505716 +0100 @@ -225,6 +225,7 @@ struct net_bridge *br = netdev_priv(dev); dev->mtu = new_mtu; + br->forced_mtu = new_mtu; /* this flag will be cleared if the MTU was automatically adjusted */ br_opt_toggle(br, BROPT_MTU_SET_BY_USER, true); diff -ruw linux-5.4.60/net/bridge/br_fdb.c linux-5.4.60-fbx/net/bridge/br_fdb.c --- linux-5.4.60/net/bridge/br_fdb.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/bridge/br_fdb.c 2021-03-04 13:21:01.387505716 +0100 @@ -554,28 +554,48 @@ return ret; } -void br_fdb_update(struct net_bridge *br, struct net_bridge_port *source, +bool br_fdb_update_only(struct net_bridge *br, + struct net_bridge_port *source, + const unsigned char *addr) +{ + struct net_bridge_fdb_entry *fdb; + + fdb = br_fdb_find_rcu(br, addr, 0); + if (!fdb) + return false; + + fdb->updated = jiffies; + return true; +} + +int br_fdb_update(struct net_bridge *br, struct net_bridge_port *source, const unsigned char *addr, u16 vid, bool added_by_user) { struct net_bridge_fdb_entry *fdb; bool fdb_modified = false; + int ret = 0; /* some users want to always flood. */ if (hold_time(br) == 0) - return; + return ret; /* ignore packets unless we are using this port */ if (!(source->state == BR_STATE_LEARNING || source->state == BR_STATE_FORWARDING)) - return; + return ret; fdb = fdb_find_rcu(&br->fdb_hash_tbl, addr, vid); if (likely(fdb)) { + + if (likely(fdb->added_by_user)) + return ret; + /* attempt to update an entry for a local interface */ if (unlikely(fdb->is_local)) { if (net_ratelimit()) br_warn(br, "received packet on %s with own address as source address (addr:%pM, vlan:%u)\n", source->dev->name, addr, vid); + ret = -ELOOP; } else { unsigned long now = jiffies; @@ -611,6 +631,7 @@ */ spin_unlock(&br->hash_lock); } + return ret; } static int fdb_to_nud(const struct net_bridge *br, diff -ruw linux-5.4.60/net/bridge/br_forward.c linux-5.4.60-fbx/net/bridge/br_forward.c --- linux-5.4.60/net/bridge/br_forward.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/bridge/br_forward.c 2021-03-04 13:21:01.387505716 +0100 @@ -22,12 +22,28 @@ const struct sk_buff *skb) { struct net_bridge_vlan_group *vg; + const unsigned char *dest; + struct net_bridge_fdb_entry *fdb_dst = NULL; + u16 vid = 0; + int ret = 0; + + dest = skb_mac_header(skb); + + rcu_read_lock(); + if (is_unicast_ether_addr(dest)) { + if (br_vlan_enabled(p->dev)) + br_vlan_get_tag(skb, &vid); + fdb_dst = br_fdb_find_rcu(p->br, dest, vid); + } vg = nbp_vlan_group_rcu(p); - return ((p->flags & BR_HAIRPIN_MODE) || skb->dev != p->dev) && - br_allowed_egress(vg, skb) && p->state == BR_STATE_FORWARDING && + ret = ((p->flags & BR_HAIRPIN_MODE) || skb->dev != p->dev) && + br_allowed_egress(vg, skb) && ((p->state == BR_STATE_FORWARDING) || + ((p->state == BR_STATE_BLOCKING) && fdb_dst && fdb_dst->added_by_user)) && nbp_switchdev_allowed_egress(p, skb) && !br_skb_isolated(p, skb); + rcu_read_unlock(); + return ret; } int br_dev_queue_push_xmit(struct net *net, struct sock *sk, struct sk_buff *skb) diff -ruw linux-5.4.60/net/bridge/br_if.c linux-5.4.60-fbx/net/bridge/br_if.c --- linux-5.4.60/net/bridge/br_if.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/bridge/br_if.c 2021-03-04 13:21:01.387505716 +0100 @@ -490,13 +490,13 @@ static int br_mtu_min(const struct net_bridge *br) { const struct net_bridge_port *p; - int ret_mtu = 0; + int ret_mtu = min_t(unsigned int, br->forced_mtu, ETH_DATA_LEN); list_for_each_entry(p, &br->port_list, list) if (!ret_mtu || ret_mtu > p->dev->mtu) ret_mtu = p->dev->mtu; - return ret_mtu ? ret_mtu : ETH_DATA_LEN; + return ret_mtu; } void br_mtu_auto_adjust(struct net_bridge *br) diff -ruw linux-5.4.60/net/bridge/br_input.c linux-5.4.60-fbx/net/bridge/br_input.c --- linux-5.4.60/net/bridge/br_input.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/bridge/br_input.c 2021-03-04 13:21:01.387505716 +0100 @@ -87,8 +87,10 @@ /* insert into forwarding database after filtering to avoid spoofing */ br = p->br; - if (p->flags & BR_LEARNING) - br_fdb_update(br, p, eth_hdr(skb)->h_source, vid, false); + if (p->flags & BR_LEARNING && + br_fdb_update(br, p, eth_hdr(skb)->h_source, vid, false)) { + goto drop; + } local_rcv = !!(br->dev->flags & IFF_PROMISC); if (is_multicast_ether_addr(eth_hdr(skb)->h_dest)) { @@ -151,7 +153,7 @@ if (dst) { unsigned long now = jiffies; - if (dst->is_local) + if (dst->is_local && !dst->added_by_user) return br_pass_frame_up(skb); if (now != dst->used) @@ -249,6 +251,34 @@ return RX_HANDLER_CONSUMED; } +/* Don't forward packets to originating port or forwarding disabled */ +static inline int br_drop_input_pkt(const struct net_bridge_port *p, + const struct sk_buff *skb) +{ + const unsigned char *dest; + struct net_bridge_fdb_entry *fdb_dst = NULL; + u16 vid = 0; + int ret = 1; + + dest = skb_mac_header(skb); + + if (!is_unicast_ether_addr(dest)) + goto out; + + rcu_read_lock(); + if (br_vlan_enabled(p->dev)) + br_vlan_get_tag(skb, &vid); + + fdb_dst = br_fdb_find_rcu(p->br, dest, vid); + if (fdb_dst) + ret = 0; + + rcu_read_unlock(); + +out: + return ret; +} + /* * Return NULL if skb is handled * note: already called with rcu_read_lock @@ -340,6 +370,10 @@ forward: switch (p->state) { + case BR_STATE_BLOCKING: + if (br_drop_input_pkt(p, skb)) + goto drop; + /* fall through */ case BR_STATE_FORWARDING: case BR_STATE_LEARNING: if (ether_addr_equal(p->br->dev->dev_addr, dest)) diff -ruw linux-5.4.60/net/bridge/br_private.h linux-5.4.60-fbx/net/bridge/br_private.h --- linux-5.4.60/net/bridge/br_private.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/bridge/br_private.h 2021-03-04 13:21:01.387505716 +0100 @@ -417,6 +417,7 @@ int offload_fwd_mark; #endif struct hlist_head fdb_list; + unsigned int forced_mtu; }; struct br_input_skb_cb { @@ -565,7 +566,10 @@ unsigned long off); int br_fdb_insert(struct net_bridge *br, struct net_bridge_port *source, const unsigned char *addr, u16 vid); -void br_fdb_update(struct net_bridge *br, struct net_bridge_port *source, +bool br_fdb_update_only(struct net_bridge *br, + struct net_bridge_port *source, + const unsigned char *addr); +int br_fdb_update(struct net_bridge *br, struct net_bridge_port *source, const unsigned char *addr, u16 vid, bool added_by_user); int br_fdb_delete(struct ndmsg *ndm, struct nlattr *tb[], diff -ruw linux-5.4.60/net/bridge/br_private_stp.h linux-5.4.60-fbx/net/bridge/br_private_stp.h --- linux-5.4.60/net/bridge/br_private_stp.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/bridge/br_private_stp.h 2021-03-04 13:21:01.387505716 +0100 @@ -23,7 +23,7 @@ #define BR_MAX_MAX_AGE (40*HZ) #define BR_MIN_PATH_COST 1 -#define BR_MAX_PATH_COST 65535 +#define BR_MAX_PATH_COST 5000000 struct br_config_bpdu { unsigned int topology_change:1; diff -ruw linux-5.4.60/net/core/dev.c linux-5.4.60-fbx/net/core/dev.c --- linux-5.4.60/net/core/dev.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/core/dev.c 2021-03-04 13:21:01.397505717 +0100 @@ -143,6 +143,7 @@ #include #include #include +#include #include "net-sysfs.h" @@ -151,6 +152,9 @@ /* This should be increased if a protocol with a bigger head is added. */ #define GRO_MAX_HEAD (MAX_HEADER + 128) +int (*nmesh_mbh_bridge_rx)(struct sk_buff *skb) __rcu __read_mostly; +EXPORT_SYMBOL_GPL(nmesh_mbh_bridge_rx); + static DEFINE_SPINLOCK(ptype_lock); static DEFINE_SPINLOCK(offload_lock); struct list_head ptype_base[PTYPE_HASH_SIZE] __read_mostly; @@ -165,6 +169,10 @@ struct netlink_ext_ack *extack); static struct napi_struct *napi_by_id(unsigned int napi_id); +#ifdef CONFIG_NETRXTHREAD +struct krxd gkrxd[CONFIG_NETRXTHREAD_RX_QUEUE]; +#endif + /* * The @dev_base_head list is protected by @dev_base_lock and the rtnl * semaphore. @@ -1095,22 +1103,6 @@ net = dev_net(dev); - /* Some auto-enslaved devices e.g. failover slaves are - * special, as userspace might rename the device after - * the interface had been brought up and running since - * the point kernel initiated auto-enslavement. Allow - * live name change even when these slave devices are - * up and running. - * - * Typically, users of these auto-enslaving devices - * don't actually care about slave name change, as - * they are supposed to operate on master interface - * directly. - */ - if (dev->flags & IFF_UP && - likely(!(dev->priv_flags & IFF_LIVE_RENAME_OK))) - return -EBUSY; - down_write(&devnet_rename_sem); if (strncmp(newname, dev->name, IFNAMSIZ) == 0) { @@ -4429,6 +4421,23 @@ return ret; } +/* Start Freebox added code */ +#if defined(CONFIG_FREEBOX_DIVERTER) || defined(CONFIG_FREEBOX_DIVERTER_MODULE) +int (*fbxdiverter_hook)(struct sk_buff *); + +static int handle_fbxdiverter(struct sk_buff *skb) +{ + /* try_module_get is missing here, so there is a race on + * fbxdiverter module deletion */ + if (!fbxdiverter_hook) + return 0; + return fbxdiverter_hook(skb); +} + +EXPORT_SYMBOL(fbxdiverter_hook); +#endif + + /** * netif_rx - post buffer to the network code * @skb: buffer to post @@ -4711,28 +4720,117 @@ return 0; } +static int __netif_receive_skb_core_end(struct sk_buff **pskb, bool pfmemalloc, + struct packet_type **ppt_prev); + static int __netif_receive_skb_core(struct sk_buff **pskb, bool pfmemalloc, struct packet_type **ppt_prev) { - struct packet_type *ptype, *pt_prev; - rx_handler_func_t *rx_handler; +#ifdef CONFIG_NETRXTHREAD + unsigned int len; + struct krxd *krxd; +#endif struct sk_buff *skb = *pskb; - struct net_device *orig_dev; - bool deliver_exact = false; - int ret = NET_RX_DROP; - __be16 type; net_timestamp_check(!netdev_tstamp_prequeue, skb); trace_netif_receive_skb(skb); - orig_dev = skb->dev; - skb_reset_network_header(skb); if (!skb_transport_header_was_set(skb)) skb_reset_transport_header(skb); skb_reset_mac_len(skb); +#if defined(CONFIG_FREEBOX_DIVERTER) || defined(CONFIG_FREEBOX_DIVERTER_MODULE) + if (handle_fbxdiverter(skb)) + return NET_RX_SUCCESS; +#endif + +#ifndef CONFIG_NETRXTHREAD + return __netif_receive_skb_core_end(pskb, pfmemalloc, ppt_prev); +#else + if (pfmemalloc) + return __netif_receive_skb_core_end(pskb, pfmemalloc, ppt_prev); + + BUILD_BUG_ON(ARRAY_SIZE(gkrxd) < 2); + krxd = &gkrxd[skb->rxthread_prio & 1]; + + /* queue the packet to the rx thread */ + local_bh_disable(); + len = skb_queue_len(&krxd->pkt_queue); + if (len < RXTHREAD_MAX_PKTS) { + __skb_queue_tail(&krxd->pkt_queue, skb); + krxd->stats_pkts++; + if (!len) + wake_up(&krxd->wq); + } else { + krxd->stats_dropped++; + dev_kfree_skb(skb); + } + local_bh_enable(); + return NET_RX_SUCCESS; +#endif +} + +#ifdef CONFIG_NETRXTHREAD +static int krxd_action(void *data) +{ + struct krxd *krxd = (struct krxd *)data; + unsigned int queue = krxd - gkrxd; + struct sk_buff *skb; + + set_user_nice(current, queue > 0 ? -10 : -5); + current->flags |= PF_NOFREEZE; + __set_current_state(TASK_RUNNING); + + local_bh_disable(); + while (1) { + struct packet_type *pt_prev = NULL; + struct net_device *orig_dev; + + skb = skb_dequeue(&krxd->pkt_queue); + if (!skb) { + local_bh_enable(); + wait_event_interruptible(krxd->wq, + skb_queue_len(&krxd->pkt_queue)); + set_current_state(TASK_RUNNING); + local_bh_disable(); + continue; + } + + rcu_read_lock(); + orig_dev = skb->dev; + __netif_receive_skb_core_end(&skb, false, &pt_prev); + if (pt_prev) + INDIRECT_CALL_INET(pt_prev->func, + ipv6_rcv, ip_rcv, skb, + skb->dev, pt_prev, orig_dev); + rcu_read_unlock(); + + /* only schedule when working on lowest prio queue */ + if (queue == 0 && need_resched()) { + local_bh_enable(); + schedule(); + local_bh_disable(); + } + } + return 0; +} +#endif + +static int __netif_receive_skb_core_end(struct sk_buff **pskb, bool pfmemalloc, + struct packet_type **ppt_prev) +{ + struct sk_buff *skb = *pskb; + struct packet_type *ptype, *pt_prev; + rx_handler_func_t *rx_handler; + struct net_device *orig_dev; + bool deliver_exact = false; + int ret = NET_RX_DROP; + __be16 type; + int (*nmesh_mbh_rx)(struct sk_buff *skb); + + orig_dev = skb->dev; pt_prev = NULL; another_round: @@ -4761,6 +4859,13 @@ goto out; } + if ((skb->protocol == cpu_to_be16(ETH_P_NMESH_MBH)) || + unlikely(is_multicast_ether_addr(eth_hdr(skb)->h_dest))) { + nmesh_mbh_rx = rcu_dereference(nmesh_mbh_bridge_rx); + if (nmesh_mbh_rx && nmesh_mbh_rx(skb)) + goto out; + } + if (skb_skip_tc_classify(skb)) goto skip_classify; @@ -4885,7 +4990,9 @@ if (pt_prev) { if (unlikely(skb_orphan_frags_rx(skb, GFP_ATOMIC))) goto drop; - *ppt_prev = pt_prev; + else + ret = INDIRECT_CALL_INET(pt_prev->func, ipv6_rcv, ip_rcv, skb, + skb->dev, pt_prev, orig_dev); } else { drop: if (!deliver_exact) @@ -4916,10 +5023,16 @@ struct packet_type *pt_prev = NULL; int ret; +#ifdef CONFIG_NETRXTHREAD + (void)orig_dev; + ret = __netif_receive_skb_core(&skb, pfmemalloc, &pt_prev); +#else ret = __netif_receive_skb_core(&skb, pfmemalloc, &pt_prev); if (pt_prev) ret = INDIRECT_CALL_INET(pt_prev->func, ipv6_rcv, ip_rcv, skb, skb->dev, pt_prev, orig_dev); +#endif + return ret; } @@ -10236,6 +10349,24 @@ open_softirq(NET_TX_SOFTIRQ, net_tx_action); open_softirq(NET_RX_SOFTIRQ, net_rx_action); +#ifdef CONFIG_NETRXTHREAD + for (i = 0; i < CONFIG_NETRXTHREAD_RX_QUEUE; i++) { + struct krxd *krxd = &gkrxd[i]; + struct task_struct *task; + + skb_queue_head_init(&krxd->pkt_queue); + init_waitqueue_head(&krxd->wq); + task = kthread_create(krxd_action, krxd, "krxthread_%u", i); + if (IS_ERR(task)) { + printk(KERN_ERR "unable to create krxd\n"); + return -ENOMEM; + } + krxd->task = task; + wake_up_process(task); + } +#endif + + rc = cpuhp_setup_state_nocalls(CPUHP_NET_DEV_DEAD, "net/dev:dead", NULL, dev_cpu_dead); WARN_ON(rc < 0); diff -ruw linux-5.4.60/net/core/ethtool.c linux-5.4.60-fbx/net/core/ethtool.c --- linux-5.4.60/net/core/ethtool.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/core/ethtool.c 2021-03-04 13:21:01.400839050 +0100 @@ -126,6 +126,7 @@ [ETHTOOL_RX_COPYBREAK] = "rx-copybreak", [ETHTOOL_TX_COPYBREAK] = "tx-copybreak", [ETHTOOL_PFC_PREVENTION_TOUT] = "pfc-prevention-tout", + [ETHTOOL_MAC_MODE] = "mac-mode", }; static const char @@ -2274,6 +2275,11 @@ tuna->type_id != ETHTOOL_TUNABLE_U16) return -EINVAL; break; + case ETHTOOL_MAC_MODE: + if (tuna->len != sizeof(u32) || + tuna->type_id != ETHTOOL_TUNABLE_U32) + return -EINVAL; + break; default: return -EINVAL; } @@ -2556,6 +2562,87 @@ return dev->ethtool_ops->set_fecparam(dev, &fecparam); } +static int ethtool_get_eponparam(struct net_device *dev, void __user *useraddr) +{ + struct ethtool_epon_param eponparam = { .cmd = ETHTOOL_GEPON_PARAM }; + int rc; + + if (!dev->ethtool_ops->get_epon_param) + return -EOPNOTSUPP; + + rc = dev->ethtool_ops->get_epon_param(dev, &eponparam); + if (rc) + return rc; + + if (copy_to_user(useraddr, &eponparam, sizeof(eponparam))) + return -EFAULT; + return 0; +} + +static int ethtool_set_eponparam(struct net_device *dev, void __user *useraddr) +{ + struct ethtool_epon_param eponparam; + + if (!dev->ethtool_ops->set_epon_param) + return -EOPNOTSUPP; + + if (copy_from_user(&eponparam, useraddr, sizeof(eponparam))) + return -EFAULT; + + return dev->ethtool_ops->set_epon_param(dev, &eponparam); +} + +static int ethtool_get_sfp_state(struct net_device *dev, void __user *useraddr) +{ + struct ethtool_sfp_state sfp_state; + int rc; + + if (!dev->sfp_bus) { + printk("no SFP bus ya twat.\n"); + return -ENODEV; + } + + rc = sfp_get_sfp_state(dev->sfp_bus, &sfp_state); + if (rc) + return rc; + + if (copy_to_user(useraddr, &sfp_state, sizeof (sfp_state))) + return -EFAULT; + return 0; +} + +static int ethtool_get_shaper_params(struct net_device *dev, void __user *uaddr) +{ + struct ethtool_shaper_params sp; + int rc; + + if (!dev->ethtool_ops->get_shaper_param) + return -EOPNOTSUPP; + + memset(&sp, 0, sizeof (sp)); + rc = dev->ethtool_ops->get_shaper_param(dev, &sp); + if (rc) + return rc; + + if (copy_to_user(uaddr, &sp, sizeof (sp))) + return -EFAULT; + + return 0; +} + +static int ethtool_set_shaper_params(struct net_device *dev, void __user *uaddr) +{ + struct ethtool_shaper_params sp; + + if (!dev->ethtool_ops->set_shaper_param) + return -EOPNOTSUPP; + + if (copy_from_user(&sp, uaddr, sizeof (sp))) + return -EFAULT; + + return dev->ethtool_ops->set_shaper_param(dev, &sp); +} + /* The main entry point in this file. Called from net/core/dev_ioctl.c */ int dev_ethtool(struct net *net, struct ifreq *ifr) @@ -2831,6 +2918,27 @@ case ETHTOOL_SFECPARAM: rc = ethtool_set_fecparam(dev, useraddr); break; + case ETHTOOL_GEPON_PARAM: + rc = ethtool_get_eponparam(dev, useraddr); + break; + case ETHTOOL_SEPON_KEYS: + case ETHTOOL_SEPON_ENCRYPT: + case ETHTOOL_SEPON_RESTART: + case ETHTOOL_SEPON_BURST: + case ETHTOOL_SEPON_ADD_MCLLID: + case ETHTOOL_SEPON_DEL_MCLLID: + case ETHTOOL_SEPON_CLR_MCLLID: + rc = ethtool_set_eponparam(dev, useraddr); + break; + case ETHTOOL_GSFP_STATE: + rc = ethtool_get_sfp_state(dev, useraddr); + break; + case ETHTOOL_SSHAPER_PARAMS: + rc = ethtool_set_shaper_params(dev, useraddr); + break; + case ETHTOOL_GSHAPER_PARAMS: + rc = ethtool_get_shaper_params(dev, useraddr); + break; default: rc = -EOPNOTSUPP; } diff -ruw linux-5.4.60/net/core/net-procfs.c linux-5.4.60-fbx/net/core/net-procfs.c --- linux-5.4.60/net/core/net-procfs.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/core/net-procfs.c 2021-03-04 13:21:01.400839050 +0100 @@ -272,6 +272,84 @@ .show = ptype_seq_show, }; +#ifdef CONFIG_NETRXTHREAD +/* + * This is invoked by the /proc filesystem handler to display a device + * in detail. + */ +static void *krxthread_seq_start(struct seq_file *seq, loff_t *pos) +{ + int *queue; + + if (*pos > CONFIG_NETRXTHREAD_RX_QUEUE) + return NULL; + + queue = kmalloc(sizeof(*queue), GFP_KERNEL); + if (!queue) + return NULL; + *queue = ((int)*pos - 1); + + return queue; +} + +static void *krxthread_seq_next(struct seq_file *seq, void *v, loff_t *pos) +{ + int *queue = v; + + if (*pos == CONFIG_NETRXTHREAD_RX_QUEUE) + return NULL; + + ++*queue; + *pos = *queue + 1; + return queue; +} + +static void krxthread_seq_stop(struct seq_file *seq, void *v) +{ + kfree(v); +} + +static void krxthread_seq_printf_stats(struct seq_file *seq, int queue) +{ + seq_printf(seq, "%8u %12u %12u\n", + queue, + gkrxd[queue].stats_pkts, + gkrxd[queue].stats_dropped); +} + +static int krxthread_seq_show(struct seq_file *seq, void *v) +{ + int *queue = v; + + if (*queue == -1) + seq_printf(seq, "%8s %12s %12s\n", + "queue", "packets", "drops"); + else + krxthread_seq_printf_stats(seq, *queue); + return 0; +} + +static const struct seq_operations krxthread_seq_ops = { + .start = krxthread_seq_start, + .next = krxthread_seq_next, + .stop = krxthread_seq_stop, + .show = krxthread_seq_show, +}; + +static int krxthread_seq_open(struct inode *inode, struct file *file) +{ + return seq_open(file, &krxthread_seq_ops); +} + +static const struct file_operations krxthread_seq_fops = { + .owner = THIS_MODULE, + .open = krxthread_seq_open, + .read = seq_read, + .llseek = seq_lseek, + .release = seq_release, +}; +#endif /* KRXTHREAD */ + static int __net_init dev_proc_net_init(struct net *net) { int rc = -ENOMEM; @@ -288,6 +366,11 @@ if (wext_proc_init(net)) goto out_ptype; +#ifdef CONFIG_NETRXTHREAD + if (!proc_create("krxthread", S_IRUGO, net->proc_net, + &krxthread_seq_fops)) + goto out_ptype; +#endif rc = 0; out: return rc; diff -ruw linux-5.4.60/net/core/net-sysfs.c linux-5.4.60-fbx/net/core/net-sysfs.c --- linux-5.4.60/net/core/net-sysfs.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/core/net-sysfs.c 2021-03-04 13:21:01.400839050 +0100 @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -633,7 +634,24 @@ }; #if IS_ENABLED(CONFIG_WIRELESS_EXT) || IS_ENABLED(CONFIG_CFG80211) +static ssize_t show_nl80211_iftype(struct device *dev, + struct device_attribute *attr, char *buf) +{ + const struct net_device *netdev = to_net_dev(dev); + ssize_t ret = 0; + + if (!rtnl_trylock()) + return restart_syscall(); + if (netdev->ieee80211_ptr) + ret = sprintf(buf, "%d\n", netdev->ieee80211_ptr->iftype); + rtnl_unlock(); + + return ret; +} +static DEVICE_ATTR(nl80211_iftype, S_IRUGO, show_nl80211_iftype, NULL); + static struct attribute *wireless_attrs[] = { + &dev_attr_nl80211_iftype.attr, NULL }; diff -ruw linux-5.4.60/net/core/skbuff.c linux-5.4.60-fbx/net/core/skbuff.c --- linux-5.4.60/net/core/skbuff.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/core/skbuff.c 2021-03-04 13:21:01.404172384 +0100 @@ -944,6 +944,10 @@ memcpy(&new->headers_start, &old->headers_start, offsetof(struct sk_buff, headers_end) - offsetof(struct sk_buff, headers_start)); + +#ifdef CONFIG_IP_FFN + new->ffn_state = FFN_STATE_INIT; +#endif CHECK_SKB_FIELD(protocol); CHECK_SKB_FIELD(csum); CHECK_SKB_FIELD(hash); @@ -5128,11 +5132,12 @@ skb->offload_l3_fwd_mark = 0; #endif + skb->mark = 0; + if (!xnet) return; ipvs_reset(skb); - skb->mark = 0; skb->tstamp = 0; } EXPORT_SYMBOL_GPL(skb_scrub_packet); diff -ruw linux-5.4.60/net/core/sock.c linux-5.4.60-fbx/net/core/sock.c --- linux-5.4.60/net/core/sock.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/core/sock.c 2021-03-04 13:21:01.404172384 +0100 @@ -1177,6 +1177,10 @@ ret = sock_setbindtodevice_locked(sk, val); break; + case SO_UDP_DUP_UNICAST: + sock_valbool_flag(sk, SOCK_UDP_DUP_UNICAST, valbool); + break; + default: ret = -ENOPROTOOPT; break; @@ -1510,6 +1514,10 @@ v.val64 = sock_gen_cookie(sk); break; + case SO_UDP_DUP_UNICAST: + v.val = sock_flag(sk, SOCK_UDP_DUP_UNICAST); + break; + case SO_ZEROCOPY: v.val = sock_flag(sk, SOCK_ZEROCOPY); break; diff -ruw linux-5.4.60/net/dsa/Kconfig linux-5.4.60-fbx/net/dsa/Kconfig --- linux-5.4.60/net/dsa/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/dsa/Kconfig 2021-03-04 13:21:01.410839051 +0100 @@ -49,6 +49,10 @@ Broadcom switches which places the tag before the Ethernet header (prepended). +config NET_DSA_TAG_BRCM_FBX + tristate "Tag driver for Broadcom switches using in-frame headers" + select NET_DSA_TAG_BRCM_COMMON + config NET_DSA_TAG_GSWIP tristate "Tag driver for Lantiq / Intel GSWIP switches" help diff -ruw linux-5.4.60/net/ipv4/ipconfig.c linux-5.4.60-fbx/net/ipv4/ipconfig.c --- linux-5.4.60/net/ipv4/ipconfig.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/ipconfig.c 2021-03-04 13:21:01.424172385 +0100 @@ -198,16 +198,62 @@ static struct ic_device *ic_first_dev __initdata; /* List of open device */ static struct ic_device *ic_dev __initdata; /* Selected device */ -static bool __init ic_is_init_dev(struct net_device *dev) +static bool __init ic_is_init_dev(struct net_device *dev, bool partial) { + char *p = NULL; + bool ret; + if (dev->flags & IFF_LOOPBACK) return false; - return user_dev_name[0] ? !strcmp(dev->name, user_dev_name) : + + if (partial) { + p = strchr(user_dev_name, '.'); + if (p) + *p = 0; + } + + ret = false; + if (user_dev_name[0] ? !strcmp(dev->name, user_dev_name) : (!(dev->flags & IFF_LOOPBACK) && (dev->flags & (IFF_POINTOPOINT|IFF_BROADCAST)) && - strncmp(dev->name, "dummy", 5)); + strncmp(dev->name, "dummy", 5))) + ret = true; + if (p) + *p = '.'; + return ret; } +#ifdef CONFIG_VLAN_8021Q +int register_vlan_device(struct net_device *real_dev, u16 vlan_id); + +static void __init prepare_vlan(void) +{ + unsigned short oflags; + struct net_device *dev; + char *p; + u16 vid; + + if (!strchr(user_dev_name, '.')) + return; + + p = strchr(user_dev_name, '.'); + *p = 0; + vid = simple_strtoul(p + 1, NULL, 10); + dev = __dev_get_by_name(&init_net, user_dev_name); + if (!dev) + goto fail; + + oflags = dev->flags; + if (dev_change_flags(dev, oflags | IFF_UP, NULL) < 0) + goto fail; + + register_vlan_device(dev, vid); + +fail: + *p = '.'; +} +#endif + static int __init ic_open_devs(void) { struct ic_device *d, **last; @@ -226,8 +272,13 @@ pr_err("IP-Config: Failed to open %s\n", dev->name); } +#ifdef CONFIG_VLAN_8021Q + /* register vlan device if needed */ + prepare_vlan(); +#endif + for_each_netdev(&init_net, dev) { - if (ic_is_init_dev(dev)) { + if (ic_is_init_dev(dev, false)) { int able = 0; if (dev->mtu >= 364) able |= IC_BOOTP; @@ -276,10 +327,12 @@ int wait, elapsed; for_each_netdev(&init_net, dev) - if (ic_is_init_dev(dev) && netif_carrier_ok(dev)) + if (ic_is_init_dev(dev, false) && netif_carrier_ok(dev)) goto have_carrier; + rtnl_unlock(); msleep(1); + rtnl_lock(); if (time_before(jiffies, next_msg)) continue; @@ -705,8 +758,10 @@ e += len; } if (*vendor_class_identifier) { +#ifdef IPCONFIG_DEBUG pr_info("DHCP: sending class identifier \"%s\"\n", vendor_class_identifier); +#endif *e++ = 60; /* Class-identifier */ len = strlen(vendor_class_identifier); *e++ = len; @@ -1414,7 +1469,7 @@ rtnl_lock(); for_each_netdev(&init_net, dev) { - if (ic_is_init_dev(dev)) { + if (ic_is_init_dev(dev, true)) { found = 1; break; } diff -ruw linux-5.4.60/net/ipv4/ip_input.c linux-5.4.60-fbx/net/ipv4/ip_input.c --- linux-5.4.60/net/ipv4/ip_input.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/ip_input.c 2021-03-04 13:21:01.420839051 +0100 @@ -223,8 +223,12 @@ } } -static int ip_local_deliver_finish(struct net *net, struct sock *sk, struct sk_buff *skb) +int ip_local_deliver_finish(struct net *net, struct sock *sk, struct sk_buff *skb) { +#ifdef CONFIG_IP_FFN + if (skb->ffn_state == FFN_STATE_FORWARDABLE) + ip_ffn_add(skb, IP_FFN_LOCAL_IN); +#endif __skb_pull(skb, skb_network_header_len(skb)); rcu_read_lock(); @@ -520,6 +524,11 @@ if (skb == NULL) return NET_RX_DROP; +#ifdef CONFIG_IP_FFN + if (!ip_ffn_process(skb)) + return NET_RX_SUCCESS; +#endif + return NF_HOOK(NFPROTO_IPV4, NF_INET_PRE_ROUTING, net, NULL, skb, dev, NULL, ip_rcv_finish); diff -ruw linux-5.4.60/net/ipv4/ip_output.c linux-5.4.60-fbx/net/ipv4/ip_output.c --- linux-5.4.60/net/ipv4/ip_output.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/ip_output.c 2021-03-04 13:21:01.420839051 +0100 @@ -218,6 +218,11 @@ return res; } +#ifdef CONFIG_IP_FFN + if (skb->ffn_state == FFN_STATE_FORWARDABLE) + ip_ffn_add(skb, IP_FFN_FINISH_OUT); +#endif + rcu_read_lock_bh(); neigh = ip_neigh_for_gw(rt, skb, &is_v6gw); if (!IS_ERR(neigh)) { @@ -429,6 +434,11 @@ skb->dev = dev; skb->protocol = htons(ETH_P_IP); +#ifdef CONFIG_IP_FFN + if (skb->ffn_state == FFN_STATE_FAST_FORWARDED) + return ip_finish_output(net, sk, skb); +#endif + return NF_HOOK_COND(NFPROTO_IPV4, NF_INET_POST_ROUTING, net, sk, skb, NULL, dev, ip_finish_output, @@ -1733,4 +1743,7 @@ #if defined(CONFIG_IP_MULTICAST) igmp_mc_init(); #endif +#ifdef CONFIG_IP_FFN + ip_ffn_init(); +#endif } diff -ruw linux-5.4.60/net/ipv4/ip_tunnel_core.c linux-5.4.60-fbx/net/ipv4/ip_tunnel_core.c --- linux-5.4.60/net/ipv4/ip_tunnel_core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/ip_tunnel_core.c 2021-03-04 13:21:01.420839051 +0100 @@ -34,6 +34,9 @@ #include #include #include +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) +#include +#endif const struct ip_tunnel_encap_ops __rcu * iptun_encaps[MAX_IPTUN_ENCAP_OPS] __read_mostly; @@ -56,6 +59,11 @@ skb_scrub_packet(skb, xnet); skb_clear_hash_if_not_l4(skb); +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) + if (proto == IPPROTO_IPV6) + nf_ct_set(skb, NULL, IP_CT_UNTRACKED); +#endif + skb_dst_set(skb, &rt->dst); memset(IPCB(skb), 0, sizeof(*IPCB(skb))); diff -ruw linux-5.4.60/net/ipv4/Makefile linux-5.4.60-fbx/net/ipv4/Makefile --- linux-5.4.60/net/ipv4/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/Makefile 2021-03-04 13:21:01.417505717 +0100 @@ -20,6 +20,8 @@ obj-$(CONFIG_NET_IP_TUNNEL) += ip_tunnel.o obj-$(CONFIG_SYSCTL) += sysctl_net_ipv4.o + +obj-$(CONFIG_IP_FFN) += ip_ffn.o obj-$(CONFIG_PROC_FS) += proc.o obj-$(CONFIG_IP_MULTIPLE_TABLES) += fib_rules.o obj-$(CONFIG_IP_MROUTE) += ipmr.o diff -ruw linux-5.4.60/net/ipv4/netfilter/ip_tables.c linux-5.4.60-fbx/net/ipv4/netfilter/ip_tables.c --- linux-5.4.60/net/ipv4/netfilter/ip_tables.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/netfilter/ip_tables.c 2021-03-04 13:21:01.424172385 +0100 @@ -1102,6 +1102,8 @@ return ret; } +extern void fbxbr_flush_cache(void); + static int do_replace(struct net *net, const void __user *user, unsigned int len) { @@ -1141,6 +1143,15 @@ tmp.num_counters, tmp.counters); if (ret) goto free_newinfo_untrans; + +#ifdef CONFIG_IP_FFN + ip_ffn_flush_all(); +#endif + +#ifdef CONFIG_FBXBRIDGE + fbxbr_flush_cache(); +#endif + return 0; free_newinfo_untrans: diff -ruw linux-5.4.60/net/ipv4/netfilter/Kconfig linux-5.4.60-fbx/net/ipv4/netfilter/Kconfig --- linux-5.4.60/net/ipv4/netfilter/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/netfilter/Kconfig 2021-03-04 13:21:01.424172385 +0100 @@ -6,6 +6,13 @@ menu "IP: Netfilter Configuration" depends on INET && NETFILTER +config IP_FFN + bool "IP: Fast forwarding and NAT" + +config IP_FFN_PROCFS + bool "IP: Fast forwarding and NAT /proc/net entries" + depends on IP_FFN + config NF_DEFRAG_IPV4 tristate default n diff -ruw linux-5.4.60/net/ipv4/tcp.c linux-5.4.60-fbx/net/ipv4/tcp.c --- linux-5.4.60/net/ipv4/tcp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/tcp.c 2021-03-04 13:21:01.427505718 +0100 @@ -2924,6 +2924,13 @@ err = -EINVAL; break; + case TCP_LINEAR_RTO: + if (val < 0 || val > 1) + err = -EINVAL; + else + tp->linear_rto = val; + break; + case TCP_REPAIR: if (!tcp_can_repair_sock(sk)) err = -EPERM; @@ -3549,6 +3556,9 @@ case TCP_THIN_DUPACK: val = 0; break; + case TCP_LINEAR_RTO: + val = tp->linear_rto; + break; case TCP_REPAIR: val = tp->repair; diff -ruw linux-5.4.60/net/ipv4/tcp_timer.c linux-5.4.60-fbx/net/ipv4/tcp_timer.c --- linux-5.4.60/net/ipv4/tcp_timer.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/tcp_timer.c 2021-03-04 13:21:01.430839052 +0100 @@ -556,6 +556,10 @@ icsk->icsk_retransmits <= TCP_THIN_LINEAR_RETRIES) { icsk->icsk_backoff = 0; icsk->icsk_rto = min(__tcp_set_rto(tp), TCP_RTO_MAX); + + } else if (sk->sk_state == TCP_ESTABLISHED && tp->linear_rto) { + icsk->icsk_backoff = 0; + icsk->icsk_rto = min(__tcp_set_rto(tp), TCP_RTO_MAX); } else { /* Use normal (exponential) backoff */ icsk->icsk_rto = min(icsk->icsk_rto << 1, TCP_RTO_MAX); diff -ruw linux-5.4.60/net/ipv4/udp.c linux-5.4.60-fbx/net/ipv4/udp.c --- linux-5.4.60/net/ipv4/udp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv4/udp.c 2021-03-04 13:21:01.430839052 +0100 @@ -304,6 +304,49 @@ inet_sk(sk)->inet_num = snum; udp_sk(sk)->udp_port_hash = snum; udp_sk(sk)->udp_portaddr_hash ^= snum; + + /* resolve udp reuse conflict */ + if (sk->sk_reuse) { + struct sock *sk2; + bool found; + + found = false; + sk_for_each(sk2, &hslot->head) { + if (!net_eq(sock_net(sk2), net) || + sk2 == sk || + (udp_sk(sk2)->udp_port_hash != snum)) + continue; + + if (sk2->sk_bound_dev_if && + sk->sk_bound_dev_if && + sk2->sk_bound_dev_if != sk->sk_bound_dev_if) + continue; + + if (!inet_rcv_saddr_equal(sk, sk2, true)) + continue; + + found = true; + break; + } + + sk_for_each(sk2, &hslot->head) { + if (!net_eq(sock_net(sk2), net) || + sk2 == sk || + (udp_sk(sk2)->udp_port_hash != snum)) + continue; + + if (sk2->sk_bound_dev_if && + sk->sk_bound_dev_if && + sk2->sk_bound_dev_if != sk->sk_bound_dev_if) + continue; + + if (!inet_rcv_saddr_equal(sk, sk2, true)) + continue; + + sk->sk_reuse_conflict = found; + } + } + if (sk_unhashed(sk)) { if (sk->sk_reuseport && udp_reuseport_add_sock(sk, hslot)) { @@ -2208,6 +2251,90 @@ return 0; } +/* + * Unicast goes to one listener and all sockets with dup flag + * + * Note: called only from the BH handler context. + * + * Note2: it is okay to use the udp_table.hash table only here + * and not udp_table.hash2 table as the sock is always hashed in + * both udp_table.hash and udp_table.hash2. This might impact + * performance if the sock hash bucket hosts more than 10 socks + * but has the benefit of keeping the code simplier. + * + * Note3: __udp_is_mcast_sock() does not have really anything to + * do with multicast, it used there to deliver the packet only to + * the sockets that are bound to the ip:port/interface the skbuff + * is targeted to. + */ +static int __udp4_lib_uc_conflict_deliver(struct net *net, struct sk_buff *skb, + struct udphdr *uh, + __be32 saddr, __be32 daddr, + struct udp_table *udptable, + int proto) +{ + struct sock *sk, *first = NULL; + unsigned short hnum = ntohs(uh->dest); + struct udp_hslot *hslot = udp_hashslot(udptable, net, hnum); + int dif = skb->dev->ifindex; + unsigned int offset = offsetof(typeof(*sk), sk_node); + struct hlist_node *node; + struct sk_buff *nskb; + int sdif = inet_sdif(skb); + bool found_non_dup; + + found_non_dup = false; + sk_for_each_entry_offset_rcu(sk, node, &hslot->head, offset) { + bool need_deliver; + + if (!__udp_is_mcast_sock(net, sk, uh->dest, daddr, + uh->source, saddr, dif, sdif, hnum)) + continue; + + if (sock_flag(sk, SOCK_UDP_DUP_UNICAST)) + need_deliver = true; + else { + if (!found_non_dup) + need_deliver = true; + else + need_deliver = false; + found_non_dup = true; + } + + if (!need_deliver) + continue; + + if (!first) { + first = sk; + continue; + } + nskb = skb_clone(skb, GFP_ATOMIC); + + if (unlikely(!nskb)) { + atomic_inc(&sk->sk_drops); + __UDP_INC_STATS(net, UDP_MIB_RCVBUFERRORS, + IS_UDPLITE(sk)); + __UDP_INC_STATS(net, UDP_MIB_INERRORS, + IS_UDPLITE(sk)); + continue; + } + + if (udp_queue_rcv_skb(sk, nskb) > 0) + consume_skb(nskb); + } + + if (first) { + if (udp_queue_rcv_skb(first, skb) > 0) + consume_skb(skb); + } else { + kfree_skb(skb); + __UDP_INC_STATS(net, UDP_MIB_IGNOREDMULTI, + proto == IPPROTO_UDPLITE); + } + + return 0; +} + /* Initialize UDP checksum. If exited with zero value (success), * CHECKSUM_UNNECESSARY means, that no more checks are required. * Otherwise, csum completion requires checksumming packet body, @@ -2332,9 +2459,15 @@ saddr, daddr, udptable, proto); sk = __udp4_lib_lookup_skb(skb, uh->source, uh->dest, udptable); - if (sk) - return udp_unicast_rcv_skb(sk, skb, uh); + if (sk) { + if (sk->sk_reuse_conflict) + return __udp4_lib_uc_conflict_deliver(net, + skb, uh, + saddr, daddr, + udptable, proto); + return udp_unicast_rcv_skb(sk, skb, uh); + } if (!xfrm4_policy_check(NULL, XFRM_POLICY_IN, skb)) goto drop; nf_reset_ct(skb); diff -ruw linux-5.4.60/net/ipv6/addrconf.c linux-5.4.60-fbx/net/ipv6/addrconf.c --- linux-5.4.60/net/ipv6/addrconf.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/addrconf.c 2021-03-04 13:21:01.434172386 +0100 @@ -2281,12 +2281,27 @@ return 0; } +static int addrconf_ifid_ppp(u8 *eui, struct net_device *dev) +{ + if (is_zero_ether_addr(dev->perm_addr)) + return -1; + + memcpy(eui, dev->perm_addr, 3); + memcpy(eui + 5, dev->perm_addr + 3, 3); + eui[3] = 0xFF; + eui[4] = 0xFE; + eui[0] ^= 2; + return 0; +} + static int ipv6_generate_eui64(u8 *eui, struct net_device *dev) { switch (dev->type) { case ARPHRD_ETHER: case ARPHRD_FDDI: return addrconf_ifid_eui48(eui, dev); + case ARPHRD_PPP: + return addrconf_ifid_ppp(eui, dev); case ARPHRD_ARCNET: return addrconf_ifid_arcnet(eui, dev); case ARPHRD_INFINIBAND: @@ -3340,6 +3355,7 @@ if ((dev->type != ARPHRD_ETHER) && (dev->type != ARPHRD_FDDI) && + (dev->type != ARPHRD_PPP) && (dev->type != ARPHRD_ARCNET) && (dev->type != ARPHRD_INFINIBAND) && (dev->type != ARPHRD_IEEE1394) && diff -ruw linux-5.4.60/net/ipv6/af_inet6.c linux-5.4.60-fbx/net/ipv6/af_inet6.c --- linux-5.4.60/net/ipv6/af_inet6.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/af_inet6.c 2021-03-04 13:21:01.434172386 +0100 @@ -1086,6 +1086,10 @@ if (err) goto udpv6_fail; +#ifdef CONFIG_IPV6_FFN + ipv6_ffn_init(); +#endif + err = udplitev6_init(); if (err) goto udplitev6_fail; diff -ruw linux-5.4.60/net/ipv6/ip6_input.c linux-5.4.60-fbx/net/ipv6/ip6_input.c --- linux-5.4.60/net/ipv6/ip6_input.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/ip6_input.c 2021-03-04 13:21:01.437505718 +0100 @@ -281,6 +281,12 @@ skb = ip6_rcv_core(skb, dev, net); if (skb == NULL) return NET_RX_DROP; + +#ifdef CONFIG_IPV6_FFN + if (!ipv6_ffn_process(skb)) + return NET_RX_SUCCESS; +#endif + return NF_HOOK(NFPROTO_IPV6, NF_INET_PRE_ROUTING, net, NULL, skb, dev, NULL, ip6_rcv_finish); @@ -444,8 +450,13 @@ kfree_skb(skb); } -static int ip6_input_finish(struct net *net, struct sock *sk, struct sk_buff *skb) +int ip6_input_finish(struct net *net, struct sock *sk, struct sk_buff *skb) { +#ifdef CONFIG_IPV6_FFN + if (skb->ffn_state == FFN_STATE_FORWARDABLE) + ipv6_ffn_add(skb, IPV6_FFN_LOCAL_IN); +#endif + rcu_read_lock(); ip6_protocol_deliver_rcu(net, skb, 0, false); rcu_read_unlock(); diff -ruw linux-5.4.60/net/ipv6/ip6_output.c linux-5.4.60-fbx/net/ipv6/ip6_output.c --- linux-5.4.60/net/ipv6/ip6_output.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/ip6_output.c 2021-03-04 13:21:01.437505718 +0100 @@ -51,6 +51,7 @@ #include #include #include +#include #include #include #include @@ -106,6 +107,11 @@ return res; } +#ifdef CONFIG_IPV6_FFN + if (skb->ffn_state == FFN_STATE_FORWARDABLE) + ipv6_ffn_add(skb, IPV6_FFN_FINISH_OUT); +#endif + rcu_read_lock_bh(); nexthop = rt6_nexthop((struct rt6_info *)dst, &ipv6_hdr(skb)->daddr); neigh = __ipv6_neigh_lookup_noref(dst->dev, nexthop); @@ -172,6 +178,11 @@ return 0; } +#ifdef CONFIG_IP_FFN + if (skb->ffn_state == FFN_STATE_FAST_FORWARDED) + return ip6_finish_output(net, sk, skb); +#endif + return NF_HOOK_COND(NFPROTO_IPV6, NF_INET_POST_ROUTING, net, sk, skb, NULL, dev, ip6_finish_output, @@ -565,6 +576,8 @@ hdr->hop_limit--; + skb->priority = rt_tos2priority(ipv6_get_dsfield(hdr)); + return NF_HOOK(NFPROTO_IPV6, NF_INET_FORWARD, net, NULL, skb, skb->dev, dst->dev, ip6_forward_finish); diff -ruw linux-5.4.60/net/ipv6/ip6_tunnel.c linux-5.4.60-fbx/net/ipv6/ip6_tunnel.c --- linux-5.4.60/net/ipv6/ip6_tunnel.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/ip6_tunnel.c 2021-03-04 13:21:01.437505718 +0100 @@ -67,9 +67,9 @@ module_param(log_ecn_error, bool, 0644); MODULE_PARM_DESC(log_ecn_error, "Log packets received with corrupted ECN"); -static u32 HASH(const struct in6_addr *addr1, const struct in6_addr *addr2) +static u32 HASH(const struct in6_addr *addr) { - u32 hash = ipv6_addr_hash(addr1) ^ ipv6_addr_hash(addr2); + u32 hash = ipv6_addr_hash(addr); return hash_32(hash, IP6_TUNNEL_HASH_SIZE_SHIFT); } @@ -136,20 +136,29 @@ static struct ip6_tnl * ip6_tnl_lookup(struct net *net, const struct in6_addr *remote, const struct in6_addr *local) { - unsigned int hash = HASH(remote, local); + unsigned int hash = HASH(local); struct ip6_tnl *t; struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); struct in6_addr any; + struct __ip6_tnl_fmr *fmr; for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { - if (ipv6_addr_equal(local, &t->parms.laddr) && - ipv6_addr_equal(remote, &t->parms.raddr) && - (t->dev->flags & IFF_UP)) + if (!ipv6_addr_equal(local, &t->parms.laddr) || + !(t->dev->flags & IFF_UP)) + continue; + + if (ipv6_addr_equal(remote, &t->parms.raddr)) + return t; + + for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) { + if (ipv6_prefix_equal(remote, &fmr->ip6_prefix, + fmr->ip6_prefix_len)) return t; } + } memset(&any, 0, sizeof(any)); - hash = HASH(&any, local); + hash = HASH(local); for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { if (ipv6_addr_equal(local, &t->parms.laddr) && ipv6_addr_any(&t->parms.raddr) && @@ -157,7 +166,7 @@ return t; } - hash = HASH(remote, &any); + hash = HASH(&any); for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { if (ipv6_addr_equal(remote, &t->parms.raddr) && ipv6_addr_any(&t->parms.laddr) && @@ -197,7 +206,7 @@ if (!ipv6_addr_any(remote) || !ipv6_addr_any(local)) { prio = 1; - h = HASH(remote, local); + h = HASH(local); } return &ip6n->tnls[prio][h]; } @@ -378,6 +387,12 @@ struct net *net = t->net; struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); + while (t->parms.fmrs) { + struct __ip6_tnl_fmr *next = t->parms.fmrs->next; + kfree(t->parms.fmrs); + t->parms.fmrs = next; + } + if (dev == ip6n->fb_tnl_dev) RCU_INIT_POINTER(ip6n->tnls_wc[0], NULL); else @@ -767,6 +782,107 @@ } EXPORT_SYMBOL_GPL(ip6_tnl_rcv_ctl); +/** + * ip4ip6_fmr_calc - calculate target / source IPv6-address based on FMR + * @dest: destination IPv6 address buffer + * @skb: received socket buffer + * @fmr: MAP FMR + * @xmit: Calculate for xmit or rcv + **/ +static void ip4ip6_fmr_calc(struct in6_addr *dest, + const struct iphdr *iph, const uint8_t *end, + const struct __ip6_tnl_fmr *fmr, bool xmit) +{ + int psidlen = fmr->ea_len - (32 - fmr->ip4_prefix_len); + u8 *portp = NULL; + bool use_dest_addr; + const struct iphdr *dsth = iph; + + if ((u8*)dsth >= end) + return; + + /* find significant IP header */ + if (iph->protocol == IPPROTO_ICMP) { + struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4); + if (ih && ((u8*)&ih[1]) <= end && ( + ih->type == ICMP_DEST_UNREACH || + ih->type == ICMP_SOURCE_QUENCH || + ih->type == ICMP_TIME_EXCEEDED || + ih->type == ICMP_PARAMETERPROB || + ih->type == ICMP_REDIRECT)) + dsth = (const struct iphdr*)&ih[1]; + } + + /* in xmit-path use dest port by default and source port only if + this is an ICMP reply to something else; vice versa in rcv-path */ + use_dest_addr = (xmit && dsth == iph) || (!xmit && dsth != iph); + + /* get dst port */ + if (((u8*)&dsth[1]) <= end && ( + dsth->protocol == IPPROTO_UDP || + dsth->protocol == IPPROTO_TCP || + dsth->protocol == IPPROTO_SCTP || + dsth->protocol == IPPROTO_DCCP)) { + /* for UDP, TCP, SCTP and DCCP source and dest port + follow IPv4 header directly */ + portp = ((u8*)dsth) + dsth->ihl * 4; + + if (use_dest_addr) + portp += sizeof(u16); + } else if (iph->protocol == IPPROTO_ICMP) { + struct icmphdr *ih = (struct icmphdr*)(((u8*)dsth) + dsth->ihl * 4); + + /* use icmp identifier as port */ + if (((u8*)&ih) <= end && ( + (use_dest_addr && ( + ih->type == ICMP_ECHOREPLY || + ih->type == ICMP_TIMESTAMPREPLY || + ih->type == ICMP_INFO_REPLY || + ih->type == ICMP_ADDRESSREPLY)) || + (!use_dest_addr && ( + ih->type == ICMP_ECHO || + ih->type == ICMP_TIMESTAMP || + ih->type == ICMP_INFO_REQUEST || + ih->type == ICMP_ADDRESS) + ))) + portp = (u8*)&ih->un.echo.id; + } + + if ((portp && &portp[2] <= end) || psidlen == 0) { + int frombyte = fmr->ip6_prefix_len / 8; + int fromrem = fmr->ip6_prefix_len % 8; + int bytes = sizeof(struct in6_addr) - frombyte; + const u32 *addr = (use_dest_addr) ? &iph->daddr : &iph->saddr; + u64 eabits = ((u64)ntohl(*addr)) << (32 + fmr->ip4_prefix_len); + u64 t = 0; + + /* extract PSID from port and add it to eabits */ + u16 psidbits = 0; + if (psidlen > 0) { + psidbits = ((u16)portp[0]) << 8 | ((u16)portp[1]); + psidbits >>= 16 - psidlen - fmr->offset; + psidbits = (u16)(psidbits << (16 - psidlen)); + eabits |= ((u64)psidbits) << (48 - (fmr->ea_len - psidlen)); + } + + /* rewrite destination address */ + *dest = fmr->ip6_prefix; + memcpy(&dest->s6_addr[10], addr, sizeof(*addr)); + dest->s6_addr16[7] = htons(psidbits >> (16 - psidlen)); + + if (bytes > sizeof(u64)) + bytes = sizeof(u64); + + /* insert eabits */ + memcpy(&t, &dest->s6_addr[frombyte], bytes); + t = be64_to_cpu(t) & ~(((((u64)1) << fmr->ea_len) - 1) + << (64 - fmr->ea_len - fromrem)); + t = cpu_to_be64(t | (eabits >> fromrem)); + memcpy(&dest->s6_addr[frombyte], &t, bytes); + } +} + + static int __ip6_tnl_rcv(struct ip6_tnl *tunnel, struct sk_buff *skb, const struct tnl_ptk_info *tpi, struct metadata_dst *tun_dst, @@ -819,6 +935,27 @@ skb_reset_network_header(skb); memset(skb->cb, 0, sizeof(struct inet6_skb_parm)); + if (tpi->proto == htons(ETH_P_IP) && + !ipv6_addr_equal(&ipv6h->saddr, &tunnel->parms.raddr)) { + /* Packet didn't come from BR, so lookup FMR */ + struct __ip6_tnl_fmr *fmr; + struct in6_addr expected = tunnel->parms.raddr; + for (fmr = tunnel->parms.fmrs; fmr; fmr = fmr->next) + if (ipv6_prefix_equal(&ipv6h->saddr, + &fmr->ip6_prefix, fmr->ip6_prefix_len)) + break; + + /* Check that IPv6 matches IPv4 source to prevent spoofing */ + if (fmr) + ip4ip6_fmr_calc(&expected, ip_hdr(skb), + skb_tail_pointer(skb), fmr, false); + + if (!ipv6_addr_equal(&ipv6h->saddr, &expected)) { + rcu_read_unlock(); + goto drop; + } + } + __skb_tunnel_rx(skb, tunnel->dev, tunnel->net); err = dscp_ecn_decapsulate(tunnel, ipv6h, skb); @@ -951,6 +1088,7 @@ opt->ops.opt_nflen = 8; } + /** * ip6_tnl_addr_conflict - compare packet addresses to tunnel's own * @t: the outgoing tunnel device @@ -1232,6 +1370,7 @@ struct ip6_tnl *t = netdev_priv(dev); const struct iphdr *iph; int encap_limit = -1; + struct __ip6_tnl_fmr *fmr; struct flowi6 fl6; __u8 dsfield; __u32 mtu; @@ -1280,6 +1419,18 @@ fl6.flowi6_uid = sock_net_uid(dev_net(dev), NULL); dsfield = INET_ECN_encapsulate(dsfield, ipv4_get_dsfield(iph)); + /* try to find matching FMR */ + for (fmr = t->parms.fmrs; fmr; fmr = fmr->next) { + unsigned mshift = 32 - fmr->ip4_prefix_len; + if (ntohl(fmr->ip4_prefix.s_addr) >> mshift == + ntohl(ip_hdr(skb)->daddr) >> mshift) + break; + } + + /* change dstaddr according to FMR */ + if (fmr) + ip4ip6_fmr_calc(&fl6.daddr, ip_hdr(skb), skb_tail_pointer(skb), fmr, true); + if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6)) return -1; @@ -1497,6 +1648,14 @@ t->parms.link = p->link; t->parms.proto = p->proto; t->parms.fwmark = p->fwmark; + + while (t->parms.fmrs) { + struct __ip6_tnl_fmr *next = t->parms.fmrs->next; + kfree(t->parms.fmrs); + t->parms.fmrs = next; + } + t->parms.fmrs = p->fmrs; + dst_cache_reset(&t->dst_cache); ip6_tnl_link_config(t); return 0; @@ -1535,6 +1694,7 @@ p->flowinfo = u->flowinfo; p->link = u->link; p->proto = u->proto; + p->fmrs = NULL; memcpy(p->name, u->name, sizeof(u->name)); } @@ -1919,13 +2079,22 @@ return 0; } -static void ip6_tnl_netlink_parms(struct nlattr *data[], +static const struct nla_policy ip6_tnl_fmr_policy[IFLA_IPTUN_FMR_MAX + 1] = { + [IFLA_IPTUN_FMR_IP6_PREFIX] = { .len = sizeof(struct in6_addr) }, + [IFLA_IPTUN_FMR_IP4_PREFIX] = { .len = sizeof(struct in_addr) }, + [IFLA_IPTUN_FMR_IP6_PREFIX_LEN] = { .type = NLA_U8 }, + [IFLA_IPTUN_FMR_IP4_PREFIX_LEN] = { .type = NLA_U8 }, + [IFLA_IPTUN_FMR_EA_LEN] = { .type = NLA_U8 }, + [IFLA_IPTUN_FMR_OFFSET] = { .type = NLA_U8 } +}; + +static int ip6_tnl_netlink_parms(struct nlattr *data[], struct __ip6_tnl_parm *parms) { memset(parms, 0, sizeof(*parms)); if (!data) - return; + return 0; if (data[IFLA_IPTUN_LINK]) parms->link = nla_get_u32(data[IFLA_IPTUN_LINK]); @@ -1956,6 +2125,52 @@ if (data[IFLA_IPTUN_FWMARK]) parms->fwmark = nla_get_u32(data[IFLA_IPTUN_FWMARK]); + + if (data[IFLA_IPTUN_FMRS]) { + unsigned rem; + struct nlattr *fmr; + + nla_for_each_nested(fmr, data[IFLA_IPTUN_FMRS], rem) { + struct nlattr *fmrd[IFLA_IPTUN_FMR_MAX + 1], *c; + struct __ip6_tnl_fmr *nfmr; + int err; + + err = nla_parse_nested_deprecated(fmrd, IFLA_IPTUN_FMR_MAX, + fmr, ip6_tnl_fmr_policy, NULL); + if (err) + return err; + + if (!(nfmr = kzalloc(sizeof(*nfmr), GFP_KERNEL))) + return -ENOMEM; + + nfmr->offset = 6; + + if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX])) + nla_memcpy(&nfmr->ip6_prefix, fmrd[IFLA_IPTUN_FMR_IP6_PREFIX], + sizeof(nfmr->ip6_prefix)); + + if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX])) + nla_memcpy(&nfmr->ip4_prefix, fmrd[IFLA_IPTUN_FMR_IP4_PREFIX], + sizeof(nfmr->ip4_prefix)); + + if ((c = fmrd[IFLA_IPTUN_FMR_IP6_PREFIX_LEN])) + nfmr->ip6_prefix_len = nla_get_u8(c); + + if ((c = fmrd[IFLA_IPTUN_FMR_IP4_PREFIX_LEN])) + nfmr->ip4_prefix_len = nla_get_u8(c); + + if ((c = fmrd[IFLA_IPTUN_FMR_EA_LEN])) + nfmr->ea_len = nla_get_u8(c); + + if ((c = fmrd[IFLA_IPTUN_FMR_OFFSET])) + nfmr->offset = nla_get_u8(c); + + nfmr->next = parms->fmrs; + parms->fmrs = nfmr; + } + } + + return 0; } static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[], @@ -2009,7 +2224,9 @@ return err; } - ip6_tnl_netlink_parms(data, &nt->parms); + err = ip6_tnl_netlink_parms(data, &nt->parms); + if (err) + return err; if (nt->parms.collect_md) { if (rtnl_dereference(ip6n->collect_md_tun)) @@ -2036,6 +2253,7 @@ struct net *net = t->net; struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); struct ip_tunnel_encap ipencap; + int err; if (dev == ip6n->fb_tnl_dev) return -EINVAL; @@ -2046,7 +2264,10 @@ if (err < 0) return err; } - ip6_tnl_netlink_parms(data, &p); + err = ip6_tnl_netlink_parms(data, &p); + if (err) + return err; + if (p.collect_md) return -EINVAL; @@ -2071,6 +2292,12 @@ static size_t ip6_tnl_get_size(const struct net_device *dev) { + const struct ip6_tnl *t = netdev_priv(dev); + struct __ip6_tnl_fmr *c; + int fmrs = 0; + for (c = t->parms.fmrs; c; c = c->next) + ++fmrs; + return /* IFLA_IPTUN_LINK */ nla_total_size(4) + @@ -2100,6 +2327,24 @@ nla_total_size(0) + /* IFLA_IPTUN_FWMARK */ nla_total_size(4) + + /* IFLA_IPTUN_FMRS */ + nla_total_size(0) + + ( + /* nest */ + nla_total_size(0) + + /* IFLA_IPTUN_FMR_IP6_PREFIX */ + nla_total_size(sizeof(struct in6_addr)) + + /* IFLA_IPTUN_FMR_IP4_PREFIX */ + nla_total_size(sizeof(struct in_addr)) + + /* IFLA_IPTUN_FMR_EA_LEN */ + nla_total_size(1) + + /* IFLA_IPTUN_FMR_IP6_PREFIX_LEN */ + nla_total_size(1) + + /* IFLA_IPTUN_FMR_IP4_PREFIX_LEN */ + nla_total_size(1) + + /* IFLA_IPTUN_FMR_OFFSET */ + nla_total_size(1) + ) * fmrs + 0; } @@ -2107,6 +2352,9 @@ { struct ip6_tnl *tunnel = netdev_priv(dev); struct __ip6_tnl_parm *parm = &tunnel->parms; + struct __ip6_tnl_fmr *c; + int fmrcnt = 0; + struct nlattr *fmrs; if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) || nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) || @@ -2116,9 +2364,27 @@ nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) || nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) || nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) || - nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark)) + nla_put_u32(skb, IFLA_IPTUN_FWMARK, parm->fwmark) || + !(fmrs = nla_nest_start_noflag(skb, IFLA_IPTUN_FMRS))) goto nla_put_failure; + for (c = parm->fmrs; c; c = c->next) { + struct nlattr *fmr = nla_nest_start_noflag(skb, ++fmrcnt); + if (!fmr || + nla_put(skb, IFLA_IPTUN_FMR_IP6_PREFIX, + sizeof(c->ip6_prefix), &c->ip6_prefix) || + nla_put(skb, IFLA_IPTUN_FMR_IP4_PREFIX, + sizeof(c->ip4_prefix), &c->ip4_prefix) || + nla_put_u8(skb, IFLA_IPTUN_FMR_IP6_PREFIX_LEN, c->ip6_prefix_len) || + nla_put_u8(skb, IFLA_IPTUN_FMR_IP4_PREFIX_LEN, c->ip4_prefix_len) || + nla_put_u8(skb, IFLA_IPTUN_FMR_EA_LEN, c->ea_len) || + nla_put_u8(skb, IFLA_IPTUN_FMR_OFFSET, c->offset)) + goto nla_put_failure; + + nla_nest_end(skb, fmr); + } + nla_nest_end(skb, fmrs); + if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) || nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) || nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) || @@ -2158,6 +2424,7 @@ [IFLA_IPTUN_ENCAP_DPORT] = { .type = NLA_U16 }, [IFLA_IPTUN_COLLECT_METADATA] = { .type = NLA_FLAG }, [IFLA_IPTUN_FWMARK] = { .type = NLA_U32 }, + [IFLA_IPTUN_FMRS] = { .type = NLA_NESTED }, }; static struct rtnl_link_ops ip6_link_ops __read_mostly = { diff -ruw linux-5.4.60/net/ipv6/Makefile linux-5.4.60-fbx/net/ipv6/Makefile --- linux-5.4.60/net/ipv6/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/Makefile 2021-03-04 13:21:01.434172386 +0100 @@ -15,6 +15,7 @@ ipv6-offload := ip6_offload.o tcpv6_offload.o exthdrs_offload.o ipv6-$(CONFIG_SYSCTL) = sysctl_net_ipv6.o +ipv6-$(CONFIG_IPV6_FFN) += ip6_ffn.o ipv6-$(CONFIG_IPV6_MROUTE) += ip6mr.o ipv6-$(CONFIG_XFRM) += xfrm6_policy.o xfrm6_state.o xfrm6_input.o \ diff -ruw linux-5.4.60/net/ipv6/netfilter/ip6_tables.c linux-5.4.60-fbx/net/ipv6/netfilter/ip6_tables.c --- linux-5.4.60/net/ipv6/netfilter/ip6_tables.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/netfilter/ip6_tables.c 2021-03-04 13:21:01.440839052 +0100 @@ -1158,6 +1158,10 @@ tmp.num_counters, tmp.counters); if (ret) goto free_newinfo_untrans; + +#ifdef CONFIG_IPV6_FFN + ipv6_ffn_flush_all(); +#endif return 0; free_newinfo_untrans: diff -ruw linux-5.4.60/net/ipv6/netfilter/Kconfig linux-5.4.60-fbx/net/ipv6/netfilter/Kconfig --- linux-5.4.60/net/ipv6/netfilter/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/netfilter/Kconfig 2021-03-04 13:21:01.440839052 +0100 @@ -6,6 +6,13 @@ menu "IPv6: Netfilter Configuration" depends on INET && IPV6 && NETFILTER +config IPV6_FFN + bool "IPv6: Fast forwarding and NAT" + +config IPV6_FFN_PROCFS + bool "IPv6: Fast forwarding and NAT /proc/net entries" + depends on IPV6_FFN + config NF_SOCKET_IPV6 tristate "IPv6 socket lookup support" help diff -ruw linux-5.4.60/net/ipv6/udp.c linux-5.4.60-fbx/net/ipv6/udp.c --- linux-5.4.60/net/ipv6/udp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/ipv6/udp.c 2021-03-04 13:21:01.444172385 +0100 @@ -743,6 +743,82 @@ * Note: called only from the BH handler context, * so we don't need to lock the hashes. */ +static int __udp6_lib_uc_conflict_deliver(struct net *net, struct sk_buff *skb, + const struct in6_addr *saddr, const struct in6_addr *daddr, + struct udp_table *udptable, int proto) +{ + struct sock *sk, *first = NULL; + const struct udphdr *uh = udp_hdr(skb); + unsigned short hnum = ntohs(uh->dest); + struct udp_hslot *hslot = udp_hashslot(udptable, net, hnum); + unsigned int offset = offsetof(typeof(*sk), sk_node); + int dif = inet6_iif(skb); + int sdif = inet6_sdif(skb); + struct hlist_node *node; + struct sk_buff *nskb; + bool found_non_dup; + + found_non_dup = false; + sk_for_each_entry_offset_rcu(sk, node, &hslot->head, offset) { + bool need_deliver; + + if (!__udp_v6_is_mcast_sock(net, sk, uh->dest, daddr, + uh->source, saddr, dif, sdif, hnum)) + + continue; + + /* If zero checksum and no_check is not on for + * the socket then skip it. + */ + if (!uh->check && !udp_sk(sk)->no_check6_rx) + continue; + + if (sock_flag(sk, SOCK_UDP_DUP_UNICAST)) + need_deliver = true; + else { + if (!found_non_dup) + need_deliver = true; + else + need_deliver = false; + found_non_dup = true; + } + + if (!need_deliver) + continue; + + if (!first) { + first = sk; + continue; + } + nskb = skb_clone(skb, GFP_ATOMIC); + if (unlikely(!nskb)) { + atomic_inc(&sk->sk_drops); + __UDP6_INC_STATS(net, UDP_MIB_RCVBUFERRORS, + IS_UDPLITE(sk)); + __UDP6_INC_STATS(net, UDP_MIB_INERRORS, + IS_UDPLITE(sk)); + continue; + } + + if (udpv6_queue_rcv_skb(sk, nskb) > 0) + consume_skb(nskb); + } + + if (first) { + if (udpv6_queue_rcv_skb(first, skb) > 0) + consume_skb(skb); + } else { + kfree_skb(skb); + __UDP6_INC_STATS(net, UDP_MIB_IGNOREDMULTI, + proto == IPPROTO_UDPLITE); + } + return 0; +} + +/* + * Note: called only from the BH handler context, + * so we don't need to lock the hashes. + */ static int __udp6_lib_mcast_deliver(struct net *net, struct sk_buff *skb, const struct in6_addr *saddr, const struct in6_addr *daddr, struct udp_table *udptable, int proto) @@ -913,6 +989,12 @@ if (sk) { if (!uh->check && !udp_sk(sk)->no_check6_rx) goto report_csum_error; + + if (sk->sk_reuse_conflict) + return __udp6_lib_uc_conflict_deliver(net, skb, + saddr, daddr, + udptable, proto); + return udp6_unicast_rcv_skb(sk, skb, uh); } diff -ruw linux-5.4.60/net/Kconfig linux-5.4.60-fbx/net/Kconfig --- linux-5.4.60/net/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/Kconfig 2021-03-04 13:21:01.370839049 +0100 @@ -60,6 +60,20 @@ menu "Networking options" +config NETSKBPAD + int "Size reserved by dev_alloc_skb" + default 32 + +config NETRXTHREAD + bool "Do rx network processing in kernel thread" + depends on BROKEN_ON_SMP + +config NETRXTHREAD_RX_QUEUE + int "Number of rx queues" + default 1 + depends on NETRXTHREAD + +source "net/nmesh-mbh/Kconfig" source "net/packet/Kconfig" source "net/unix/Kconfig" source "net/tls/Kconfig" @@ -216,6 +230,8 @@ source "net/tipc/Kconfig" source "net/atm/Kconfig" source "net/l2tp/Kconfig" +source "net/fbxatm/Kconfig" +source "net/fbxbridge/Kconfig" source "net/802/Kconfig" source "net/bridge/Kconfig" source "net/dsa/Kconfig" diff -ruw linux-5.4.60/net/mac80211/agg-tx.c linux-5.4.60-fbx/net/mac80211/agg-tx.c --- linux-5.4.60/net/mac80211/agg-tx.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/agg-tx.c 2021-03-04 13:21:01.447505719 +0100 @@ -139,6 +139,14 @@ } EXPORT_SYMBOL(ieee80211_send_bar); +void ieee80211_send_bar_sta(struct ieee80211_sta *pubsta, + u16 tid, u16 ssn) +{ + struct sta_info *sta = container_of(pubsta, struct sta_info, sta); + ieee80211_send_bar(&sta->sdata->vif, pubsta->addr, tid, ssn); +} +EXPORT_SYMBOL(ieee80211_send_bar_sta); + void ieee80211_assign_tid_tx(struct sta_info *sta, int tid, struct tid_ampdu_tx *tid_tx) { @@ -290,7 +298,6 @@ ieee80211_assign_tid_tx(sta, tid, NULL); ieee80211_agg_splice_finish(sta->sdata, tid); - ieee80211_agg_start_txq(sta, tid, false); kfree_rcu(tid_tx, rcu_head); } @@ -860,6 +867,7 @@ { struct ieee80211_sub_if_data *sdata = sta->sdata; bool send_delba = false; + bool stop_txq = false; ht_dbg(sdata, "Stopping Tx BA session for %pM tid %d\n", sta->sta.addr, tid); @@ -877,9 +885,12 @@ send_delba = true; ieee80211_remove_tid_tx(sta, tid); + stop_txq = true; unlock_sta: spin_unlock_bh(&sta->lock); + if (stop_txq) + ieee80211_agg_start_txq(sta, tid, false); if (send_delba) ieee80211_send_delba(sdata, sta->sta.addr, tid, diff -ruw linux-5.4.60/net/mac80211/cfg.c linux-5.4.60-fbx/net/mac80211/cfg.c --- linux-5.4.60/net/mac80211/cfg.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/cfg.c 2021-03-04 13:21:01.450839053 +0100 @@ -1926,6 +1926,59 @@ return 0; } +static int ieee80211_update_mpp(struct wiphy *wiphy, struct net_device *dev, + const u8 *dst, const u8 *next_hop) +{ + struct ieee80211_sub_if_data *sdata; + int ret = 0; + struct mesh_path *mppath; + + sdata = IEEE80211_DEV_TO_SUB_IF(dev); + + rcu_read_lock(); + + mppath = mpp_path_lookup(sdata, dst); + if (!mppath) { + ret = mpp_path_add(sdata, dst, next_hop); + if (!ret) { + mppath = mpp_path_lookup(sdata, dst); + spin_lock_bh(&mppath->state_lock); + mppath->flags |= MESH_PATH_FIXED; + spin_unlock_bh(&mppath->state_lock); + } + } else { + spin_lock_bh(&mppath->state_lock); + if (!ether_addr_equal(mppath->mpp, next_hop)) + memcpy(mppath->mpp, next_hop, ETH_ALEN); + mppath->exp_time = jiffies; + mppath->flags |= MESH_PATH_FIXED; + spin_unlock_bh(&mppath->state_lock); + } + rcu_read_unlock(); + return ret; +} + +static int ieee80211_delete_mpp(struct wiphy *wiphy, struct net_device *dev, + const u8 *dst) +{ + struct ieee80211_sub_if_data *sdata; + int ret = 0; + struct mesh_path *mppath; + + sdata = IEEE80211_DEV_TO_SUB_IF(dev); + rcu_read_lock(); + mppath = mpp_path_lookup(sdata, dst); + if (mppath) { + spin_lock_bh(&mppath->state_lock); + mppath->flags &= ~MESH_PATH_FIXED; + spin_unlock_bh(&mppath->state_lock); + } else { + ret = -ENOENT; + } + rcu_read_unlock(); + return ret; +} + static int ieee80211_get_mesh_config(struct wiphy *wiphy, struct net_device *dev, struct mesh_config *conf) @@ -2104,6 +2157,36 @@ return 0; } +static int ieee80211_update_mesh_vendor_node_metrics_ie(struct wiphy *wiphy, + struct net_device *dev, + const struct mesh_vendor_ie *vendor_ie) +{ + struct ieee80211_sub_if_data *sdata; + struct ieee80211_if_mesh *ifmsh; + + sdata = IEEE80211_DEV_TO_SUB_IF(dev); + ifmsh = &sdata->u.mesh; + memcpy(ifmsh->node_vendor_ie, vendor_ie->ie, vendor_ie->ie_len); + ifmsh->node_vendor_ie_len = vendor_ie->ie_len; + ieee80211_mbss_info_change_notify(sdata, BSS_CHANGED_BEACON); + return 0; +} + +static int ieee80211_update_mesh_vendor_path_metrics_ie(struct wiphy *wiphy, + struct net_device *dev, + const struct mesh_vendor_ie *vendor_ie) +{ + struct ieee80211_sub_if_data *sdata; + struct ieee80211_if_mesh *ifmsh; + + sdata = IEEE80211_DEV_TO_SUB_IF(dev); + ifmsh = &sdata->u.mesh; + memcpy(ifmsh->mpm_vendor_ie, vendor_ie->ie, vendor_ie->ie_len); + ifmsh->mpm_vendor_ie_len = vendor_ie->ie_len; + ieee80211_mbss_info_change_notify(sdata, BSS_CHANGED_BEACON); + return 0; +} + static int ieee80211_join_mesh(struct wiphy *wiphy, struct net_device *dev, const struct mesh_config *conf, const struct mesh_setup *setup) @@ -2127,8 +2210,10 @@ err = ieee80211_vif_use_channel(sdata, &setup->chandef, IEEE80211_CHANCTX_SHARED); mutex_unlock(&sdata->local->mtx); - if (err) + if (err) { + kfree(ifmsh->ie); return err; + } return ieee80211_start_mesh(sdata); } @@ -3993,10 +4078,14 @@ .dump_mpath = ieee80211_dump_mpath, .get_mpp = ieee80211_get_mpp, .dump_mpp = ieee80211_dump_mpp, + .update_mpp = ieee80211_update_mpp, + .delete_mpp = ieee80211_delete_mpp, .update_mesh_config = ieee80211_update_mesh_config, .get_mesh_config = ieee80211_get_mesh_config, .join_mesh = ieee80211_join_mesh, .leave_mesh = ieee80211_leave_mesh, + .update_mesh_vendor_node_metrics_ie = ieee80211_update_mesh_vendor_node_metrics_ie, + .update_mesh_vendor_path_metrics_ie = ieee80211_update_mesh_vendor_path_metrics_ie, #endif .join_ocb = ieee80211_join_ocb, .leave_ocb = ieee80211_leave_ocb, diff -ruw linux-5.4.60/net/mac80211/driver-ops.c linux-5.4.60-fbx/net/mac80211/driver-ops.c --- linux-5.4.60/net/mac80211/driver-ops.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/driver-ops.c 2021-03-04 13:21:01.450839053 +0100 @@ -49,6 +49,30 @@ local->started = false; } +int drv_get_powered(struct ieee80211_local *local, bool *up, bool *busy) +{ + int ret = -EOPNOTSUPP; + + might_sleep(); + + if (local->ops->get_powered) + ret = local->ops->get_powered(&local->hw, up, busy); + + return ret; +} + +int drv_set_powered(struct ieee80211_local *local) +{ + int ret = -EOPNOTSUPP; + + might_sleep(); + + if (local->ops->set_powered) + ret = local->ops->set_powered(&local->hw); + + return ret; +} + int drv_add_interface(struct ieee80211_local *local, struct ieee80211_sub_if_data *sdata) { diff -ruw linux-5.4.60/net/mac80211/driver-ops.h linux-5.4.60-fbx/net/mac80211/driver-ops.h --- linux-5.4.60/net/mac80211/driver-ops.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/driver-ops.h 2021-03-04 13:21:01.450839053 +0100 @@ -85,6 +85,8 @@ int drv_start(struct ieee80211_local *local); void drv_stop(struct ieee80211_local *local); +int drv_get_powered(struct ieee80211_local *local, bool *up, bool *busy); +int drv_set_powered(struct ieee80211_local *local); #ifdef CONFIG_PM static inline int drv_suspend(struct ieee80211_local *local, diff -ruw linux-5.4.60/net/mac80211/ethtool.c linux-5.4.60-fbx/net/mac80211/ethtool.c --- linux-5.4.60/net/mac80211/ethtool.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/ethtool.c 2021-03-04 13:21:01.450839053 +0100 @@ -46,6 +46,22 @@ }; #define STA_STATS_LEN ARRAY_SIZE(ieee80211_gstrings_sta_stats) +struct ethtool_priv_flags_strings { + const char string[ETH_GSTRING_LEN]; +}; + +enum { + POWERED_SUPPORTED = (1 << 0), + POWERED_STATUS = (1 << 1), + POWERED_CHANGE_BUSY = (1 << 2), +}; + +static const struct ethtool_priv_flags_strings ieee80211_pflags_strings[] = { + { .string = "powered-supported" }, + { .string = "powered-status" }, + { .string = "powered-change-busy", }, +}; + static int ieee80211_get_sset_count(struct net_device *dev, int sset) { struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev); @@ -56,6 +72,9 @@ rv += drv_get_et_sset_count(sdata, sset); + if (sset == ETH_SS_PRIV_FLAGS) + rv += ARRAY_SIZE(ieee80211_pflags_strings); + if (rv == 0) return -EOPNOTSUPP; return rv; @@ -212,6 +231,9 @@ memcpy(data, ieee80211_gstrings_sta_stats, sz_sta_stats); } drv_get_et_strings(sdata, sset, &(data[sz_sta_stats])); + if (sset == ETH_SS_PRIV_FLAGS) + memcpy(data, ieee80211_pflags_strings, + sizeof (ieee80211_pflags_strings)); } static int ieee80211_get_regs_len(struct net_device *dev) @@ -229,6 +251,35 @@ regs->len = 0; } +static u32 ieee80211_get_priv_flags(struct net_device *dev) +{ + struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev); + struct ieee80211_local *local = sdata->local; + bool powered, powered_busy; + u32 ret; + + ret = 0; + if (!drv_get_powered(local, &powered, &powered_busy)) { + ret |= POWERED_SUPPORTED; + if (powered) + ret |= POWERED_STATUS; + if (powered_busy) + ret |= POWERED_CHANGE_BUSY; + } + return ret; +} + +static int ieee80211_set_priv_flags(struct net_device *dev, u32 flags) +{ + struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev); + struct ieee80211_local *local = sdata->local; + + if (flags & (POWERED_STATUS)) + return drv_set_powered(local); + + return 0; +} + const struct ethtool_ops ieee80211_ethtool_ops = { .get_drvinfo = cfg80211_get_drvinfo, .get_regs_len = ieee80211_get_regs_len, @@ -239,4 +290,6 @@ .get_strings = ieee80211_get_strings, .get_ethtool_stats = ieee80211_get_stats, .get_sset_count = ieee80211_get_sset_count, + .set_priv_flags = ieee80211_set_priv_flags, + .get_priv_flags = ieee80211_get_priv_flags, }; diff -ruw linux-5.4.60/net/mac80211/ieee80211_i.h linux-5.4.60-fbx/net/mac80211/ieee80211_i.h --- linux-5.4.60/net/mac80211/ieee80211_i.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/ieee80211_i.h 2021-03-04 13:21:01.450839053 +0100 @@ -721,6 +721,13 @@ struct mesh_table *mpp_paths; /* Store paths for MPP&MAP */ int mesh_paths_generation; int mpp_paths_generation; + + /* Store Vendor specific node metrics IE */ + u8 node_vendor_ie[260]; + u8 node_vendor_ie_len; + /* Store Vendor specific mesh path metrics IE */ + u8 mpm_vendor_ie[260]; + u8 mpm_vendor_ie_len; }; #ifdef CONFIG_MAC80211_MESH @@ -1532,6 +1539,13 @@ bool parse_error; }; +struct ieee802_11_mesh_vendor_specific_elems { + const u8 *ie_start; + u8 ie_len; + /* whether a parse error occurred while retrieving these elements */ + bool parse_error; +}; + static inline struct ieee80211_local *hw_to_local( struct ieee80211_hw *hw) { @@ -1983,6 +1997,9 @@ struct ieee802_11_elems *elems, u64 filter, u32 crc, u8 *transmitter_bssid, u8 *bss_bssid); +u32 ieee802_11_parse_mesh_vendor_elems(const u8 *start, size_t len, bool action, + struct ieee802_11_mesh_vendor_specific_elems *elems, + u64 filter, u32 crc, u8 type); static inline void ieee802_11_parse_elems(const u8 *start, size_t len, bool action, struct ieee802_11_elems *elems, diff -ruw linux-5.4.60/net/mac80211/key.c linux-5.4.60-fbx/net/mac80211/key.c --- linux-5.4.60/net/mac80211/key.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/key.c 2021-03-04 13:21:01.450839053 +0100 @@ -172,6 +172,12 @@ * Hence, don't send GTKs for VLAN interfaces to the driver. */ if (!(key->conf.flags & IEEE80211_KEY_FLAG_PAIRWISE)) { + if (ieee80211_hw_check(&key->local->hw, + APVLAN_NEED_MCAST_TO_UCAST)) { + /* no need to fail, this key will + * never be used */ + return 0; + } ret = 1; goto out_unsupported; } diff -ruw linux-5.4.60/net/mac80211/mesh.c linux-5.4.60-fbx/net/mac80211/mesh.c --- linux-5.4.60/net/mac80211/mesh.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/mesh.c 2021-03-04 13:21:01.450839053 +0100 @@ -338,20 +338,31 @@ u8 offset, len; const u8 *data; - if (!ifmsh->ie || !ifmsh->ie_len) - return 0; /* fast-forward to vendor IEs */ - offset = ieee80211_ie_split_vendor(ifmsh->ie, ifmsh->ie_len, 0); + if (ifmsh->node_vendor_ie_len) { + offset = ieee80211_ie_split_vendor(ifmsh->node_vendor_ie, ifmsh->node_vendor_ie_len, 0); - if (offset < ifmsh->ie_len) { - len = ifmsh->ie_len - offset; - data = ifmsh->ie + offset; + if (offset < ifmsh->node_vendor_ie_len) { + len = ifmsh->node_vendor_ie_len - offset; + data = ifmsh->node_vendor_ie + offset; if (skb_tailroom(skb) < len) return -ENOMEM; skb_put_data(skb, data, len); } + } + if (ifmsh->mpm_vendor_ie_len) { + offset = ieee80211_ie_split_vendor(ifmsh->mpm_vendor_ie, ifmsh->mpm_vendor_ie_len, 0); + + if (offset < ifmsh->mpm_vendor_ie_len) { + len = ifmsh->mpm_vendor_ie_len - offset; + data = ifmsh->mpm_vendor_ie + offset; + if (skb_tailroom(skb) < len) + return -ENOMEM; + skb_put_data(skb, data, len); + } + } return 0; } @@ -766,7 +777,9 @@ 2 + sizeof(struct ieee80211_vht_operation) + ie_len_he_cap + 2 + 1 + sizeof(struct ieee80211_he_operation) + - ifmsh->ie_len; + ifmsh->ie_len + + ifmsh->node_vendor_ie_len + + ifmsh->mpm_vendor_ie_len; bcn = kzalloc(sizeof(*bcn) + head_len + tail_len, GFP_KERNEL); /* need an skb for IE builders to operate on */ @@ -1220,12 +1233,18 @@ size_t baselen; int freq; enum nl80211_band band = rx_status->band; + struct ieee802_11_mesh_vendor_specific_elems velems; + u32 beacon_int; + bool is_neigh_conn_estab; /* ignore ProbeResp to foreign address */ if (stype == IEEE80211_STYPE_PROBE_RESP && !ether_addr_equal(mgmt->da, sdata->vif.addr)) return; + if (stype == IEEE80211_STYPE_BEACON) + beacon_int = mgmt->u.beacon.beacon_int; + baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt; if (baselen > len) return; @@ -1252,6 +1271,37 @@ if (mesh_matches_local(sdata, &elems)) { mpl_dbg(sdata, "rssi_threshold=%d,rx_status->signal=%d\n", sdata->u.mesh.mshcfg.rssi_threshold, rx_status->signal); + is_neigh_conn_estab = mesh_neighbour_connection_established(sdata, mgmt->sa, rx_status); + ieee802_11_parse_mesh_vendor_elems(mgmt->u.probe_resp.variable, + len - baselen, + false, &velems, 0, 0, + NL80211_QBC_UPDATE_NODE_METRICS_IE); + + if (velems.parse_error == false) { + if (is_neigh_conn_estab) + cfg80211_notify_mesh_peer_node_metrics(sdata->dev, mgmt->sa, stype, + rx_status->signal, + beacon_int, + velems.ie_start, + velems.ie_len, + GFP_KERNEL); + elems.total_len -= (velems.ie_len + 2); + } + + ieee802_11_parse_mesh_vendor_elems(mgmt->u.probe_resp.variable, + len - baselen, + false, &velems, 0, 0, + NL80211_QBC_UPDATE_PATH_METRICS_IE); + if (velems.parse_error == false) { + if (is_neigh_conn_estab) + cfg80211_notify_mesh_peer_path_metrics(sdata->dev, mgmt->sa, + velems.ie_start, + velems.ie_len, + GFP_KERNEL); + + elems.total_len -= (velems.ie_len + 2); + } + if (!sdata->u.mesh.user_mpm || sdata->u.mesh.mshcfg.rssi_threshold == 0 || sdata->u.mesh.mshcfg.rssi_threshold < rx_status->signal) @@ -1362,11 +1412,20 @@ bool fwd_csa = true; size_t baselen; u8 *pos; + struct sta_info *sta = NULL; if (mgmt->u.action.u.measurement.action_code != WLAN_ACTION_SPCT_CHL_SWITCH) return; + /* Process action frames received from connected mesh nodes */ + rcu_read_lock(); + sta = sta_info_get(sdata, mgmt->bssid); + if (!sta) { + rcu_read_unlock(); + return; + } + rcu_read_unlock(); pos = mgmt->u.action.u.chan_switch.variable; baselen = offsetof(struct ieee80211_mgmt, u.action.u.chan_switch.variable); diff -ruw linux-5.4.60/net/mac80211/mesh.h linux-5.4.60-fbx/net/mac80211/mesh.h --- linux-5.4.60/net/mac80211/mesh.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/mesh.h 2021-03-04 13:21:01.450839053 +0100 @@ -297,7 +297,9 @@ struct ieee80211_mgmt *mgmt, size_t len, struct ieee80211_rx_status *rx_status); void mesh_sta_cleanup(struct sta_info *sta); - +bool mesh_neighbour_connection_established(struct ieee80211_sub_if_data *sdata, + u8 *hw_addr, + struct ieee80211_rx_status *rx_status); /* Private interfaces */ /* Mesh paths */ int mesh_path_error_tx(struct ieee80211_sub_if_data *sdata, diff -ruw linux-5.4.60/net/mac80211/mesh_plink.c linux-5.4.60-fbx/net/mac80211/mesh_plink.c --- linux-5.4.60/net/mac80211/mesh_plink.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/mesh_plink.c 2021-03-04 13:21:01.454172386 +0100 @@ -1226,3 +1226,32 @@ mgmt->bssid, NULL); mesh_process_plink_frame(sdata, mgmt, &elems, rx_status); } + +/* + * mesh_neighbour_connection_established - return if connection has been established with neighbor. + * + * @sdata: local meshif + * @addr: peer's address + * @elems: IEs from beacon or mesh peering frame + * + * + */ +bool mesh_neighbour_connection_established(struct ieee80211_sub_if_data *sdata, + u8 *hw_addr, + struct ieee80211_rx_status *rx_status) +{ + struct sta_info *sta; + bool ret = false; + + rcu_read_lock(); + sta = sta_info_get(sdata, hw_addr); + if (!sta) + goto out; + + if (sta->mesh->plink_state == NL80211_PLINK_ESTAB) + ret = true; + +out: + rcu_read_unlock(); + return ret; +} diff -ruw linux-5.4.60/net/mac80211/rx.c linux-5.4.60-fbx/net/mac80211/rx.c --- linux-5.4.60/net/mac80211/rx.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/rx.c 2021-03-04 13:21:01.454172386 +0100 @@ -2756,9 +2756,11 @@ mpp_path_add(sdata, proxied_addr, mpp_addr); } else { spin_lock_bh(&mppath->state_lock); - if (!ether_addr_equal(mppath->mpp, mpp_addr)) + if (!ether_addr_equal(mppath->mpp, mpp_addr) && + !(mppath->flags & MESH_PATH_FIXED)) { memcpy(mppath->mpp, mpp_addr, ETH_ALEN); mppath->exp_time = jiffies; + } spin_unlock_bh(&mppath->state_lock); } rcu_read_unlock(); @@ -2823,6 +2825,7 @@ } IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, fwded_frames); + fwd_skb->dev = sdata->dev; ieee80211_add_pending_skb(local, fwd_skb); out: if (is_multicast_ether_addr(hdr->addr1)) @@ -4577,7 +4580,7 @@ * The same happens when we're not even started, * but that's worth a warning. */ - if (WARN_ON(!local->started)) + if (!local->started) goto drop; if (likely(!(status->flag & RX_FLAG_FAILED_PLCP_CRC))) { diff -ruw linux-5.4.60/net/mac80211/sta_info.c linux-5.4.60-fbx/net/mac80211/sta_info.c --- linux-5.4.60/net/mac80211/sta_info.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/sta_info.c 2021-03-04 13:21:01.454172386 +0100 @@ -277,9 +277,10 @@ return; local_bh_disable(); - if (!test_sta_flag(sta, WLAN_STA_PS_STA)) + if (!test_sta_flag(sta, WLAN_STA_PS_STA)) { + if (test_sta_flag(sta, WLAN_STA_PS_DELIVER)) ieee80211_sta_ps_deliver_wakeup(sta); - else if (test_and_clear_sta_flag(sta, WLAN_STA_PSPOLL)) + } else if (test_and_clear_sta_flag(sta, WLAN_STA_PSPOLL)) ieee80211_sta_ps_deliver_poll_response(sta); else if (test_and_clear_sta_flag(sta, WLAN_STA_UAPSD)) ieee80211_sta_ps_deliver_uapsd(sta); diff -ruw linux-5.4.60/net/mac80211/status.c linux-5.4.60-fbx/net/mac80211/status.c --- linux-5.4.60/net/mac80211/status.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/status.c 2021-03-04 13:21:01.457505719 +0100 @@ -876,13 +876,15 @@ struct ieee80211_bar *bar; int shift = 0; int tid = IEEE80211_NUM_TIDS; + bool ack_requested; rates_idx = ieee80211_tx_get_rates(hw, info, &retry_count); + ack_requested = !(info->flags & IEEE80211_TX_CTL_NO_ACK); sband = local->hw.wiphy->bands[info->band]; fc = hdr->frame_control; - if (status->sta) { + if (status->sta && ack_requested) { sta = container_of(status->sta, struct sta_info, sta); shift = ieee80211_vif_get_shift(&sta->sdata->vif); @@ -1101,6 +1103,7 @@ struct ieee80211_supported_band *sband; int retry_count; bool acked, noack_success; + bool ack_requested; if (status->skb) return __ieee80211_tx_status(hw, status); @@ -1112,10 +1115,11 @@ sband = hw->wiphy->bands[info->band]; + ack_requested = !(info->flags & IEEE80211_TX_CTL_NO_ACK); acked = !!(info->flags & IEEE80211_TX_STAT_ACK); noack_success = !!(info->flags & IEEE80211_TX_STAT_NOACK_TRANSMITTED); - if (pubsta) { + if (pubsta && ack_requested) { struct sta_info *sta; sta = container_of(pubsta, struct sta_info, sta); diff -ruw linux-5.4.60/net/mac80211/tx.c linux-5.4.60-fbx/net/mac80211/tx.c --- linux-5.4.60/net/mac80211/tx.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/tx.c 2021-03-04 13:21:01.457505719 +0100 @@ -1256,6 +1256,9 @@ (info->control.flags & IEEE80211_TX_CTRL_PS_RESPONSE)) return NULL; + if (unlikely(ieee80211_is_ctl(hdr->frame_control))) + return NULL; + if (unlikely(!ieee80211_is_data_present(hdr->frame_control))) { if ((!ieee80211_is_mgmt(hdr->frame_control) || ieee80211_is_bufferable_mmpdu(hdr->frame_control) || @@ -3961,6 +3964,9 @@ return false; if (sdata->wdev.use_4addr) return false; + if (ieee80211_hw_check(&sdata->local->hw, + APVLAN_NEED_MCAST_TO_UCAST)) + break; /* fall through */ case NL80211_IFTYPE_AP: /* check runtime toggle for this bss */ diff -ruw linux-5.4.60/net/mac80211/util.c linux-5.4.60-fbx/net/mac80211/util.c --- linux-5.4.60/net/mac80211/util.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/mac80211/util.c 2021-03-04 13:21:01.457505719 +0100 @@ -250,7 +250,8 @@ local_bh_disable(); spin_lock(&fq->lock); - if (sdata->vif.type == NL80211_IFTYPE_AP) + if ((sdata->vif.type == NL80211_IFTYPE_AP) && + ieee80211_sdata_running(sdata)) ps = &sdata->bss->ps; sdata->vif.txqs_stopped[ac] = false; @@ -891,6 +892,63 @@ } EXPORT_SYMBOL(ieee80211_queue_delayed_work); +u32 ieee802_11_parse_mesh_vendor_elems(const u8 *start, size_t len, bool action, + struct ieee802_11_mesh_vendor_specific_elems *elems, + u64 filter, u32 crc, u8 type) +{ + size_t left = len; + const u8 *pos = start; + bool calc_crc = filter != 0; + + memset(elems, 0, sizeof(*elems)); + elems->parse_error = true; + + while (left >= 2) { + u8 id, elen; + + id = *pos++; + elen = *pos++; + left -= 2; + + if (elen > left) { + break; + } + + if (calc_crc && id < 64 && (filter & (1ULL << id))) + crc = crc32_be(crc, pos - 2, elen + 2); + + + switch (id) { + case WLAN_EID_VENDOR_SPECIFIC: + if (elen >= 4 && pos[0] == 0xC0 && pos[1] == 0xFF && + pos[2] == 0xEE && pos[3] == type) { + /* Qubercomm OUI (C0:FF:EE) */ + + if (calc_crc) + crc = crc32_be(crc, pos - 2, elen + 2); + + elems->ie_start = pos; + elems->ie_len = elen; + elems->parse_error = false; + + } + break; + default: + break; + } + + if (elems->parse_error == false) + break; + + left -= elen; + pos += elen; + } + + return crc; + +} +EXPORT_SYMBOL(ieee802_11_parse_mesh_vendor_elems); + static u32 _ieee802_11_parse_elems_crc(const u8 *start, size_t len, bool action, struct ieee802_11_elems *elems, @@ -3808,6 +3866,32 @@ ps->dtim_count = dtim_count; } +void ieee80211_force_dtim(struct ieee80211_vif *vif, + unsigned int dtim_count) +{ + struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif); + u8 dtim_period = sdata->vif.bss_conf.dtim_period; + struct ps_data *ps; + + if (sdata->vif.type == NL80211_IFTYPE_AP || + sdata->vif.type == NL80211_IFTYPE_AP_VLAN) { + if (!sdata->bss) + return; + + ps = &sdata->bss->ps; + } else if (ieee80211_vif_is_mesh(&sdata->vif)) { + ps = &sdata->u.mesh.ps; + } else { + return; + } + + if (WARN_ON_ONCE(dtim_count >= dtim_period)) + return; + + ps->dtim_count = dtim_count; +} +EXPORT_SYMBOL(ieee80211_force_dtim); + static u8 ieee80211_chanctx_radar_detect(struct ieee80211_local *local, struct ieee80211_chanctx *ctx) { diff -ruw linux-5.4.60/net/Makefile linux-5.4.60-fbx/net/Makefile --- linux-5.4.60/net/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/Makefile 2021-03-04 13:21:01.370839049 +0100 @@ -39,6 +39,12 @@ obj-$(CONFIG_STREAM_PARSER) += strparser/ obj-$(CONFIG_ATM) += atm/ obj-$(CONFIG_L2TP) += l2tp/ +ifneq ($(CONFIG_FBXATM),) +obj-y += fbxatm/ +endif +ifneq ($(CONFIG_FBXBRIDGE),) +obj-y += fbxbridge/ +endif obj-$(CONFIG_DECNET) += decnet/ obj-$(CONFIG_PHONET) += phonet/ ifneq ($(CONFIG_VLAN_8021Q),) @@ -87,3 +93,4 @@ obj-$(CONFIG_QRTR) += qrtr/ obj-$(CONFIG_NET_NCSI) += ncsi/ obj-$(CONFIG_XDP_SOCKETS) += xdp/ +obj-$(CONFIG_NET_NMESH_MBH) += nmesh-mbh/ diff -ruw linux-5.4.60/net/netfilter/Kconfig linux-5.4.60-fbx/net/netfilter/Kconfig --- linux-5.4.60/net/netfilter/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/Kconfig 2021-03-04 13:21:01.460839053 +0100 @@ -333,6 +333,7 @@ config NF_CONNTRACK_SIP tristate "SIP protocol support" default m if NETFILTER_ADVANCED=n + select CRYPTO_LIB_SHA256 help SIP is an application-layer control protocol that can establish, modify, and terminate multimedia sessions (conferences) such as diff -ruw linux-5.4.60/net/netfilter/nf_conntrack_core.c linux-5.4.60-fbx/net/netfilter/nf_conntrack_core.c --- linux-5.4.60/net/netfilter/nf_conntrack_core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_conntrack_core.c 2021-03-04 13:21:01.467505720 +0100 @@ -592,6 +592,14 @@ #endif } +#ifdef CONFIG_IP_FFN +extern void ip_ffn_ct_destroy(struct nf_conn *ct); +#endif + +#ifdef CONFIG_IPV6_FFN +extern void ipv6_ffn_ct_destroy(struct nf_conn *ct); +#endif + static void destroy_conntrack(struct nf_conntrack *nfct) { @@ -600,6 +608,15 @@ pr_debug("destroy_conntrack(%p)\n", ct); WARN_ON(atomic_read(&nfct->use) != 0); +#ifdef CONFIG_IP_FFN + if (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.src.l3num == AF_INET) + ip_ffn_ct_destroy(ct); +#endif +#ifdef CONFIG_IPV6_FFN + if (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.src.l3num == AF_INET6) + ipv6_ffn_ct_destroy(ct); +#endif + if (unlikely(nf_ct_is_template(ct))) { nf_ct_tmpl_free(ct); return; diff -ruw linux-5.4.60/net/netfilter/nf_conntrack_ftp.c linux-5.4.60-fbx/net/netfilter/nf_conntrack_ftp.c --- linux-5.4.60/net/netfilter/nf_conntrack_ftp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_conntrack_ftp.c 2021-03-04 13:21:01.467505720 +0100 @@ -27,6 +27,10 @@ #include #define HELPER_NAME "ftp" +#if defined(CONFIG_FREEBOX_BRIDGE) || defined(CONFIG_FREEBOX_BRIDGE_MODULE) +#include +#include +#endif MODULE_LICENSE("GPL"); MODULE_AUTHOR("Rusty Russell "); @@ -398,6 +402,17 @@ return NF_ACCEPT; } +#if defined(CONFIG_FREEBOX_BRIDGE) || defined(CONFIG_FREEBOX_BRIDGE_MODULE) + if (!ct_ftp_info->is_fbxbridge && skb->dev->fbx_bridge) { + struct fbxbridge *fbxbr; + + fbxbr = skb->dev->fbx_bridge; + ct_ftp_info->is_fbxbridge = 1; + ct_ftp_info->fbxbridge_remote = ntohl(fbxbr->br_remote_ipaddr); + ct_ftp_info->fbxbridge_wan = fbxbr->wan_ipaddr; + } +#endif + th = skb_header_pointer(skb, protoff, sizeof(_tcph), &_tcph); if (th == NULL) return NF_ACCEPT; @@ -484,6 +499,50 @@ * Doesn't matter unless NAT is happening. */ daddr = &ct->tuplehash[!dir].tuple.dst.u3; +#if defined(CONFIG_FREEBOX_BRIDGE) || defined(CONFIG_FREEBOX_BRIDGE_MODULE) + if (ct_ftp_info->is_fbxbridge && + search[dir][i].ftptype == NF_CT_FTP_PORT) { + unsigned long orig_ip_addr; + unsigned short orig_port; + char buffer[sizeof("nnn,nnn,nnn,nnn,nnn,nnn")]; + unsigned int len; + __be32 addr; + + /* kludge: if we are here, then this is a local pkt + * that has gone through internal fbxbridge snat. + * + * If we see a port command, then we mangle packet to + * change ip address given to the remote bridge + * address */ + + /* check address is packet is the one fbxbridge + * changed */ + orig_ip_addr = cmd.u3.ip; + if (orig_ip_addr != ct_ftp_info->fbxbridge_wan) + goto donttouch; + + /* now mangle the remote address */ + orig_port = cmd.u.tcp.port; + addr = ct_ftp_info->fbxbridge_remote; + len = sprintf(buffer, "%u,%u,%u,%u,%u,%u", + ((unsigned char *)&addr)[0], + ((unsigned char *)&addr)[1], + ((unsigned char *)&addr)[2], + ((unsigned char *)&addr)[3], + orig_port >> 8 , orig_port & 0xFF); + + nf_nat_mangle_tcp_packet(skb, ct, ctinfo, matchoff, + matchlen, buffer, len); + + /* then adjust as if nothing happened */ + matchlen = len; + cmd.u3.ip = ct_ftp_info->fbxbridge_remote; + } +donttouch: + +#endif + + /* Update the ftp info */ if ((cmd.l3num == nf_ct_l3num(ct)) && memcmp(&cmd.u3.all, &ct->tuplehash[dir].tuple.src.u3.all, diff -ruw linux-5.4.60/net/netfilter/nf_conntrack_helper.c linux-5.4.60-fbx/net/netfilter/nf_conntrack_helper.c --- linux-5.4.60/net/netfilter/nf_conntrack_helper.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_conntrack_helper.c 2021-03-04 13:21:01.467505720 +0100 @@ -35,7 +35,7 @@ EXPORT_SYMBOL_GPL(nf_ct_helper_hsize); static unsigned int nf_ct_helper_count __read_mostly; -static bool nf_ct_auto_assign_helper __read_mostly = false; +static bool nf_ct_auto_assign_helper __read_mostly = true; module_param_named(nf_conntrack_helper, nf_ct_auto_assign_helper, bool, 0644); MODULE_PARM_DESC(nf_conntrack_helper, "Enable automatic conntrack helper assignment (default 0)"); diff -ruw linux-5.4.60/net/netfilter/nf_conntrack_proto_tcp.c linux-5.4.60-fbx/net/netfilter/nf_conntrack_proto_tcp.c --- linux-5.4.60/net/netfilter/nf_conntrack_proto_tcp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_conntrack_proto_tcp.c 2021-03-04 13:21:01.467505720 +0100 @@ -1088,7 +1088,8 @@ break; } - if (!tcp_in_window(ct, &ct->proto.tcp, dir, index, + if (!ct->proto.tcp.no_window_track && + !tcp_in_window(ct, &ct->proto.tcp, dir, index, skb, dataoff, th)) { spin_unlock_bh(&ct->lock); return -NF_ACCEPT; @@ -1163,6 +1164,38 @@ return NF_ACCEPT; } +#ifdef CONFIG_IP_FFN +int external_tcpv4_packet(struct nf_conn *ct, + struct sk_buff *skb, + unsigned int dataoff, + enum ip_conntrack_info ctinfo) +{ + /* fixme: is is always PRE_ROUTING ?*/ + struct nf_hook_state state = { + .hook = NF_INET_PRE_ROUTING, + .pf = AF_INET, + .net = nf_ct_net(ct), + }; + return nf_conntrack_tcp_packet(ct, skb, dataoff, ctinfo, &state); +} +#endif + +#ifdef CONFIG_IPV6_FFN +int external_tcpv6_packet(struct nf_conn *ct, + struct sk_buff *skb, + unsigned int dataoff, + enum ip_conntrack_info ctinfo) +{ + /* fixme: is is always PRE_ROUTING ?*/ + struct nf_hook_state state = { + .hook = NF_INET_PRE_ROUTING, + .pf = AF_INET6, + .net = nf_ct_net(ct), + }; + return nf_conntrack_tcp_packet(ct, skb, dataoff, ctinfo, &state); +} +#endif + static bool tcp_can_early_drop(const struct nf_conn *ct) { switch (ct->proto.tcp.state) { diff -ruw linux-5.4.60/net/netfilter/nf_conntrack_proto_udp.c linux-5.4.60-fbx/net/netfilter/nf_conntrack_proto_udp.c --- linux-5.4.60/net/netfilter/nf_conntrack_proto_udp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_conntrack_proto_udp.c 2021-03-04 13:21:01.467505720 +0100 @@ -122,6 +122,38 @@ return NF_ACCEPT; } +#ifdef CONFIG_IP_FFN +int external_udpv4_packet(struct nf_conn *ct, + struct sk_buff *skb, + unsigned int dataoff, + enum ip_conntrack_info ctinfo) +{ + /* fixme: is is always PRE_ROUTING ?*/ + struct nf_hook_state state = { + .hook = NF_INET_PRE_ROUTING, + .pf = AF_INET, + .net = nf_ct_net(ct), + }; + return nf_conntrack_udp_packet(ct, skb, dataoff, ctinfo, &state); +} +#endif + +#ifdef CONFIG_IPV6_FFN +int external_udpv6_packet(struct nf_conn *ct, + struct sk_buff *skb, + unsigned int dataoff, + enum ip_conntrack_info ctinfo) +{ + /* fixme: is is always PRE_ROUTING ?*/ + struct nf_hook_state state = { + .hook = NF_INET_PRE_ROUTING, + .pf = AF_INET6, + .net = nf_ct_net(ct), + }; + return nf_conntrack_udp_packet(ct, skb, dataoff, ctinfo, &state); +} +#endif + #ifdef CONFIG_NF_CT_PROTO_UDPLITE static void udplite_error_log(const struct sk_buff *skb, const struct nf_hook_state *state, diff -ruw linux-5.4.60/net/netfilter/nf_conntrack_sip.c linux-5.4.60-fbx/net/netfilter/nf_conntrack_sip.c --- linux-5.4.60/net/netfilter/nf_conntrack_sip.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_conntrack_sip.c 2021-03-04 13:21:01.467505720 +0100 @@ -35,6 +35,8 @@ MODULE_ALIAS("ip_conntrack_sip"); MODULE_ALIAS_NFCT_HELPER(HELPER_NAME); +#define MAX_CALLS 8 + #define MAX_PORTS 8 static unsigned short ports[MAX_PORTS]; static unsigned int ports_c; @@ -825,7 +827,8 @@ return found; } -static void flush_expectations(struct nf_conn *ct, bool media) +static void __flush_expectations(struct nf_conn *ct, bool media, + const u8 *cid_hash) { struct nf_conn_help *help = nfct_help(ct); struct nf_conntrack_expect *exp; @@ -835,6 +838,15 @@ hlist_for_each_entry_safe(exp, next, &help->expectations, lnode) { if ((exp->class != SIP_EXPECT_SIGNALLING) ^ media) continue; + if (media && cid_hash) { + const struct nf_ct_sip_expect *exp_sip_info; + exp_sip_info = nf_ct_exp_data(exp); + + if (memcmp(exp_sip_info->cid_hash, cid_hash, + sizeof (exp_sip_info->cid_hash))) + continue; + } + if (!nf_ct_remove_expect(exp)) continue; if (!media) @@ -843,12 +855,36 @@ spin_unlock_bh(&nf_conntrack_expect_lock); } +static void flush_sig_expectations(struct nf_conn *ct) +{ + return __flush_expectations(ct, false, NULL); +} + +static void flush_media_expectations(struct nf_conn *ct, + const char *msg_data, + unsigned int msg_len) +{ + unsigned int matchoff, matchlen; + u8 cid_hash[SHA256_DIGEST_SIZE]; + struct sha256_state s; + + sha256_init(&s); + if (ct_sip_get_header(ct, msg_data, 0, msg_len, + SIP_HDR_CALL_ID, + &matchoff, &matchlen) > 0) + sha256_update(&s, msg_data + matchoff, matchlen); + sha256_final(&s, cid_hash); + + __flush_expectations(ct, true, cid_hash); +} + static int set_expected_rtp_rtcp(struct sk_buff *skb, unsigned int protoff, unsigned int dataoff, const char **dptr, unsigned int *datalen, union nf_inet_addr *daddr, __be16 port, enum sip_expectation_classes class, - unsigned int mediaoff, unsigned int medialen) + unsigned int mediaoff, unsigned int medialen, + const u8 *cid_hash) { struct nf_conntrack_expect *exp, *rtp_exp, *rtcp_exp; enum ip_conntrack_info ctinfo; @@ -861,6 +897,7 @@ u_int16_t base_port; __be16 rtp_port, rtcp_port; const struct nf_nat_sip_hooks *hooks; + struct nf_ct_sip_expect *exp_sip_info; saddr = NULL; if (sip_direct_media) { @@ -953,18 +990,29 @@ goto err1; } - if (skip_expect) + if (skip_expect) { + exp_sip_info = nf_ct_exp_data(exp); + memcpy(exp_sip_info->cid_hash, cid_hash, + sizeof (exp_sip_info->cid_hash)); return NF_ACCEPT; + } rtp_exp = nf_ct_expect_alloc(ct); if (rtp_exp == NULL) goto err1; + exp_sip_info = nf_ct_exp_data(rtp_exp); + memcpy(exp_sip_info->cid_hash, cid_hash, + sizeof (exp_sip_info->cid_hash)); nf_ct_expect_init(rtp_exp, class, nf_ct_l3num(ct), saddr, daddr, IPPROTO_UDP, NULL, &rtp_port); + rtcp_exp = nf_ct_expect_alloc(ct); if (rtcp_exp == NULL) goto err2; + exp_sip_info = nf_ct_exp_data(rtcp_exp); + memcpy(exp_sip_info->cid_hash, cid_hash, + sizeof (exp_sip_info->cid_hash)); nf_ct_expect_init(rtcp_exp, class, nf_ct_l3num(ct), saddr, daddr, IPPROTO_UDP, NULL, &rtcp_port); @@ -1039,10 +1087,20 @@ const struct nf_nat_sip_hooks *hooks; unsigned int port; const struct sdp_media_type *t; + struct sha256_state s; + u8 cid_hash[SHA256_DIGEST_SIZE]; int ret = NF_ACCEPT; hooks = rcu_dereference(nf_nat_sip_hooks); + /* extract caller id if any */ + sha256_init(&s); + if (ct_sip_get_header(ct, *dptr, 0, *datalen, + SIP_HDR_CALL_ID, + &matchoff, &matchlen) > 0) + sha256_update(&s, *dptr + matchoff, matchlen); + sha256_final(&s, cid_hash); + /* Find beginning of session description */ if (ct_sip_get_sdp_header(ct, *dptr, 0, *datalen, SDP_HDR_VERSION, SDP_HDR_UNSPEC, @@ -1101,7 +1159,7 @@ ret = set_expected_rtp_rtcp(skb, protoff, dataoff, dptr, datalen, &rtp_addr, htons(port), t->class, - mediaoff, medialen); + mediaoff, medialen, cid_hash); if (ret != NF_ACCEPT) { nf_ct_helper_log(skb, ct, "cannot add expectation for voice"); @@ -1145,7 +1203,7 @@ (code >= 200 && code <= 299)) return process_sdp(skb, protoff, dataoff, dptr, datalen, cseq); else if (ct_sip_info->invite_cseq == cseq) - flush_expectations(ct, true); + flush_media_expectations(ct, *dptr, *datalen); return NF_ACCEPT; } @@ -1162,7 +1220,7 @@ (code >= 200 && code <= 299)) return process_sdp(skb, protoff, dataoff, dptr, datalen, cseq); else if (ct_sip_info->invite_cseq == cseq) - flush_expectations(ct, true); + flush_media_expectations(ct, *dptr, *datalen); return NF_ACCEPT; } @@ -1179,7 +1237,7 @@ (code >= 200 && code <= 299)) return process_sdp(skb, protoff, dataoff, dptr, datalen, cseq); else if (ct_sip_info->invite_cseq == cseq) - flush_expectations(ct, true); + flush_media_expectations(ct, *dptr, *datalen); return NF_ACCEPT; } @@ -1193,7 +1251,7 @@ struct nf_ct_sip_master *ct_sip_info = nfct_help_data(ct); unsigned int ret; - flush_expectations(ct, true); + flush_media_expectations(ct, *dptr, *datalen); ret = process_sdp(skb, protoff, dataoff, dptr, datalen, cseq); if (ret == NF_ACCEPT) ct_sip_info->invite_cseq = cseq; @@ -1208,7 +1266,7 @@ enum ip_conntrack_info ctinfo; struct nf_conn *ct = nf_ct_get(skb, &ctinfo); - flush_expectations(ct, true); + flush_media_expectations(ct, *dptr, *datalen); return NF_ACCEPT; } @@ -1387,7 +1445,7 @@ } flush: - flush_expectations(ct, false); + flush_sig_expectations(ct); return NF_ACCEPT; } @@ -1642,17 +1700,17 @@ }, [SIP_EXPECT_AUDIO] = { .name = "audio", - .max_expected = 2 * IP_CT_DIR_MAX, + .max_expected = MAX_CALLS * 2 * IP_CT_DIR_MAX, .timeout = 3 * 60, }, [SIP_EXPECT_VIDEO] = { .name = "video", - .max_expected = 2 * IP_CT_DIR_MAX, + .max_expected = MAX_CALLS * 2 * IP_CT_DIR_MAX, .timeout = 3 * 60, }, [SIP_EXPECT_IMAGE] = { .name = "image", - .max_expected = IP_CT_DIR_MAX, + .max_expected = MAX_CALLS * IP_CT_DIR_MAX, .timeout = 3 * 60, }, }; @@ -1667,6 +1725,7 @@ int i, ret; NF_CT_HELPER_BUILD_BUG_ON(sizeof(struct nf_ct_sip_master)); + NF_CT_EXPECT_BUILD_BUG_ON(sizeof(struct nf_ct_sip_expect)); if (ports_c == 0) ports[ports_c++] = SIP_PORT; diff -ruw linux-5.4.60/net/netfilter/nf_nat_core.c linux-5.4.60-fbx/net/netfilter/nf_nat_core.c --- linux-5.4.60/net/netfilter/nf_nat_core.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_nat_core.c 2021-03-04 13:21:01.470839054 +0100 @@ -661,6 +661,11 @@ else ct->status |= IPS_SRC_NAT_DONE; + if (maniptype == NF_NAT_MANIP_SRC) { + ct->nat_src_proto_min = range->min_proto; + ct->nat_src_proto_max = range->max_proto; + } + return NF_ACCEPT; } EXPORT_SYMBOL(nf_nat_setup_info); diff -ruw linux-5.4.60/net/netfilter/nf_nat_ftp.c linux-5.4.60-fbx/net/netfilter/nf_nat_ftp.c --- linux-5.4.60/net/netfilter/nf_nat_ftp.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_nat_ftp.c 2021-03-04 13:21:01.470839054 +0100 @@ -69,7 +69,8 @@ struct nf_conntrack_expect *exp) { union nf_inet_addr newaddr; - u_int16_t port; + u_int16_t port, sport, eport; + unsigned int i; int dir = CTINFO2DIR(ctinfo); struct nf_conn *ct = exp->master; char buffer[sizeof("|1||65535|") + INET6_ADDRSTRLEN]; @@ -86,8 +87,26 @@ * this one. */ exp->expectfn = nf_nat_follow_master; + if (dir == IP_CT_DIR_ORIGINAL && + (ct->status & IPS_SRC_NAT) && + ct->nat_src_proto_min.all && + ct->nat_src_proto_max.all) { + sport = ntohs(ct->nat_src_proto_min.all); + eport = ntohs(ct->nat_src_proto_max.all); + } else { + sport = 1024; + eport = 65535; + } + + port = ntohs(exp->saved_proto.tcp.port); + if (port < sport || port > eport) { + get_random_bytes(&port, sizeof (port)); + port %= eport - sport; + port += sport; + } + /* Try to get same port: if not, try to change it. */ - for (port = ntohs(exp->saved_proto.tcp.port); port != 0; port++) { + for (i = 0; i < eport - sport + 1; i++) { int ret; exp->tuple.dst.u.tcp.port = htons(port); @@ -98,6 +117,10 @@ port = 0; break; } + + port++; + if (port > eport) + port = sport; } if (port == 0) { diff -ruw linux-5.4.60/net/netfilter/nf_nat_helper.c linux-5.4.60-fbx/net/netfilter/nf_nat_helper.c --- linux-5.4.60/net/netfilter/nf_nat_helper.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_nat_helper.c 2021-03-04 13:21:01.470839054 +0100 @@ -188,6 +188,14 @@ range.flags = NF_NAT_RANGE_MAP_IPS; range.min_addr = range.max_addr = ct->master->tuplehash[!exp->dir].tuple.dst.u3; + + if (ct->master->nat_src_proto_min.all && + ct->master->nat_src_proto_max.all) { + range.flags |= NF_NAT_RANGE_PROTO_SPECIFIED; + range.min_proto = ct->master->nat_src_proto_min; + range.max_proto = ct->master->nat_src_proto_max; + } + nf_nat_setup_info(ct, &range, NF_NAT_MANIP_SRC); /* For DST manip, map port here to where it's expected. */ diff -ruw linux-5.4.60/net/netfilter/nf_nat_proto.c linux-5.4.60-fbx/net/netfilter/nf_nat_proto.c --- linux-5.4.60/net/netfilter/nf_nat_proto.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_nat_proto.c 2021-03-04 13:21:01.470839054 +0100 @@ -385,6 +385,8 @@ { #if IS_ENABLED(CONFIG_IPV6) struct ipv6hdr *ipv6h; + const __be32 *to; + __be32 *from; __be16 frag_off; int hdroff; u8 nexthdr; @@ -407,10 +409,24 @@ ipv6h = (void *)skb->data + iphdroff; manip_addr: - if (maniptype == NF_NAT_MANIP_SRC) - ipv6h->saddr = target->src.u3.in6; - else - ipv6h->daddr = target->dst.u3.in6; + if (maniptype == NF_NAT_MANIP_SRC) { + from = ipv6h->saddr.s6_addr32; + to = target->src.u3.in6.s6_addr32; + } else { + from = ipv6h->daddr.s6_addr32; + to = target->dst.u3.in6.s6_addr32; + } + + if (skb->ip_summed == CHECKSUM_COMPLETE) { + __be32 diff[] = { + ~from[0], ~from[1], ~from[2], ~from[3], + to[0], to[1], to[2], to[3], + }; + + skb->csum = ~csum_partial(diff, sizeof(diff), ~skb->csum); + } + + memcpy(from, to, sizeof (struct in6_addr)); #endif return true; diff -ruw linux-5.4.60/net/netfilter/nf_nat_sip.c linux-5.4.60-fbx/net/netfilter/nf_nat_sip.c --- linux-5.4.60/net/netfilter/nf_nat_sip.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/netfilter/nf_nat_sip.c 2021-03-04 13:21:01.470839054 +0100 @@ -365,6 +365,15 @@ range_set_for_snat = 1; } + if (range_set_for_snat) { + if (ct->master->nat_src_proto_min.all && + ct->master->nat_src_proto_max.all) { + range.flags |= NF_NAT_RANGE_PROTO_SPECIFIED; + range.min_proto = ct->master->nat_src_proto_min; + range.max_proto = ct->master->nat_src_proto_max; + } + } + /* Perform SRC manip. */ if (range_set_for_snat) nf_nat_setup_info(ct, &range, NF_NAT_MANIP_SRC); @@ -382,10 +391,11 @@ enum ip_conntrack_dir dir = CTINFO2DIR(ctinfo); struct nf_ct_sip_master *ct_sip_info = nfct_help_data(ct); union nf_inet_addr newaddr; - u_int16_t port; + u_int16_t port, sport, eport; __be16 srcport; char buffer[INET6_ADDRSTRLEN + sizeof("[]:nnnnn")]; unsigned int buflen; + unsigned int i; /* Connection will come from reply */ if (nf_inet_addr_cmp(&ct->tuplehash[dir].tuple.src.u3, @@ -410,7 +420,24 @@ exp->dir = !dir; exp->expectfn = nf_nat_sip_expected; - for (; port != 0; port++) { + if (dir == IP_CT_DIR_ORIGINAL && + (ct->status & IPS_SRC_NAT) && + ct->nat_src_proto_min.all && + ct->nat_src_proto_max.all) { + sport = ntohs(ct->nat_src_proto_min.all); + eport = ntohs(ct->nat_src_proto_max.all); + } else { + sport = 1024; + eport = 65535; + } + + if (port < sport || port > eport) { + get_random_bytes(&port, sizeof (port)); + port %= eport - sport; + port += sport; + } + + for (i = 0; i < eport - sport + 1; i++) { int ret; exp->tuple.dst.u.udp.port = htons(port); @@ -421,6 +448,10 @@ port = 0; break; } + + port++; + if (port > eport) + port = sport; } if (port == 0) { @@ -580,7 +611,8 @@ enum ip_conntrack_info ctinfo; struct nf_conn *ct = nf_ct_get(skb, &ctinfo); enum ip_conntrack_dir dir = CTINFO2DIR(ctinfo); - u_int16_t port; + u_int16_t port, sport, eport; + unsigned int i; /* Connection will come from reply */ if (nf_inet_addr_cmp(&ct->tuplehash[dir].tuple.src.u3, @@ -601,17 +633,37 @@ rtcp_exp->dir = !dir; rtcp_exp->expectfn = nf_nat_sip_expected; + if (dir == IP_CT_DIR_ORIGINAL && + (ct->status & IPS_SRC_NAT) && + ct->nat_src_proto_min.all && + ct->nat_src_proto_max.all) { + sport = ntohs(ct->nat_src_proto_min.all); + eport = ntohs(ct->nat_src_proto_max.all); + } else { + sport = 1024; + eport = 65535; + } + + port = ntohs(rtp_exp->tuple.dst.u.udp.port); + if (port < sport || port > eport - 1) { + get_random_bytes(&port, sizeof (port)); + port %= eport - sport; + port += sport; + } + /* Try to get same pair of ports: if not, try to change them. */ - for (port = ntohs(rtp_exp->tuple.dst.u.udp.port); - port != 0; port += 2) { + for (i = 0; i < eport - sport + 1; i += 2) { int ret; rtp_exp->tuple.dst.u.udp.port = htons(port); ret = nf_ct_expect_related(rtp_exp, NF_CT_EXP_F_SKIP_MASTER); - if (ret == -EBUSY) + if (ret == -EBUSY) { + port += 2; + if (port > eport) + port = sport; continue; - else if (ret < 0) { + } else if (ret < 0) { port = 0; break; } @@ -622,12 +674,19 @@ break; else if (ret == -EBUSY) { nf_ct_unexpect_related(rtp_exp); + port += 2; + if (port > eport) + port = sport; continue; } else if (ret < 0) { nf_ct_unexpect_related(rtp_exp); port = 0; break; } + + port += 2; + if (port > eport) + port = sport; } if (port == 0) { diff -ruw linux-5.4.60/net/sched/sch_drr.c linux-5.4.60-fbx/net/sched/sch_drr.c --- linux-5.4.60/net/sched/sch_drr.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/sched/sch_drr.c 2021-03-04 13:21:01.500839054 +0100 @@ -334,7 +334,9 @@ cl = drr_find_class(sch, res.classid); return cl; } - return NULL; + + /* default to first minor if it exists, or drop */ + return drr_find_class(sch, TC_H_MAKE(TC_H_MAJ(sch->handle), 1)); } static int drr_enqueue(struct sk_buff *skb, struct Qdisc *sch, diff -ruw linux-5.4.60/net/socket.c linux-5.4.60-fbx/net/socket.c --- linux-5.4.60/net/socket.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/socket.c 2021-03-04 13:21:01.514172389 +0100 @@ -1066,6 +1066,29 @@ return err; } +static DEFINE_MUTEX(fbxbridge_ioctl_mutex); +static int (*fbxbridge_ioctl_hook)(struct net *, unsigned int cmd, void __user *arg) = NULL; + +void fbxbridge_set(int (*hook)(struct net *, unsigned int, void __user *)) +{ + mutex_lock(&fbxbridge_ioctl_mutex); + fbxbridge_ioctl_hook = hook; + mutex_unlock(&fbxbridge_ioctl_mutex); +} + +static DEFINE_MUTEX(fbxdiverter_ioctl_mutex); +static int (*fbxdiverter_ioctl_hook) (struct net *, unsigned int cmd, void __user *arg) = NULL; + +void fbxdiverter_ioctl_set(int (*hook) (struct net *, unsigned int, + void __user *)) +{ + mutex_lock(&fbxdiverter_ioctl_mutex); + fbxdiverter_ioctl_hook = hook; + mutex_unlock(&fbxdiverter_ioctl_mutex); +} + +EXPORT_SYMBOL(fbxdiverter_ioctl_set); + /* * With an ioctl, arg may well be a user mode pointer, but we don't know * what to do with it - that's up to the protocol still. @@ -1165,6 +1188,17 @@ err = open_related_ns(&net->ns, get_net_ns); break; + case SIOCGFBXDIVERT: + case SIOCSFBXDIVERT: + err = -ENOPKG; + if (!fbxdiverter_ioctl_hook) + request_module("fbxdiverter"); + + mutex_lock(&fbxdiverter_ioctl_mutex); + if (fbxdiverter_ioctl_hook) + err = fbxdiverter_ioctl_hook(net, cmd, argp); + mutex_unlock(&fbxdiverter_ioctl_mutex); + break; case SIOCGSTAMP_OLD: case SIOCGSTAMPNS_OLD: if (!sock->ops->gettstamp) { @@ -1185,6 +1219,17 @@ cmd == SIOCGSTAMP_NEW, false); break; + case SIOCGFBXBRIDGE: + case SIOCSFBXBRIDGE: + err = -ENOPKG; + if (!fbxbridge_ioctl_hook) + request_module("fbxbridge"); + + mutex_lock(&fbxbridge_ioctl_mutex); + if (fbxbridge_ioctl_hook) + err = fbxbridge_ioctl_hook(net, cmd, argp); + mutex_unlock(&fbxbridge_ioctl_mutex); + break; default: err = sock_do_ioctl(net, sock, cmd, arg); break; diff -ruw linux-5.4.60/net/unix/af_unix.c linux-5.4.60-fbx/net/unix/af_unix.c --- linux-5.4.60/net/unix/af_unix.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/unix/af_unix.c 2021-03-04 13:21:01.524172389 +0100 @@ -279,8 +279,10 @@ sk_for_each(s, &unix_socket_table[hash ^ type]) { struct unix_sock *u = unix_sk(s); +#ifdef UNIX_ABSTRACT_IGNORE_NETNS if (!net_eq(sock_net(s), net)) continue; +#endif if (u->addr->len == len && !memcmp(u->addr->name, sunname, len)) diff -ruw linux-5.4.60/net/unix/Kconfig linux-5.4.60-fbx/net/unix/Kconfig --- linux-5.4.60/net/unix/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/unix/Kconfig 2021-03-04 13:21:01.524172389 +0100 @@ -25,6 +25,9 @@ depends on UNIX default y +config UNIX_ABSTRACT_IGNORE_NETNS + bool "make abstract namespace global to all network namespaces" + config UNIX_DIAG tristate "UNIX: socket monitoring interface" depends on UNIX diff -ruw linux-5.4.60/net/wireless/core.h linux-5.4.60-fbx/net/wireless/core.h --- linux-5.4.60/net/wireless/core.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/wireless/core.h 2021-03-04 13:21:01.527505723 +0100 @@ -331,6 +331,12 @@ struct net_device *dev, struct mesh_setup *setup, const struct mesh_config *conf); +int cfg80211_update_mesh_vendor_node_metrics_ie(struct cfg80211_registered_device *rdev, + struct net_device *dev, + struct mesh_vendor_ie *vendor_ie); +int cfg80211_update_mesh_vendor_path_metrics_ie(struct cfg80211_registered_device *rdev, + struct net_device *dev, + struct mesh_vendor_ie *vendor_ie); int __cfg80211_leave_mesh(struct cfg80211_registered_device *rdev, struct net_device *dev); int cfg80211_leave_mesh(struct cfg80211_registered_device *rdev, diff -ruw linux-5.4.60/net/wireless/mesh.c linux-5.4.60-fbx/net/wireless/mesh.c --- linux-5.4.60/net/wireless/mesh.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/wireless/mesh.c 2021-03-04 13:21:01.527505723 +0100 @@ -217,6 +217,34 @@ return err; } +int cfg80211_update_mesh_vendor_node_metrics_ie(struct cfg80211_registered_device *rdev, + struct net_device *dev, + struct mesh_vendor_ie *vendor_ie) +{ + struct wireless_dev *wdev = dev->ieee80211_ptr; + int err; + + wdev_lock(wdev); + err = rdev_update_mesh_vendor_node_metrics_ie(rdev, dev, vendor_ie); + wdev_unlock(wdev); + + return err; +} + +int cfg80211_update_mesh_vendor_path_metrics_ie(struct cfg80211_registered_device *rdev, + struct net_device *dev, + struct mesh_vendor_ie *vendor_ie) +{ + struct wireless_dev *wdev = dev->ieee80211_ptr; + int err; + + wdev_lock(wdev); + err = rdev_update_mesh_vendor_path_metrics_ie(rdev, dev, vendor_ie); + wdev_unlock(wdev); + + return err; +} + int cfg80211_set_mesh_channel(struct cfg80211_registered_device *rdev, struct wireless_dev *wdev, struct cfg80211_chan_def *chandef) diff -ruw linux-5.4.60/net/wireless/nl80211.c linux-5.4.60-fbx/net/wireless/nl80211.c --- linux-5.4.60/net/wireless/nl80211.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/wireless/nl80211.c 2021-03-04 13:21:01.530839056 +0100 @@ -6407,6 +6407,51 @@ return err; } +static int nl80211_set_mpp(struct sk_buff *skb, struct genl_info *info) +{ + struct cfg80211_registered_device *rdev = info->user_ptr[0]; + struct net_device *dev = info->user_ptr[1]; + u8 *dst = NULL; + u8 *next_hop = NULL; + + if (!info->attrs[NL80211_ATTR_MAC]) + return -EINVAL; + + if (!info->attrs[NL80211_ATTR_MPATH_NEXT_HOP]) + return -EINVAL; + + dst = nla_data(info->attrs[NL80211_ATTR_MAC]); + next_hop = nla_data(info->attrs[NL80211_ATTR_MPATH_NEXT_HOP]); + + if (!rdev->ops->update_mpp) + return -EOPNOTSUPP; + + if (dev->ieee80211_ptr->iftype != NL80211_IFTYPE_MESH_POINT) + return -EOPNOTSUPP; + + return rdev_update_mpp(rdev, dev, dst, next_hop); +} + +static int nl80211_del_mpp(struct sk_buff *skb, struct genl_info *info) +{ + struct cfg80211_registered_device *rdev = info->user_ptr[0]; + struct net_device *dev = info->user_ptr[1]; + u8 *dst; + + if (!info->attrs[NL80211_ATTR_MAC]) + return -EINVAL; + + if (!rdev->ops->delete_mpp) + return -EOPNOTSUPP; + + if (dev->ieee80211_ptr->iftype != NL80211_IFTYPE_MESH_POINT) + return -EOPNOTSUPP; + + dst = nla_data(info->attrs[NL80211_ATTR_MAC]); + + return rdev_delete_mpp(rdev, dev, dst); +} + static int nl80211_set_bss(struct sk_buff *skb, struct genl_info *info) { struct cfg80211_registered_device *rdev = info->user_ptr[0]; @@ -12906,8 +12951,30 @@ struct cfg80211_registered_device *rdev = info->user_ptr[0]; struct wireless_dev *wdev = __cfg80211_wdev_from_attrs(genl_info_net(info), info->attrs); - int i, err; + int i, err = 0; u32 vid, subcmd; + struct net_device *dev = wdev->netdev; + struct mesh_vendor_ie mv_ie; + struct nlattr *ieattr; + u8 type; + + + if (wdev->iftype == NL80211_IFTYPE_MESH_POINT) { + if (info->attrs[NL80211_ATTR_VENDOR_DATA] && + info->attrs[NL80211_ATTR_VENDOR_SUBCMD]) { + if (!info->attrs[NL80211_ATTR_VENDOR_DATA]) + return -EINVAL; + ieattr = info->attrs[NL80211_ATTR_VENDOR_DATA]; + mv_ie.ie = nla_data(ieattr); + mv_ie.ie_len = nla_len(ieattr); + type = nla_get_u32(info->attrs[NL80211_ATTR_VENDOR_SUBCMD]); + if (type == NL80211_QBC_UPDATE_NODE_METRICS_IE) + err = cfg80211_update_mesh_vendor_node_metrics_ie(rdev, dev, &mv_ie); + else if (type == NL80211_QBC_UPDATE_PATH_METRICS_IE) + err = cfg80211_update_mesh_vendor_path_metrics_ie(rdev, dev, &mv_ie); + return err; + } + } if (!rdev->wiphy.vendor_commands) return -EOPNOTSUPP; @@ -14085,6 +14152,20 @@ NL80211_FLAG_NEED_RTNL, }, { + .cmd = NL80211_CMD_SET_MPP, + .doit = nl80211_set_mpp, + .flags = GENL_UNS_ADMIN_PERM, + .internal_flags = NL80211_FLAG_NEED_NETDEV_UP | + NL80211_FLAG_NEED_RTNL, + }, + { + .cmd = NL80211_CMD_DEL_MPP, + .doit = nl80211_del_mpp, + .flags = GENL_UNS_ADMIN_PERM, + .internal_flags = NL80211_FLAG_NEED_NETDEV_UP | + NL80211_FLAG_NEED_RTNL, + }, + { .cmd = NL80211_CMD_SET_BSS, .validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP, .doit = nl80211_set_bss, @@ -15473,6 +15554,94 @@ } EXPORT_SYMBOL(cfg80211_notify_new_peer_candidate); +void cfg80211_notify_mesh_peer_path_metrics(struct net_device *dev, const u8 *macaddr, + const u8 *ie, u8 ie_len, gfp_t gfp) +{ + struct wireless_dev *wdev = dev->ieee80211_ptr; + struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); + struct sk_buff *msg; + void *hdr; + + if (WARN_ON(wdev->iftype != NL80211_IFTYPE_MESH_POINT)) + return; + + msg = nlmsg_new(100 + ie_len, gfp); + if (!msg) + return; + + hdr = nl80211hdr_put(msg, 0, 0, 0, NL80211_CMD_MESH_PEER_PATH_METRICS); + if (!hdr) { + nlmsg_free(msg); + return; + } + + if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || + nla_put_string(msg, NL80211_ATTR_IFNAME, dev->name) || + nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) || + nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, macaddr) || + (ie_len && ie && + nla_put(msg, NL80211_ATTR_IE, ie_len , ie))) + goto nla_put_failure; + + genlmsg_end(msg, hdr); + + genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, + NL80211_MCGRP_MLME, gfp); + return; + + nla_put_failure: + genlmsg_cancel(msg, hdr); + nlmsg_free(msg); +} +EXPORT_SYMBOL(cfg80211_notify_mesh_peer_path_metrics); + + +void cfg80211_notify_mesh_peer_node_metrics(struct net_device *dev, + const u8 *macaddr, u16 stype, s8 signal, + u32 beacon_int, const u8 *ie, u8 ie_len, gfp_t gfp) +{ + struct wireless_dev *wdev = dev->ieee80211_ptr; + struct cfg80211_registered_device *rdev = wiphy_to_rdev(wdev->wiphy); + struct sk_buff *msg; + void *hdr; + + if (WARN_ON(wdev->iftype != NL80211_IFTYPE_MESH_POINT)) + return; + + msg = nlmsg_new(100 + ie_len, gfp); + if (!msg) + return; + + hdr = nl80211hdr_put(msg, 0, 0, 0, NL80211_CMD_MESH_PEER_NODE_METRICS); + if (!hdr) { + nlmsg_free(msg); + return; + } + + if (nla_put_u32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx) || + nla_put_string(msg, NL80211_ATTR_IFNAME, dev->name) || + nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex) || + nla_put(msg, NL80211_ATTR_MAC, ETH_ALEN, macaddr) || + nla_put_u16(msg, NL80211_ATTR_FRAME_TYPE, stype) || + nla_put_s8(msg, NL80211_ATTR_SIGNAL_STRENGTH, signal) || + nla_put_u32(msg, NL80211_ATTR_BEACON_INTERVAL, beacon_int) || + (ie_len && ie && + nla_put(msg, NL80211_ATTR_IE, ie_len , ie))) + goto nla_put_failure; + + genlmsg_end(msg, hdr); + + genlmsg_multicast_netns(&nl80211_fam, wiphy_net(&rdev->wiphy), msg, 0, + NL80211_MCGRP_MLME, gfp); + return; + + nla_put_failure: + genlmsg_cancel(msg, hdr); + nlmsg_free(msg); +} +EXPORT_SYMBOL(cfg80211_notify_mesh_peer_node_metrics); + + void nl80211_michael_mic_failure(struct cfg80211_registered_device *rdev, struct net_device *netdev, const u8 *addr, enum nl80211_key_type key_type, int key_id, diff -ruw linux-5.4.60/net/wireless/rdev-ops.h linux-5.4.60-fbx/net/wireless/rdev-ops.h --- linux-5.4.60/net/wireless/rdev-ops.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/wireless/rdev-ops.h 2021-03-04 13:21:01.530839056 +0100 @@ -278,6 +278,28 @@ return ret; } +static inline int rdev_update_mpp(struct cfg80211_registered_device *rdev, + struct net_device *dev, u8 *dst, u8 *next_hop) +{ + int ret; + + trace_rdev_update_mpp(&rdev->wiphy, dev, dst, next_hop); + ret = rdev->ops->update_mpp(&rdev->wiphy, dev, dst, next_hop); + trace_rdev_return_int(&rdev->wiphy, ret); + return ret; +} + +static inline int rdev_delete_mpp(struct cfg80211_registered_device *rdev, + struct net_device *dev, u8 *dst) +{ + int ret; + + trace_rdev_delete_mpp(&rdev->wiphy, dev, dst); + ret = rdev->ops->delete_mpp(&rdev->wiphy, dev, dst); + trace_rdev_return_int(&rdev->wiphy, ret); + return ret; +} + static inline int rdev_dump_mpath(struct cfg80211_registered_device *rdev, struct net_device *dev, int idx, u8 *dst, u8 *next_hop, struct mpath_info *pinfo) @@ -339,6 +361,23 @@ return ret; } +static inline int rdev_update_mesh_vendor_node_metrics_ie(struct cfg80211_registered_device *rdev, + struct net_device *dev, + struct mesh_vendor_ie *ie) +{ + int ret; + ret = rdev->ops->update_mesh_vendor_node_metrics_ie(&rdev->wiphy, dev, ie); + return ret; +} + +static inline int rdev_update_mesh_vendor_path_metrics_ie(struct cfg80211_registered_device *rdev, + struct net_device *dev, + struct mesh_vendor_ie *ie) +{ + int ret; + ret = rdev->ops->update_mesh_vendor_path_metrics_ie(&rdev->wiphy, dev, ie); + return ret; +} static inline int rdev_leave_mesh(struct cfg80211_registered_device *rdev, struct net_device *dev) diff -ruw linux-5.4.60/net/wireless/reg.c linux-5.4.60-fbx/net/wireless/reg.c --- linux-5.4.60/net/wireless/reg.c 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/wireless/reg.c 2021-03-04 13:21:01.530839056 +0100 @@ -1761,6 +1761,9 @@ if (chan->flags & IEEE80211_CHAN_RADAR) { chan->dfs_cac_ms = IEEE80211_DFS_MIN_CAC_TIME_MS; + if (chan->center_freq >= 5600 && + chan->center_freq <= 5650) + chan->dfs_cac_ms = IEEE80211_DFS_WEATHER_MIN_CAC_TIME_MS; if (reg_rule->dfs_cac_ms) chan->dfs_cac_ms = reg_rule->dfs_cac_ms; } @@ -1781,9 +1784,14 @@ if (chan->flags & IEEE80211_CHAN_RADAR) { if (reg_rule->dfs_cac_ms) chan->dfs_cac_ms = reg_rule->dfs_cac_ms; + else { + if (chan->center_freq >= 5600 && + chan->center_freq <= 5650) + chan->dfs_cac_ms = IEEE80211_DFS_WEATHER_MIN_CAC_TIME_MS; else chan->dfs_cac_ms = IEEE80211_DFS_MIN_CAC_TIME_MS; } + } if (chan->orig_mpwr) { /* diff -ruw linux-5.4.60/net/wireless/trace.h linux-5.4.60-fbx/net/wireless/trace.h --- linux-5.4.60/net/wireless/trace.h 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/net/wireless/trace.h 2021-03-04 13:21:01.534172390 +0100 @@ -813,6 +813,11 @@ TP_ARGS(wiphy, netdev, mac) ); +DEFINE_EVENT(wiphy_netdev_mac_evt, rdev_delete_mpp, + TP_PROTO(struct wiphy *wiphy, struct net_device *netdev, const u8 *mac), + TP_ARGS(wiphy, netdev, mac) +); + TRACE_EVENT(rdev_dump_station, TP_PROTO(struct wiphy *wiphy, struct net_device *netdev, int _idx, u8 *mac), @@ -888,6 +893,12 @@ TP_PROTO(struct wiphy *wiphy, struct net_device *netdev, u8 *dst, u8 *next_hop), TP_ARGS(wiphy, netdev, dst, next_hop) +); + +DEFINE_EVENT(mpath_evt, rdev_update_mpp, + TP_PROTO(struct wiphy *wiphy, struct net_device *netdev, u8 *dst, + u8 *next_hop), + TP_ARGS(wiphy, netdev, dst, next_hop) ); TRACE_EVENT(rdev_dump_mpath, diff -ruw linux-5.4.60/scripts/dtc/include-prefixes/arm64/amlogic/Makefile linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/amlogic/Makefile --- linux-5.4.60/scripts/dtc/include-prefixes/arm64/amlogic/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/amlogic/Makefile 2021-03-04 13:20:57.000838854 +0100 @@ -1,4 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 +DTC_FLAGS += -@ +dtb-$(CONFIG_ARCH_MESON) += fbxwmr.dtb fbxwmr-r1.dtb fbxwmr-r2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-axg-s400.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12a-sei510.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb diff -ruw linux-5.4.60/scripts/dtc/include-prefixes/arm64/broadcom/Makefile linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/broadcom/Makefile --- linux-5.4.60/scripts/dtc/include-prefixes/arm64/broadcom/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/broadcom/Makefile 2021-03-04 13:20:57.004172187 +0100 @@ -6,3 +6,4 @@ subdir-y += northstar2 subdir-y += stingray +subdir-y += bcm63xx diff -ruw linux-5.4.60/scripts/dtc/include-prefixes/arm64/marvell/armada-ap806.dtsi linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/marvell/armada-ap806.dtsi --- linux-5.4.60/scripts/dtc/include-prefixes/arm64/marvell/armada-ap806.dtsi 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/marvell/armada-ap806.dtsi 2021-03-04 13:20:57.010838855 +0100 @@ -274,6 +274,11 @@ }; }; + ap_hwmon: ap806-hwmon@6f8084 { + compatible = "marvell,ap806-hwmon"; + reg = <0x6f8084 0xc>; + }; + ap_syscon1: system-controller@6f8000 { compatible = "syscon", "simple-mfd"; reg = <0x6f8000 0x1000>; diff -ruw linux-5.4.60/scripts/dtc/include-prefixes/arm64/marvell/armada-cp110.dtsi linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/marvell/armada-cp110.dtsi --- linux-5.4.60/scripts/dtc/include-prefixes/arm64/marvell/armada-cp110.dtsi 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/marvell/armada-cp110.dtsi 2021-03-04 13:20:57.010838855 +0100 @@ -134,10 +134,13 @@ reg = <0x120000 0x6000>; marvell,system-controller = <&CP110_LABEL(syscon0)>; clocks = <&CP110_LABEL(clk) 1 5>, <&CP110_LABEL(clk) 1 6>, - <&CP110_LABEL(clk) 1 18>; - clock-names = "mg_clk", "mg_core_clk", "axi_clk"; + <&CP110_LABEL(clk) 1 18>, <&CP110_LABEL(clk) 1 9>; + clock-names = "mg_clk", "mg_core_clk", "axi_clk", "gop_clk"; #address-cells = <1>; #size-cells = <0>; + marvell,cp_mgmt = <&CP110_LABEL(syscon1)>; + /* always use Master CP S@R */ + marvell,sar = <&cp0_syscon1>; CP110_LABEL(comphy0): phy@0 { reg = <0>; @@ -322,6 +325,14 @@ }; }; + CP110_LABEL(utmi): utmi@580000 { + compatible = "marvell,cp110-utmi-phy"; + #phy-cells = <1>; + reg = <0x580000 0x2000>; + reg-names = "utmi-unit"; + marvell,system-controller = <&CP110_LABEL(syscon0)>; + }; + CP110_LABEL(xor0): xor@6a0000 { compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; reg = <0x6a0000 0x1000>, <0x6b0000 0x1000>; @@ -364,6 +375,11 @@ status = "disabled"; }; + CP110_LABEL(hwmon): cp110-hwmon@0x400070 { + compatible = "marvell,cp110-hwmon"; + reg = <0x400070 0xc>; + }; + CP110_LABEL(i2c0): i2c@701000 { compatible = "marvell,mv78230-i2c"; reg = <0x701000 0x20>; @@ -388,6 +404,16 @@ status = "disabled"; }; + CP110_LABEL(mss_i2c): i2c@211000 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x211000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + CP110_LABEL(uart0): serial@702000 { compatible = "snps,dw-apb-uart"; reg = <0x702000 0x100>; @@ -457,8 +483,8 @@ CP110_LABEL(trng): trng@760000 { compatible = "marvell,armada-8k-rng", - "inside-secure,safexcel-eip76"; - reg = <0x760000 0x7d>; + "inside-secure,safexcel-eip150"; + reg = <0x760000 0x10000>; interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; clock-names = "core", "reg"; clocks = <&CP110_LABEL(clk) 1 25>, @@ -492,6 +518,19 @@ <&CP110_LABEL(clk) 1 17>; dma-coherent; }; + + CP110_LABEL(tdm0): tdmmc@7a0000 { + compatible = "marvell,armada-a8k-tdm"; + reg = <0x7a0000 0x20000>, + <0x440400 0x20>; + reg-names = "tdm_regs", "pll_regs"; + interrupts = <111 IRQ_TYPE_LEVEL_HIGH>, + <112 IRQ_TYPE_LEVEL_HIGH>, + <113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CP110_LABEL(clk) 1 1>; + clock-names = "gateclk"; + status = "disabled"; + }; }; CP110_LABEL(pcie0): pcie@CP110_PCIE0_BASE { diff -ruw linux-5.4.60/scripts/dtc/include-prefixes/arm64/marvell/Makefile linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/marvell/Makefile --- linux-5.4.60/scripts/dtc/include-prefixes/arm64/marvell/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/scripts/dtc/include-prefixes/arm64/marvell/Makefile 2021-03-04 13:20:57.010838855 +0100 @@ -10,3 +10,17 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin-singleshot.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8080-db.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp1_dsl_lte.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp1_ftth_p2p.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp2_ftth_p2p.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp2_ftth_pon.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp1_test_module.dtb +dtb-$(CONFIG_ARCH_MVEBU) += fbxgw7r_exp2_test_module.dtb + +dtb-$(CONFIG_ARCH_MVEBU) += jbxgw7r.dtb +dtb-$(CONFIG_ARCH_MVEBU) += jbxgw7r_exp1_ftth_p2p.dtb +dtb-$(CONFIG_ARCH_MVEBU) += jbxgw7r_exp2_ftth_p2p.dtb + +# export symbols in DTBs file to allow overlay usage +DTC_FLAGS += -@ diff -ruw linux-5.4.60/scripts/Makefile.build linux-5.4.60-fbx/scripts/Makefile.build --- linux-5.4.60/scripts/Makefile.build 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/scripts/Makefile.build 2021-03-04 13:21:01.547505724 +0100 @@ -431,7 +431,7 @@ # module is turned into a multi object module, $^ will contain header file # dependencies recorded in the .*.cmd file. quiet_cmd_link_multi-m = LD [M] $@ - cmd_link_multi-m = $(LD) $(ld_flags) -r -o $@ $(filter %.o,$^) + cmd_link_multi-m = $(LD) $(ld_flags) -r -o $@ $(filter %.o %.a,$^) $(multi-used-m): FORCE $(call if_changed,link_multi-m) diff -ruw linux-5.4.60/scripts/Makefile.lib linux-5.4.60-fbx/scripts/Makefile.lib --- linux-5.4.60/scripts/Makefile.lib 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/scripts/Makefile.lib 2021-03-04 13:21:01.547505724 +0100 @@ -256,11 +256,11 @@ DTC_FLAGS += $(DTC_FLAGS_$(basetarget)) # Generate an assembly file to wrap the output of the device tree compiler -quiet_cmd_dt_S_dtb= DTB $@ +quiet_cmd_dt_S_dtb= DTB_bin $@ cmd_dt_S_dtb= \ { \ echo '\#include '; \ - echo '.section .dtb.init.rodata,"a"'; \ + echo '.section .dtb.rodata,"a"'; \ echo '.balign STRUCT_ALIGNMENT'; \ echo '.global __dtb_$(subst -,_,$(*F))_begin'; \ echo '__dtb_$(subst -,_,$(*F))_begin:'; \ @@ -273,6 +273,8 @@ $(obj)/%.dtb.S: $(obj)/%.dtb FORCE $(call if_changed,dt_S_dtb) +.PRECIOUS: $(src)/%.dtb.S + quiet_cmd_dtc = DTC $@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \ diff -ruw linux-5.4.60/sound/soc/kirkwood/Kconfig linux-5.4.60-fbx/sound/soc/kirkwood/Kconfig --- linux-5.4.60/sound/soc/kirkwood/Kconfig 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/sound/soc/kirkwood/Kconfig 2021-03-04 13:21:01.724172398 +0100 @@ -16,3 +16,8 @@ Say Y if you want to add support for SoC audio on the Armada 370 Development Board. +config SND_KIRKWOOD_SOC_FBXGW2R + tristate "Soc Audio support for fbxgw2r" + depends on SND_KIRKWOOD_SOC && MACH_FBXGW2R && I2C + select SND_KIRKWOOD_SOC_I2S + select SND_SOC_CS42L52 diff -ruw linux-5.4.60/sound/soc/kirkwood/Makefile linux-5.4.60-fbx/sound/soc/kirkwood/Makefile --- linux-5.4.60/sound/soc/kirkwood/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/sound/soc/kirkwood/Makefile 2021-03-04 13:21:01.724172398 +0100 @@ -6,3 +6,6 @@ snd-soc-armada-370-db-objs := armada-370-db.o obj-$(CONFIG_SND_KIRKWOOD_SOC_ARMADA370_DB) += snd-soc-armada-370-db.o + +snd-soc-fbxgw2r-objs := kirkwood-fbxgw2r.o +obj-$(CONFIG_SND_KIRKWOOD_SOC_FBXGW2R) += snd-soc-fbxgw2r.o diff -ruw linux-5.4.60/usr/Makefile linux-5.4.60-fbx/usr/Makefile --- linux-5.4.60/usr/Makefile 2020-08-21 13:05:39.000000000 +0200 +++ linux-5.4.60-fbx/usr/Makefile 2021-03-04 13:21:01.924172407 +0100 @@ -27,7 +27,7 @@ # Generate the initramfs cpio archive hostprogs-y := gen_init_cpio -initramfs := $(CONFIG_SHELL) $(srctree)/$(src)/gen_initramfs_list.sh +initramfs := $(BASH) $(srctree)/$(src)/gen_initramfs_list.sh ramfs-input := $(if $(filter-out "",$(CONFIG_INITRAMFS_SOURCE)), \ $(shell echo $(CONFIG_INITRAMFS_SOURCE)),-d) ramfs-args := \ diff -Nruw linux-5.4.60-fbx/arch/arm64/boot/dts/broadcom/bcm63xx./Makefile linux-5.4.60-fbx/arch/arm64/boot/dts/broadcom/bcm63xx/Makefile --- linux-5.4.60-fbx/arch/arm64/boot/dts/broadcom/bcm63xx./Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/broadcom/bcm63xx/Makefile 2021-03-04 13:20:57.004172187 +0100 @@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_BCM63XX) += bcm963158ref1d.dtb fbxgw8r.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r-common.dtsi 2021-03-04 13:20:57.010838855 +0100 @@ -0,0 +1,925 @@ +/ { + chosen { + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@3fff8000 { + compatible = "ramoops"; + /* RAM top - 32k */ + reg = <0x0 0x3fff8000 0x0 (32 * 1024)>; + record-size = <(32 * 1024)>; + ecc-size = <16>; + no-dump-oops; + }; + }; + + memory@00000000 { + device_type = "memory"; + // hopefully patched by ATF. + reg = <0x0 0x0 0x0 0x0>; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + fbx7r-fbxgpio { + compatible = "fbx,fbxgpio"; + + lan-sfp-txdis { + gpio = <&cp0_gpio2 22 0>; + output-high; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + lan-sfp-txfault { + gpio = <&cp0_gpio2 21 0>; + input; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + lan-sfp-pwren { + gpio = <&io_expander1 7 0>; + output-low; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + lan-sfp-presence { + gpio = <&cp1_gpio1 27 0>; + input; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + lan-sfp-pwrgood { + gpio = <&cp1_gpio1 10 0>; + input; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + lan-sfp-rxlos { + gpio = <&cp1_gpio1 28 0>; + input; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + + sata0-pwren { + gpio = <&io_expander0 13 0>; + output-low; + }; + sata1-pwren { + gpio = <&io_expander0 14 0>; + output-low; + }; + sata0-pwrfault { + gpio = <&io_expander0 11 0>; + input; + }; + sata1-pwrfault { + gpio = <&io_expander0 12 0>; + input; + }; + + sata2-pwren { + gpio = <&io_expander1 11 0>; + output-low; + }; + sata3-pwren { + gpio = <&io_expander1 10 0>; + output-low; + }; + sata2-pwrfault { + gpio = <&io_expander1 5 0>; + input; + }; + sata3-pwrfault { + gpio = <&io_expander1 4 0>; + input; + }; + + usbhub2-rst { + gpio = <&io_expander0 15 0>; + output-low; + }; + usbhub3-rst { + gpio = <&io_expander1 6 0>; + output-low; + }; + + mpcie0-rst { + /* WiFi 5.0Ghz */ + gpio = <&io_expander0 8 0>; + output-low; + no-claim; + }; + mpcie1-rst { + /* WiFI 2.4 Ghz */ + gpio = <&io_expander1 15 0>; + output-low; + no-claim; + }; + mpcie2-rst { + /* WiFi Listen */ + gpio = <&io_expander1 9 0>; + output-low; + no-claim; + }; + + ha-rst { + gpio = <&cp1_gpio1 25 0 >; + output-low; + }; + + sw-int { + gpio = <&cp0_gpio2 1 0>; + input; + }; + sw-reset { + gpio = <&io_expander0 0 0>; + output-high; + no-claim; + }; + phy-int { + gpio = <&cp0_gpio2 20 0>; + input; + }; + phy-reset { + gpio = <&io_expander0 1 0>; + output-high; + }; + + dect_jtag_tck: dect-jtag-tck { + gpio = <&cp1_gpio1 20 0>; + output-low; + }; + dect_jtag_tdi: dect-jtag-tdi { + gpio = <&cp1_gpio1 17 0>; + output-low; + }; + dect_jtag_tdo: dect-jtag-tdo { + gpio = <&cp1_gpio1 18 0>; + input; + }; + dect_jtag_tms: dect-jtag-tms { + gpio = <&cp1_gpio1 26 0>; + output-low; + }; + dect-reset { + gpio = <&cp1_gpio1 4 0>; + output-low; + }; + + exp1-rst0 { + gpio = <&io_expander0 2 0>; + output-low; + }; + exp1-rst1 { + gpio = <&io_expander0 3 0>; + output-high; + }; + exp1-3v3-en { + gpio = <&io_expander0 6 0>; + output-low; + }; + exp1-20v-pwren { + gpio = <&io_expander0 5 0>; + output-low; + }; + + exp2-rst0 { + gpio = <&io_expander1 3 0>; + output-low; + }; + exp2-rst1 { + gpio = <&io_expander1 1 0>; + output-high; + }; + exp2-3v3-en { + gpio = <&io_expander1 2 0>; + output-low; + }; + exp2-20v-pwren { + gpio = <&io_expander1 8 0>; + output-low; + }; + + + boot-eth { + gpio = <&cp0_gpio2 29 0>; + input; + }; + }; + + /* + * I2C mux isolating LAN SFP, both expansion boards + * Expansion boards branches from each other. + */ + i2c_bigmux { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; + #size-cells = <0>; + mux-gpios = <&cp1_gpio1 24 0>, /* lan-sfp-i2c-en */ + <&io_expander1 12 0>, /* exp2-i2c-en */ + <&io_expander1 13 0>; /* exp1-i2c-en */ + idle-state = <0x0>; + i2c-parent = <&misc_i2c>; + + lan_sfp_i2c: i2c@1 { + reg = <0x1>; + }; + + exp2_ext_i2c: i2c@2 { + reg = <0x2>; + }; + + exp1_ext_i2c: i2c@4 { + reg = <0x4>; + }; + }; + + jtag_dect { + compatible = "fbx,fbxjtag"; + + clock-delay = <500>; + wait-tms = <0>; + data-read-size = <128>; + inst-read-size = <128>; + + fbxgpio-tck = <&dect_jtag_tck>; + fbxgpio-tdo = <&dect_jtag_tdo>; + fbxgpio-tdi = <&dect_jtag_tdi>; + fbxgpio-tms = <&dect_jtag_tms>; + }; + + cp0_i2c1_gpio: cp0_i2c1_gpio { + /* aka I2C #1, A8K I2C bus CP0_I2C1 */ + compatible = "i2c-gpio"; + gpios = <&cp0_gpio2 3 0 /* sda */ + &cp0_gpio2 4 0 /* scl */ + >; + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + + spd@0x53 { + /* SPD eeprom */ + compatible = "at24,ee1004"; + reg = <0x53>; + }; + }; + + misc_i2c: cp1_mss_i2c { + /* aka I2C #2, A8K I2C bus CP1_MSS_I2C */ + compatible = "i2c-gpio"; + gpios = <&cp1_gpio1 29 0 /* sda */ + &cp1_gpio1 30 0 /* scl */ + >; + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + }; + +#ifdef USE_PHYLINK_SFP + sfp_lan: sfp-lan { + compatible = "sff,sfp"; + i2c-bus = <&lan_sfp_i2c>; + maximum-power-milliwatt = <3000>; + los-gpios = <&cp1_gpio1 28 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp1_gpio1 27 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp0_gpio2 22 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp0_gpio2 21 GPIO_ACTIVE_HIGH>; + pwr-enable-gpios = <&io_expander1 7 GPIO_ACTIVE_HIGH>; + }; +#endif + + exp1_sfp: exp1-sfp { + status = "disabled"; + }; + + exp2_sfp: exp2-sfp { + status = "disabled"; + }; + + aliases { + /* console */ + serial0 = &uart0; + /* DECT */ + serial1 = &cp0_uart0; + /* EXP2 */ + serial2 = &cp0_uart1; + /* EXP1 */ + serial3 = &cp0_uart2; + /* BT */ + serial4 = &cp1_uart0; + /* HA */ + serial5 = &cp1_uart2; + + i2c0 = &cp0_i2c0; + i2c1 = &cp0_i2c1_gpio; + i2c2 = &misc_i2c; + i2c3 = &lan_sfp_i2c; + i2c4 = &exp2_ext_i2c; + i2c5 = &exp1_ext_i2c; + i2c6 = &cp0_mss_i2c; + }; +}; + +&cp1_gpio1 { + gpio-line-names = "", /* 0 */ + "", /* 1 */ + "", /* 2 */ + "", /* 3 */ + "tdm-rst", /* 4 */ + "", /* 5 */ + "", /* 6 */ + "", /* 7 */ + "", /* 8 */ + "nfc-int", /* 9 */ + "lan-sfp-pwrfault", /* 10 */ + "", /* 11 */ + "", /* 12 */ + "", /* 13 */ + "", /* 14 */ + "", /* 15 */ + "", /* 16 */ + "dect-jtag-tdi", /* 17 */ + "dect-jtag-tdo", /* 18 */ + "ha-swd", /* 19 */ + "dect-jtag-tck", /* 20 */ + "display-swc", /* 21 */ + "", /* 22 */ + "display-swd", /* 23 */ + "lan-sfp-i2c-en", /* 24 */ + "ha-reset", /* 25 */ + "dect-jtag-tms", /* 26 */ + "lan-sfp-presence", /* 27 */ + "lan-sfp-rxlos", /* 28 */ + "", /* 29 */ + "", /* 30 */ + "exp1-3v3-pwrfault"; /* 31 */ +}; + +&cp0_gpio2 { + /* starts at offset 32 in cp110-master */ + + gpio-line-names = "exp2-3v3-pwrfault", /* 0 */ + "sw-int", /* 1 */ + "keypad-int", /* 2 */ + "", /* 3 */ + "", /* 4 */ + "", /* 5 */ + "", /* 6 */ + "", /* 7 */ + "", /* 8 */ + "", /* 9 */ + "", /* 10 */ + "", /* 11 */ + "ha-swc", /* 12 */ + "", /* 13 */ + "keypad-rst", /* 14 */ + "", /* 15 */ + "io-expander-reset", /* 16 */ + "", /* 17 */ + "", /* 18 */ + "", /* 19 */ + "phy-int", /* 20 */ + "lan-sfp-txfault", /* 21 */ + "lan-sfp-txdisable", /* 22 */ + "sdr-event", /* 23 */ + "fan-alert-int", /* 24 */ + "", /* 25 */ + "", /* 26 */ + "", /* 27 */ + "", /* 28 */ + "boot-eth", /* 29 */ + ""; /* 30 */ +}; + +&uart0 { + status = "okay"; +}; + +&ap_sdhci0 { + status = "okay"; + bus-width = <8>; + non-removable; + + partitions-main { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + disk-name = "mmcblk%d"; + + bank0@0 { + label = "bank0"; + reg = /bits/64 <0 (32 * 1024 * 1024)>; + read-only; + }; + + bank1@0 { + label = "bank1"; + reg = /bits/64 <(-1) (256 * 1024 * 1024)>; + }; + + nvram@0 { + label = "nvram"; + reg = /bits/64 <(-1) (4 * 1024 * 1024)>; + }; + + config@0 { + label = "config"; + reg = /bits/64 <(-1) (32 * 1024 * 1024)>; + }; + + new-bank0@0 { + label = "new_bank0"; + reg = /bits/64 <(-1) (32 * 1024 * 1024)>; + }; + + fbxmbr@0 { + label = "fbxmbr"; + reg = /bits/64 <(-1) (4096)>; + }; + + fortknox@0 { + label = "fortknox"; + reg = /bits/64 <(-1) (128 * 1024 * 1024)>; + }; + + userdata@0 { + label = "userdata"; + reg = /bits/64 <(-1) (-1)>; + }; + }; + + partitions-boot { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + disk-name = "mmcblk%dboot0"; + + ipl@0 { + label = "ipl"; + reg = /bits/64 <0 (1 * 1024 * 1024)>; + read-only; + }; + + serial@0 { + label = "fbxserial"; + reg = /bits/64 <(-1) (8 * 1024)>; + read-only; + }; + + randomdata@0 { + label = "randomdata"; + reg = /bits/64 <(-1) (8 * 1024)>; + read-only; + }; + + calibration@0 { + label = "calibration"; + reg = /bits/64 <(-1) (64 * 1024)>; + read-only; + }; + + field-calibration@0 { + label = "field_calibration"; + reg = /bits/64 <(-1) (64 * 1024)>; + }; + }; + + partitions-boot1 { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + disk-name = "mmcblk%dboot1"; + + backup-ipl@0 { + label = "backup-ipl"; + reg = /bits/64 <0 (1 * 1024 * 1024)>; + read-only; + }; + }; +}; + +&ap_hwmon { + status = "okay"; + fbx,requires-smc; +}; + +&cp0_hwmon { + status = "okay"; +}; + +&cp1_hwmon { + status = "okay"; + fbx,requires-smc; +}; + +&cp0_i2c0 { + status = "okay"; + pinctrl-names = "default"; + + adt7475@2e { + compatible = "adi,adt7475"; + reg = <0x2e>; + }; + + io_expander0: exp0@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + ngpios = <16>; + #gpio-cells = <2>; + gpio-line-names = "sw-rst", /* 0 */ + "phy-rst", /* 1 */ + "exp1-rst1", /* 2 */ + "exp1-rst2", /* 3 */ + "exp1-presence", /* 4 */ + "exp1-20v-pwren", /* 5 */ + "exp1-3v3-pwren", /* 6 */ + "", /* 7 */ + "pcie0-rst", /* 8 */ + "nfc-en", /* 9 */ + "type-c-i2c-en", /* 10 */ + "sata0-pwrfault", /* 11 */ + "sata1-pwrfault", /* 12 */ + "sata0-pwren", /* 13 */ + "sata1-pwren", /* 14 */ + "usbhub2-rst"; /* 15 */ + }; + + io_expander1: exp1@75 { + compatible = "nxp,pca9539"; + reg = <0x75>; + gpio-controller; + gpiobase = <300>; + ngpios = <16>; + #gpio-cells = <2>; + gpio-line-names = "exp2-presence", /* 0 */ + "exp2-rst1", /* 1 */ + "exp2-3v3-en", /* 2 */ + "exp2-rst0", /* 3 */ + "sata3-pwrfault", /* 4 */ + "sata2-pwrfault", /* 5 */ + "usbhub3-rst", /* 6 */ + "lan-sfp-pwren", /* 7 */ + "exp2-20v-pwren", /* 8 */ + "pcie2-rst", /* 9 */ + "sata3-pwren", /* 10 */ + "sata2-pwren", /* 11 */ + "exp2-i2c-en", /* 12 */ + "exp1-i2c-en", /* 13 */ + "pcie1-bt-rst", /* 14 */ + "pcie1-rst"; /* 15 */ + }; +}; + +&cp0_mss_i2c { + status = "okay"; + pinctrl-0 = <&cp0_mss_i2c_pins>; + pinctrl-names = "default"; + + ld6710-fbx@68 { + compatible = "leadtrend,ld6710-fbx"; + reg = <0x68>; + }; +}; + +&cp0_ethernet { + status = "okay"; +}; + +&cp0_mdio { + status = "okay"; + + mv6141: mv6141@16 { + compatible = "freebox,fbxgw7r-mv6141"; + reg = <0>; + gpio-reset = <&io_expander0 0 0>; + }; +}; + + +/* + * Internal port to midplane for "EXP2" expansion connector. Can + * operate in 10GBase-KR. + */ +&cp0_comphy2 { + kr-gen1-s0-amplitude = <0x12>; + kr-gen1-s0-emphasis = <0x8>; + kr-gen1-s2-emphasis = <0x2>; + + kr-ffe-cap-sel = <0xe>; + kr-ffe-res-sel = <0x6>; + kr-ffe-dfe-res = <0x1>; + kr-phase-offset = <0x60>; +}; +&cp0_eth0 { + managed = "in-band-status"; + status = "okay"; + phys = <&cp0_comphy2 0>; + phy-mode = "1000base-x"; + mac-address = [00 07 cb 00 00 fd]; + sfp = <&exp2_sfp>; +}; + +/* + * Switch uplink port in 2500Base-X. + */ +&cp0_eth2 { + managed = "in-band-status"; + status = "okay"; + phy-mode = "1000base-x"; + phys = <&cp0_comphy5 2>; + fbxserial-mac-address = <0>; + mdio-bus = <&cp0_mdio>; +}; + +&cp1_ethernet { + status = "okay"; +}; + +/* + * 10G Lan port (SFP) + */ +&cp1_comphy4 { + kr-gen1-s0-amplitude = <0x12>; + kr-gen1-s0-emphasis = <0x4>; + kr-gen1-s2-emphasis = <0x0>; +}; + +&cp1_eth0 { + managed = "in-band-status"; + status = "okay"; + phys = <&cp1_comphy4 0>; + phy-mode = "10gbase-kr"; + fbxserial-mac-address = <1>; +#ifdef USE_PHYLINK_SFP + sfp = <&sfp_lan>; +#endif +}; + +/* + * Internal port to midplane for "EXP1" expansion connector. 1000BaseX + * only, not 10G capapable + */ +&cp1_eth2 { + managed = "in-band-status"; + status = "okay"; + phys = <&cp1_comphy5 2>; + phy-mode = "1000base-x"; + mac-address = [00 07 cb 00 00 fd]; + sfp = <&exp1_sfp>; +}; + +&cp0_comphy1 { + sata-gen3-s0-amplitude = <0x15>; + sata-gen3-s0-emphasis = <0x7>; + sata-gen3-s4-dfe-res = <0x1>; + sata-phase-offset = <0x61>; +}; + +&cp0_comphy3 { + sata-gen3-s0-amplitude = <0x15>; + sata-gen3-s0-emphasis = <0x5>; + sata-gen3-s4-dfe-res = <0x1>; + sata-phase-offset = <0x61>; +}; + +&cp0_sata0 { + status = "okay"; + comreset_u = <0x17>; + comwake = <0x6>; + + sata-port@0 { + status = "okay"; + reg = <0>; + phys = <&cp0_comphy1 0>; + }; + sata-port@1 { + status = "okay"; + reg = <1>; + phys = <&cp0_comphy3 1>; + }; +}; + +&cp1_comphy2 { + sata-gen3-s0-amplitude = <0x14>; + sata-gen3-s0-emphasis = <0x5>; + sata-gen3-s4-dfe-res = <0x1>; + sata-phase-offset = <0x61>; +}; + +&cp1_comphy3 { + sata-gen3-s0-amplitude = <0x14>; + sata-gen3-s0-emphasis = <0x5>; + sata-gen3-s4-dfe-res = <0x1>; + sata-phase-offset = <0x61>; +}; + +&cp1_sata0 { + status = "okay"; + comreset_u = <0x17>; + comwake = <0x6>; + + sata-port@1 { + status = "okay"; + reg = <1>; + phys = <&cp1_comphy3 1>; + }; + sata-port@0 { + status = "okay"; + reg = <0>; + phys = <&cp1_comphy2 0>; + }; +}; + +&cp0_usb3_1 { + status = "okay"; + + phys = <&cp0_utmi 0>; + phy-names = "usb2"; +}; + +&cp1_usb3_0 { + status = "okay"; + + phys = <&cp1_comphy1 0>, + <&cp1_utmi 0>; + phy-names = "usb3", "usb2"; +}; + +&cp0_pcie0 { + /* + * WiFi 5.0Ghz + */ + status = "okay"; + num-lanes = <1>; + + phys = <&cp0_comphy0 0>; + phy-names = "lane0"; + + reset-gpios = <&io_expander0 8 0>; +}; + +&cp0_pcie1 { + /* + * WiFi Listen + */ + status = "okay"; + num-lanes = <1>; + + phys = <&cp0_comphy4 1>; + phy-names = "lane0"; + + reset-gpio = <&io_expander1 9 0>; +}; + +&cp1_pcie0 { + /* + * WiFi 2.4 Ghz + */ + status = "okay"; + num-lanes = <1>; + + phys = <&cp1_comphy0 0>; + phy-names = "lane0"; + reset-gpio = <&io_expander1 15 0>, <&io_expander1 14 0>; +}; + +&cp0_spi0 { + status = "okay"; + pinctrl-0 = <&cp0_spi0_pins>; + pinctrl-names = "default"; + + spi-slac@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "microsemi,le9641"; + reg = <0>; + spi-max-frequency = <5000000>; + }; +}; + +&cp1_spi1 { + status = "okay"; + pinctrl-0 = <&cp1_spi1_pins>; + pinctrl-names = "default"; +}; + +&cp0_pinctrl { + /* DECT */ + cp0_uart0_pins: uart0-pins-0 { + marvell,pins = "mpp45", "mpp62"; + marvell,function = "uart0"; + }; + /* EXP2 */ + cp0_uart1_pins: uart1-pins-0 { + marvell,pins = "mpp59", "mpp60"; + marvell,function = "uart1"; + }; + /* EXP1 */ + cp0_uart2_pins: uart2-pins-0 { + marvell,pins = "mpp50", "mpp51"; + marvell,function = "uart2"; + }; + /* SPI SLAC */ + cp0_spi0_pins: spi0-pins-0 { + marvell,pins = "mpp39", "mpp40", "mpp41", "mpp42", "mpp43"; + marvell,function = "spi0"; + }; + cp0_mss_i2c_pins: mss-i2c-pins-0 { + marvell,pins = "mpp57", "mpp58"; + marvell,function = "mss_i2c"; + }; +}; + +&cp1_pinctrl { + cp1_mss_i2c_pins: mss-i2c-pins-0 { + marvell,pins = "mpp29", "mpp30"; + marvell,function = "mss_i2c"; + }; + cp1_spi1_pins: spi1-pins-0 { + marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + cp1_tdm0_pins: tdm0-pins-0 { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp5"; + marvell,function = "tdm"; + }; + /* BT */ + cp1_uart0_pins: uart0-pins-0 { + marvell,pins = "mpp6", "mpp7"; + marvell,function = "uart0"; + }; + /* HA */ + cp1_uart2_pins: uart2-pins-0 { + marvell,pins = "mpp8", "mpp11"; + marvell,function = "uart2"; + }; +}; + +/* DECT */ +&cp0_uart0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_uart0_pins>; +}; + +/* EXP2 */ +&cp0_uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_uart1_pins>; +}; + +/* EXP1 */ +&cp0_uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp0_uart2_pins>; +}; + +&cp1_tdm0 { + pinctrl-names = "default"; + pinctrl-0 = <&cp1_tdm0_pins>; + status = "okay"; + pclk-freq-mhz = <2>; +}; + +/* BT */ +&cp1_uart0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp1_uart0_pins>; +}; + +/* HA */ +&cp1_uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp1_uart2_pins>; +}; + +&cp1_trng { + /* secure TRNG on fbxgw7r */ + status = "foutu"; +}; + +&cp1_clk { + fbx,ignore-eip150; +}; --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r.dts 2021-03-04 13:20:57.010838855 +0100 @@ -0,0 +1,23 @@ +#include +#include + +#include "armada-8040.dtsi" + +#include "fbxgw7r-common.dtsi" + +/ { + model = "Freebox V7R Board"; + compatible = "freebox,fbxgw7r", "marvell,armada8040", + "marvell,armada-ap806-quad", "marvell,armada-ap806"; +}; + +&cp0_spi0 { + spi-panel@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "freebox,fbxgw7r-panel"; + reg = <1>; + spi-max-frequency = <(750 * 1000)>; + irq-gpio = <&cp0_gpio2 2 0>; + }; +}; --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_exp1_dsl_lte.dts 2021-03-04 13:20:57.010838855 +0100 @@ -0,0 +1,33 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "freebox,fbxgw7r"; + + fragment@0 { + target-path="/"; + __overlay__ { + fbxatm-remote@0 { + compatible = "freebox,fbxatm-remote"; + mac-address = [00 07 cb 00 00 fe]; + netdev-name = "bcmfbxatm0"; + remote-name = "bcm63xx_fbxxtm0"; + }; + }; + }; + + fragment@1 { + target = <&cp1_spi1>; + __overlay__ { + #address-cells = <0x1>; + #size-cells = <0x0>; + + exp1-flash@1 { + compatible = "m25p80"; + reg = <1>; + spi-max-frequency = <(1 * 1000 * 1000)>; + label = "exp1-spi-flash"; + }; + }; + }; +}; --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_exp1_ftth_p2p.dts 2021-03-04 13:20:57.010838855 +0100 @@ -0,0 +1,4 @@ +#undef USE_PHYLINK_SFP + +#define EXP_SLOT exp1 +#include "fbxgw7r_expX_ftth_p2p.dts" --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_exp1_test_module.dts 2021-03-04 13:20:57.010838855 +0100 @@ -0,0 +1,4 @@ +#define EXP_SLOT exp1 +#define EXP_SPI_FLASH_LABEL "exp1-spi-flash" +#define EXP_SPI_FLASH_CS 1 +#include "fbxgw7r_expX_test_module.dts" --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_exp2_ftth_p2p.dts 2021-03-04 13:20:57.010838855 +0100 @@ -0,0 +1,4 @@ +#undef USE_PHYLINK_SFP + +#define EXP_SLOT exp2 +#include "fbxgw7r_expX_ftth_p2p.dts" --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_exp2_ftth_pon.dts 2021-03-04 13:20:57.010838855 +0100 @@ -0,0 +1,13 @@ +#include + +/dts-v1/; +/plugin/; + +/ { + compatible = "freebox,fbxgw7r"; + fragment@0 { + target-path="/"; + __overlay__ { + }; + }; +}; --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_exp2_test_module.dts 2021-03-04 13:20:57.010838855 +0100 @@ -0,0 +1,4 @@ +#define EXP_SLOT exp2 +#define EXP_SPI_FLASH_LABEL "exp2-spi-flash" +#define EXP_SPI_FLASH_CS 0 +#include "fbxgw7r_expX_test_module.dts" --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_exp_common.dtsi 2021-03-04 13:20:57.014172187 +0100 @@ -0,0 +1,5 @@ +#define PASTER(x, y) x ## y +#define EVALUATOR(x, y) PASTER(x, y) +#define EXP_LABEL(name) EVALUATOR(EXP_SLOT, EVALUATOR(_, name)) +#define EXP_NODE_NAME(name) EVALUATOR(EXP_SLOT, EVALUATOR(-, name)) +#define ADDRESSIFY(addr) EVALUATOR(0x, addr) --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_expX_ftth_p2p.dts 2021-03-04 13:20:57.014172187 +0100 @@ -0,0 +1,156 @@ +#include + +#include "fbxgw7r_exp_common.dtsi" + +/dts-v1/; +/plugin/; + +/ { + compatible = "freebox,fbxgw7r"; + + fragment@0 { + target = <&EXP_LABEL(ext_i2c)>; + __overlay__ { + #address-cells = <0x1>; + #size-cells = <0x0>; + + // IO expander found only on P2P Fiber + // expansion board. + EXP_LABEL(gpio_extender): EXP_NODE_NAME(gpio_extender)@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + ngpios = <16>; + #gpio-cells = <2>; + gpio-line-names = "wan-sfp-pwren", /* 0 */ + "wan-sfp-pwrgood", /* 1 */ + "wan-sfp-txfault", /* 2 */ + "wan-sfp-txdisable", /* 3 */ + "wan-sfp-presence", /* 4 */ + "wan-sfp-rxlos", /* 5 */ + "wan-sfp-led", /* 6 */ + "wan-sfp-i2cen", /* 7 */ + "redriver-eqb", /* 8 */ + "redriver-fgb", /* 9 */ + "redriver-swb", /* 10 */ + "redriver-eqa", /* 11 */ + "redriver-fga", /* 12 */ + "redriver-swa", /* 13 */ + "redriver-mode", /* 14 */ + "redriver-enable"; /* 15 */ + }; + }; + }; + + fragment@1 { + target-path="/"; + __overlay__ { + EXP_NODE_NAME(ftth-p2p-fbxgpio) { + compatible = "fbx,fbxgpio"; + EXP_NODE_NAME(ftth-p2p-sfp-pwren) { + gpio = <&EXP_LABEL(gpio_extender) 0 0>; + output-low; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + EXP_NODE_NAME(ftth-p2p-sfp-pwrgood) { + gpio = <&EXP_LABEL(gpio_extender) 1 0>; + input; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + EXP_NODE_NAME(ftth-p2p-sfp-txfault) { + gpio = <&EXP_LABEL(gpio_extender) 2 0>; + input; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + EXP_NODE_NAME(ftth-p2p-sfp-txdis) { + gpio = <&EXP_LABEL(gpio_extender) 3 0>; + output-high; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + EXP_NODE_NAME(ftth-p2p-sfp-presence) { + gpio = <&EXP_LABEL(gpio_extender) 4 0>; + input; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + EXP_NODE_NAME(ftth-p2p-sfp-rxlos) { + gpio = <&EXP_LABEL(gpio_extender) 5 0>; + input; +#ifdef USE_PHYLINK_SFP + no-claim; +#endif + }; + EXP_NODE_NAME(ftth-p2p-sfp-link-led) { + gpio = <&EXP_LABEL(gpio_extender) 6 GPIO_ACTIVE_LOW>; + output-low; + }; + EXP_NODE_NAME(ftth-p2p-sfp-i2cen) { + gpio = <&EXP_LABEL(gpio_extender) 7 0>; + /* enable it by default, revisit later */ + output-high; + }; + + EXP_NODE_NAME(ftth-p2p-redriver-eqb) { + gpio = <&EXP_LABEL(gpio_extender) 8 0>; + output-high; + }; + EXP_NODE_NAME(ftth-p2p-redriver-fgb) { + gpio = <&EXP_LABEL(gpio_extender) 9 0>; + output-high; + }; + EXP_NODE_NAME(ftth-p2p-redriver-swb) { + gpio = <&EXP_LABEL(gpio_extender) 10 0>; + output-high; + }; + EXP_NODE_NAME(ftth-p2p-redriver-eqa) { + gpio = <&EXP_LABEL(gpio_extender) 11 0>; + output-high; + }; + EXP_NODE_NAME(ftth-p2p-redriver-fga) { + gpio = <&EXP_LABEL(gpio_extender) 12 0>; + output-high; + }; + EXP_NODE_NAME(ftth-p2p-redriver-swa) { + gpio = <&EXP_LABEL(gpio_extender) 13 0>; + output-high; + }; + EXP_NODE_NAME(ftth-p2p-redriver-mode) { + gpio = <&EXP_LABEL(gpio_extender) 14 0>; + output-low; + }; + EXP_NODE_NAME(ftth-p2p-redriver-en) { + gpio = <&EXP_LABEL(gpio_extender) 15 0>; + output-low; + }; + }; + }; + }; + +#ifdef USE_PHYLINK_SFP + fragment@2 { + target = <&EXP_LABEL(sfp)>; + __overlay__ { + status = "okay"; + compatible = "sff,sfp"; + i2c-bus = <&EXP_LABEL(ext_i2c)>; + maximum-power-milliwatt = <3000>; + los-gpios = <&EXP_LABEL(gpio_extender) 5 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&EXP_LABEL(gpio_extender) 4 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&EXP_LABEL(gpio_extender) 3 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&EXP_LABEL(gpio_extender) 2 GPIO_ACTIVE_HIGH>; + pwr-enable-gpios = <&EXP_LABEL(gpio_extender) 0 GPIO_ACTIVE_HIGH>; + }; + }; +#endif + + +}; --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/fbxgw7r_expX_test_module.dts 2021-03-04 13:20:57.014172187 +0100 @@ -0,0 +1,99 @@ +#include + +#include "fbxgw7r_exp_common.dtsi" + +/dts-v1/; +/plugin/; + +/ { + compatible = "freebox,fbxgw7r"; + + fragment@0 { + target = <&EXP_LABEL(ext_i2c)>; + __overlay__ { + #address-cells = <0x1>; + #size-cells = <0x0>; + + EXP_LABEL(gpio_extender): exp1@74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + ngpios = <16>; + #gpio-cells = <2>; + gpio-line-names = "sfp-pwren", /* 0 */ + "sfp-pwrgood", /* 1 */ + "sfp-txfault", /* 2 */ + "sfp-txdisable", /* 3 */ + "sfp-presence", /* 4 */ + "sfp-rxlos", /* 5 */ + "sfp-led", /* 6 */ + "sfp-i2cen", /* 7 */ + "", /* 8 */ + "", /* 9 */ + "", /* 10 */ + "", /* 11 */ + "", /* 12 */ + "", /* 13 */ + "", /* 14 */ + ""; /* 15 */ + }; + }; + }; + + fragment@1 { + target-path="/"; + __overlay__ { + EXP_NODE_NAME(test-module-fbxgpio) { + compatible = "fbx,fbxgpio"; + EXP_NODE_NAME(test-module-sfp-pwren) { + gpio = <&EXP_LABEL(gpio_extender) 0 0>; + output-low; + }; + EXP_NODE_NAME(test-module-sfp-pwrgood) { + gpio = <&EXP_LABEL(gpio_extender) 1 0>; + input; + }; + EXP_NODE_NAME(test-module-sfp-txfault) { + gpio = <&EXP_LABEL(gpio_extender) 2 0>; + input; + }; + EXP_NODE_NAME(test-module-sfp-txdis) { + gpio = <&EXP_LABEL(gpio_extender) 3 0>; + output-high; + }; + EXP_NODE_NAME(test-module-sfp-presence) { + gpio = <&EXP_LABEL(gpio_extender) 4 0>; + input; + }; + EXP_NODE_NAME(test-module-sfp-rxlos) { + gpio = <&EXP_LABEL(gpio_extender) 5 0>; + input; + }; + EXP_NODE_NAME(test-module-sfp-link-led) { + gpio = <&EXP_LABEL(gpio_extender) 6 GPIO_ACTIVE_LOW>; + output-low; + }; + EXP_NODE_NAME(test-module-sfp-i2cen) { + gpio = <&EXP_LABEL(gpio_extender) 7 0>; + /* enable it by default, revisit later */ + output-high; + }; + }; + }; + }; + + fragment@2 { + target = <&cp1_spi1>; + __overlay__ { + #address-cells = <0x1>; + #size-cells = <0x0>; + + EXP_NODE_NAME(flash)@1 { + compatible = "m25p80"; + reg = ; + spi-max-frequency = <(1 * 1000 * 1000)>; + label = EXP_SPI_FLASH_LABEL; + }; + }; + }; +}; --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/jbxgw7r.dts 2021-03-04 13:20:57.014172187 +0100 @@ -0,0 +1,114 @@ +#include +#include + +#include "armada-8040.dtsi" + +#define USE_PHYLINK_SFP + +#include "fbxgw7r-common.dtsi" + +/ { + model = "Freebox JaguarBox V7R Board"; + compatible = "freebox,jbxgw7r", "marvell,armada8040", + "marvell,armada-ap806-quad", "marvell,armada-ap806"; + + fbx7r-fbxgpio { + pos-sense { + gpio = <&io_expander0 7 0>; + input; + }; + }; +}; + + +&cp0_spi0 { + ssd1327@1 { + compatible = "solomon,ssd1327"; + status = "okay"; + reg = <1>; + spi-max-frequency = <(5 * 1000 * 1000)>; + ssd1327,width = <128>; + ssd1327,height = <128>; + ssd1327,rotate = <270>; + ssd1327,watchdog = <300>; + + ssd1327,data-select-gpio = <&cp1_gpio1 23 GPIO_ACTIVE_HIGH>; + ssd1327,vcc-gpio = <&cp0_gpio2 14 GPIO_ACTIVE_HIGH>; + ssd1327,reset-gpio = <&cp1_gpio1 21 0>; + ssd1327,init-sequence = "p32202"; + }; +}; + + +&cp0_i2c0 { + cap1066@28 { + /* SMSC cap1066 */ + compatible = "smsc,smsc_cap1066"; + reg = <0x28>; + keymap = ; + }; + + led1202@58 { + compatible = "st,led1202"; + reg = <0x58>; + + #address-cells = <1>; + #size-cells = <0>; + + blue@0 { + label = "front-d67-blue"; + reg = <0>; + }; + green@1 { + label = "front-d67-green"; + reg = <1>; + }; + red@2 { + label = "front-d67-red"; + reg = <2>; + }; + }; + + led1202@59 { + compatible = "st,led1202"; + reg = <0x59>; + + #address-cells = <1>; + #size-cells = <0>; + + blue@0 { + label = "rear-d1-red"; + reg = <0>; + }; + green@1 { + label = "rear-d1-green"; + reg = <1>; + }; + red@2 { + label = "rear-d1-blue"; + reg = <2>; + }; + }; +}; + +/* + * for routing comfort on the midplane, rx & tx lanes polarity is swapped + * on jbxgw7r's expansion 1 backplane serdes. + */ +&cp1_comphy5 { + rx-swap-polarity; + tx-swap-polarity; +}; + + +/* + * CP1 sata is completely unused on jbxgw7r. + */ +&cp1_sata0 { + status = "disabled"; +}; --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/jbxgw7r_exp1_ftth_p2p.dts 2021-03-04 13:20:57.014172187 +0100 @@ -0,0 +1,4 @@ +#define USE_PHYLINK_SFP + +#define EXP_SLOT exp1 +#include "fbxgw7r_expX_ftth_p2p.dts" --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/arch/arm64/boot/dts/marvell/jbxgw7r_exp2_ftth_p2p.dts 2021-03-04 13:20:57.014172187 +0100 @@ -0,0 +1,4 @@ +#define USE_PHYLINK_SFP + +#define EXP_SLOT exp2 +#include "fbxgw7r_expX_ftth_p2p.dts" --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/block/partitions/dt.c 2021-03-04 13:20:57.500838876 +0100 @@ -0,0 +1,205 @@ +#define PREFIX "dtparts" + +#include +#include +#include +#include "check.h" +#include "dt.h" + +/** + * match_one: - Determines if a string matches a simple pattern + * @s: the string to examine for presence of the pattern + * @p: the string containing the pattern + */ +static int match_one(char *s, const char *p) +{ + char *meta, *from, *to; + + while (1) { + int len = -1; + + meta = strchr(p, '%'); + if (!meta) + return strcmp(p, s) == 0; + + if (strncmp(p, s, meta-p)) + return 0; + + s += meta - p; + p = meta + 1; + + if (isdigit(*p)) + len = simple_strtoul(p, (char **) &p, 10); + else if (*p == '%') { + if (*s++ != '%') + return 0; + p++; + continue; + } + + from = s; + switch (*p++) { + case 's': { + size_t str_len = strlen(s); + + if (str_len == 0) + return 0; + if (len == -1 || len > str_len) + len = str_len; + to = s + len; + break; + } + case 'd': + simple_strtol(s, &to, 0); + goto num; + case 'u': + simple_strtoul(s, &to, 0); + goto num; + case 'o': + simple_strtoul(s, &to, 8); + goto num; + case 'x': + simple_strtoul(s, &to, 16); + + num: + if (to == from) + return 0; + break; + default: + return 0; + } + s = to; + } +} + +/* + * + */ +static struct device_node *find_first_parent_node(const struct device *ddev) +{ + while (ddev && !ddev->of_node) + ddev = ddev->parent; + + if (!ddev) + return NULL; + return ddev->of_node; +} + +/* + * + */ +int dt_partition(struct parsed_partitions *state) +{ + struct device *ddev = disk_to_dev(state->bdev->bd_disk); + struct device_node *np, *part_node, *pp; + u64 disk_size, last_end; + int nr_parts, i; + + /* find first parent device with a non null device tree + * node */ + np = find_first_parent_node(ddev); + if (!np) + return -1; + + part_node = NULL; + for_each_child_of_node(np, pp) { + char diskname[BDEVNAME_SIZE]; + const char *pattern; + + if (!of_device_is_compatible(pp, "fixed-partitions")) + continue; + + /* check device name match pattern */ + bdevname(state->bdev, diskname); + + if (of_property_read_string(pp, "disk-name", &pattern)) { + part_node = pp; + break; + } + + if (match_one(diskname, pattern)) { + part_node = pp; + break; + } + } + + if (!part_node) + return -1; + + /* First count the subnodes */ + nr_parts = 0; + for_each_child_of_node(part_node, pp) + nr_parts++; + + if (nr_parts == 0) + return 0; + + disk_size = get_capacity(state->bdev->bd_disk) << 9; + + last_end = 0; + i = 1; + for_each_child_of_node(part_node, pp) { + struct partition_meta_info *info; + char tmp[sizeof (info->volname) + 4]; + const __be32 *reg; + const char *partname; + int a_cells, s_cells; + u64 size, offset; + int len; + + reg = of_get_property(pp, "reg", &len); + if (!reg) { + pr_err("part %pOF (%pOF) missing reg property.\n", + pp, np); + return -1; + } + + a_cells = of_n_addr_cells(pp); + s_cells = of_n_size_cells(pp); + if (len / 4 != a_cells + s_cells) { + pr_err("ofpart partition %pOF (%pOF) " + "error parsing reg property.\n", + pp, np); + return -1; + } + + partname = of_get_property(pp, "label", &len); + if (!partname) + partname = of_get_property(pp, "name", &len); + + if (i >= state->limit) { + pr_err("too many partitions\n"); + return -1; + } + + offset = of_read_number(reg, a_cells); + if (offset == (u64)-1) { + offset = last_end; + } + + size = of_read_number(reg + a_cells, s_cells); + if (size == (u64)-1) + size = disk_size - offset; + + last_end = offset + size; + put_partition(state, i, offset >> 9, size >> 9); + + info = &state->parts[i].info; + strlcpy(info->volname, partname, sizeof (info->volname)); + state->parts[i].has_info = true; + + if (!IS_ENABLED(CONFIG_OF_PARTITION_IGNORE_RO) && + of_get_property(pp, "read-only", &len)) + state->parts[i].flags |= ADDPART_FLAG_RO; + + snprintf(tmp, sizeof(tmp), "(%s/%s)", + info->volname, + state->parts[i].flags ? "ro" : "rw"); + strlcat(state->pp_buf, tmp, PAGE_SIZE); + + i++; + } + + strlcat(state->pp_buf, "\n", PAGE_SIZE); + return 1; +} --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/block/partitions/dt.h 2021-03-04 13:20:57.500838876 +0100 @@ -0,0 +1 @@ +int dt_partition(struct parsed_partitions *); --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/config 2021-03-30 11:02:54.834283644 +0200 @@ -0,0 +1,4373 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm64 5.4.60 Kernel Configuration +# + +# +# Compiler: aarch64-linux-musl-gcc (freebox) 8.3.0 +# +CONFIG_CC_IS_GCC=y +CONFIG_GCC_VERSION=80300 +CONFIG_CLANG_VERSION=0 +CONFIG_CC_CAN_LINK=y +CONFIG_CC_HAS_ASM_GOTO=y +CONFIG_CC_HAS_ASM_INLINE=y +CONFIG_IRQ_WORK=y +CONFIG_BUILDTIME_EXTABLE_SORT=y +CONFIG_THREAD_INFO_IN_TASK=y + +# +# General setup +# +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="/opt/toolchains/aarch64-musl-1.1.21-gcc-8.3.0-binutils-2.32-gdb-7.12.1-2/bin/aarch64-linux-musl-" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_BUILD_SALT="" +CONFIG_DEFAULT_HOSTNAME="(none)" +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_CROSS_MEMORY_ATTACH is not set +# CONFIG_USELIB is not set +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +# CONFIG_GENERIC_IRQ_DEBUGFS is not set +# end of IRQ subsystem + +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y + +# +# Timers subsystem +# +CONFIG_TICK_ONESHOT=y +CONFIG_HZ_PERIODIC=y +# CONFIG_NO_HZ_IDLE is not set +# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +# end of Timers subsystem + +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_PREEMPT_COUNT=y + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_PSI is not set +# end of CPU/Task time and stats accounting + +# CONFIG_CPU_ISOLATION is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_RCU_EXPERT is not set +CONFIG_SRCU=y +CONFIG_TREE_SRCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_NEED_SEGCBLIST=y +# end of RCU Subsystem + +CONFIG_IKCONFIG=y +# CONFIG_IKCONFIG_PROC is not set +# CONFIG_IKHEADERS is not set +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +# CONFIG_FBX_DECRYPT_INITRD is not set +CONFIG_GENERIC_SCHED_CLOCK=y + +# +# Scheduler features +# +# end of Scheduler features + +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_CGROUPS=y +# CONFIG_MEMCG is not set +# CONFIG_BLK_CGROUP is not set +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CGROUP_PIDS is not set +# CONFIG_CGROUP_RDMA is not set +# CONFIG_CGROUP_FREEZER is not set +# CONFIG_CPUSETS is not set +# CONFIG_CGROUP_DEVICE is not set +# CONFIG_CGROUP_CPUACCT is not set +# CONFIG_CGROUP_PERF is not set +# CONFIG_CGROUP_DEBUG is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_NET_NS=y +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_INITRAMFS_FORCE is not set +# CONFIG_RD_GZIP is not set +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_BPF=y +CONFIG_EXPERT=y +CONFIG_MULTIUSER=y +# CONFIG_SGETMASK_SYSCALL is not set +# CONFIG_SYSFS_SYSCALL is not set +# CONFIG_SYSCTL_SYSCALL is not set +# CONFIG_FHANDLE is not set +CONFIG_POSIX_TIMERS=y +CONFIG_PRINTK=y +CONFIG_PRINTK_NMI=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_FUTEX_PI=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +# CONFIG_IO_URING is not set +CONFIG_ADVISE_SYSCALLS=y +CONFIG_MEMBARRIER=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_BASE_RELATIVE=y +# CONFIG_BPF_SYSCALL is not set +# CONFIG_USERFAULTFD is not set +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +# CONFIG_RSEQ is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +# CONFIG_PC104 is not set + +# +# Kernel Performance Events And Counters +# +CONFIG_PERF_EVENTS=y +# CONFIG_DEBUG_PERF_USE_VMALLOC is not set +# end of Kernel Performance Events And Counters + +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_PROFILING is not set +# end of General setup + +CONFIG_ARM64=y +CONFIG_64BIT=y +CONFIG_MMU=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_SMP=y +CONFIG_KERNEL_MODE_NEON=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_PROC_KCORE_TEXT=y + +# +# Platform selection +# +# CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AGILEX is not set +# CONFIG_ARCH_SUNXI is not set +# CONFIG_ARCH_ALPINE is not set +# CONFIG_ARCH_BCM2835 is not set +# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BCM63XX is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BITMAIN is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_K3 is not set +# CONFIG_ARCH_LAYERSCAPE is not set +# CONFIG_ARCH_LG1K is not set +# CONFIG_ARCH_HISI is not set +# CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +CONFIG_ARCH_MVEBU=y +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALTEK is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_ROCKCHIP is not set +# CONFIG_ARCH_SEATTLE is not set +# CONFIG_ARCH_STRATIX10 is not set +# CONFIG_ARCH_SYNQUACER is not set +# CONFIG_ARCH_TEGRA is not set +# CONFIG_ARCH_SPRD is not set +# CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_THUNDER2 is not set +# CONFIG_ARCH_UNIPHIER is not set +# CONFIG_ARCH_VEXPRESS is not set +# CONFIG_ARCH_XGENE is not set +# CONFIG_ARCH_ZX is not set +# CONFIG_ARCH_ZYNQMP is not set +# end of Platform selection + +# +# Kernel Features +# + +# +# ARM errata workarounds via the alternatives framework +# +# CONFIG_ARM64_ERRATUM_826319 is not set +# CONFIG_ARM64_ERRATUM_827319 is not set +# CONFIG_ARM64_ERRATUM_824069 is not set +# CONFIG_ARM64_ERRATUM_819472 is not set +# CONFIG_ARM64_ERRATUM_832075 is not set +CONFIG_ARM64_ERRATUM_834220=y +# CONFIG_ARM64_ERRATUM_843419 is not set +CONFIG_ARM64_ERRATUM_1024718=y +# CONFIG_ARM64_ERRATUM_1165522 is not set +# CONFIG_ARM64_ERRATUM_1286807 is not set +# CONFIG_ARM64_ERRATUM_1463225 is not set +CONFIG_ARM64_ERRATUM_1542419=y +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +# CONFIG_CAVIUM_ERRATUM_30115 is not set +# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set +# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set +# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set +# CONFIG_HISILICON_ERRATUM_161600802 is not set +# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set +# CONFIG_FUJITSU_ERRATUM_010001 is not set +# end of ARM errata workarounds via the alternatives framework + +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_16K_PAGES is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y +# CONFIG_ARM64_VA_BITS_48 is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PA_BITS=48 +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_SCHED_MC is not set +# CONFIG_SCHED_SMT is not set +CONFIG_NR_CPUS=4 +# CONFIG_HOTPLUG_CPU is not set +# CONFIG_NUMA is not set +CONFIG_HOLES_IN_ZONE=y +CONFIG_HZ_100=y +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +CONFIG_SCHED_HRTICK=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HW_PERF_EVENTS=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SECCOMP=y +# CONFIG_PARAVIRT is not set +# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +# CONFIG_KEXEC_FILE is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_XEN is not set +CONFIG_FORCE_MAX_ZONEORDER=11 +# CONFIG_UNMAP_KERNEL_AT_EL0 is not set +# CONFIG_HARDEN_BRANCH_PREDICTOR is not set +# CONFIG_HARDEN_EL2_VECTORS is not set +# CONFIG_ARM64_SSBD is not set +# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +# CONFIG_ARM64_TAGGED_ADDR_ABI is not set +# CONFIG_COMPAT is not set + +# +# ARMv8.1 architectural features +# +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_PAN=y +# CONFIG_ARM64_VHE is not set +# end of ARMv8.1 architectural features + +# +# ARMv8.2 architectural features +# +CONFIG_ARM64_UAO=y +# CONFIG_ARM64_PMEM is not set +# CONFIG_ARM64_RAS_EXTN is not set +# CONFIG_ARM64_CNP is not set +# end of ARMv8.2 architectural features + +# +# ARMv8.3 architectural features +# +# end of ARMv8.3 architectural features + +# CONFIG_ARM64_MODULE_PLTS is not set +# CONFIG_ARM64_PSEUDO_NMI is not set +# CONFIG_RANDOMIZE_BASE is not set +# end of Kernel Features + +# +# Boot options +# +CONFIG_CMDLINE="console=ttyS0,115200 earlycon=uart8250,mmio32,0xf0512000 maxcpus=4 root=/dev/nfs ip=:::::eth1.41:dhcp memtest=0 dhcpclass=linux-fbxgw7r" +CONFIG_CMDLINE_FORCE=y +# CONFIG_EFI is not set +# end of Boot options + +# +# Power management options +# +# CONFIG_SUSPEND is not set +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# end of Power management options + +# +# CPU Power Management +# + +# +# CPU Idle +# +# CONFIG_CPU_IDLE is not set +# end of CPU Idle + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set +# end of CPU Frequency scaling +# end of CPU Power Management + +# +# Firmware Drivers +# +# CONFIG_ARM_SDE_INTERFACE is not set +# CONFIG_FIRMWARE_MEMMAP is not set +# CONFIG_FW_CFG_SYSFS is not set +CONFIG_HAVE_ARM_SMCCC=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_GOOGLE_FIRMWARE is not set +CONFIG_EFI_EARLYCON=y + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_IRQFD=y +CONFIG_HAVE_KVM_IRQ_ROUTING=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_KVM_MMIO=y +CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y +CONFIG_KVM_VFIO=y +CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_HAVE_KVM_IRQ_BYPASS=y +CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=y +CONFIG_KVM_ARM_HOST=y +CONFIG_KVM_ARM_PMU=y +CONFIG_VHOST_NET=y +CONFIG_VHOST_VSOCK=y +CONFIG_VHOST=y +# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set +# CONFIG_ARM64_CRYPTO is not set + +# +# General architecture-dependent options +# +# CONFIG_KPROBES is not set +# CONFIG_JUMP_LABEL is not set +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y +CONFIG_HAVE_NMI=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_KEEPINITRD=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y +CONFIG_HAVE_ASM_MODVERSIONS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_STACKLEAK=y +CONFIG_HAVE_STACKPROTECTOR=y +CONFIG_CC_HAS_STACKPROTECTOR_NONE=y +# CONFIG_STACKPROTECTOR is not set +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_HAVE_ARCH_MMAP_RND_BITS=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y +CONFIG_HAVE_COPY_THREAD_TLS=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_64BIT_TIME=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_VMAP_STACK=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_STRICT_MODULE_RWX=y +CONFIG_REFCOUNT_FULL=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y +CONFIG_ARCH_USE_MEMREMAP_PROT=y +# CONFIG_LOCK_EVENT_COUNTS is not set + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +# end of GCOV-based kernel profiling + +CONFIG_PLUGIN_HOSTCC="g++" +CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_GCC_PLUGINS=y +# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set +# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set +# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set +# end of General architecture-dependent options + +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_MODULE_SIG is not set +# CONFIG_MODULE_COMPRESS is not set +# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_TRIM_UNUSED_KSYMS is not set +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_BLOCK=y +CONFIG_BLK_SCSI_REQUEST=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_DEV_ZONED is not set +# CONFIG_BLK_CMDLINE_PARSER is not set +# CONFIG_BLK_WBT is not set +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_SED_OPAL is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_AIX_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_CMDLINE_PARTITION is not set +CONFIG_OF_PARTITION=y +CONFIG_OF_PARTITION_IGNORE_RO=y +# end of Partition Types + +CONFIG_BLK_MQ_PCI=y + +# +# IO Schedulers +# +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +# CONFIG_IOSCHED_BFQ is not set +# end of IO Schedulers + +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +CONFIG_ELFCORE=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_BINFMT_SCRIPT=y +# CONFIG_BINFMT_MISC is not set +CONFIG_COREDUMP=y +# end of Executable file formats + +# +# Memory Management options +# +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_HAVE_FAST_GUP=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_COMPACTION is not set +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_MMU_NOTIFIER=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +# CONFIG_MEMORY_FAILURE is not set +# CONFIG_TRANSPARENT_HUGEPAGE is not set +# CONFIG_CLEANCACHE is not set +# CONFIG_CMA is not set +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +# CONFIG_ZSMALLOC is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set +# CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_PTE_DEVMAP=y +# CONFIG_PERCPU_STATS is not set +# CONFIG_GUP_BENCHMARK is not set +CONFIG_ARCH_HAS_PTE_SPECIAL=y +# end of Memory Management options + +CONFIG_NET=y +CONFIG_NET_INGRESS=y +CONFIG_NET_EGRESS=y +CONFIG_SKB_EXTENSIONS=y + +# +# Networking options +# +CONFIG_NETSKBPAD=64 +CONFIG_NET_NMESH_MBH=m +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +CONFIG_UNIX_SCM=y +CONFIG_UNIX_ABSTRACT_IGNORE_NETNS=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_TLS is not set +CONFIG_XFRM=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_INTERFACE=y +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +# CONFIG_IP_FIB_TRIE_STATS is not set +CONFIG_IP_MULTIPLE_TABLES=y +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +CONFIG_NET_IPGRE_DEMUX=y +CONFIG_NET_IP_TUNNEL=y +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_NET_IPVTI is not set +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +# CONFIG_INET_ESP_OFFLOAD is not set +# CONFIG_INET_IPCOMP is not set +CONFIG_INET_TUNNEL=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_INET_UDP_DIAG is not set +# CONFIG_INET_RAW_DIAG is not set +# CONFIG_INET_DIAG_DESTROY is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +# CONFIG_INET6_ESP_OFFLOAD is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_IPV6_ILA is not set +CONFIG_INET6_TUNNEL=y +# CONFIG_IPV6_VTI is not set +CONFIG_IPV6_SIT=y +CONFIG_IPV6_SIT_6RD=y +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=y +# CONFIG_IPV6_GRE is not set +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +# CONFIG_IPV6_MROUTE is not set +# CONFIG_IPV6_SEG6_LWTUNNEL is not set +# CONFIG_IPV6_SEG6_HMAC is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +# CONFIG_BRIDGE_NETFILTER is not set + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_INGRESS is not set +# CONFIG_NETFILTER_NETLINK_ACCT is not set +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NETFILTER_NETLINK_OSF is not set +CONFIG_NF_CONNTRACK=y +CONFIG_NF_LOG_COMMON=y +# CONFIG_NF_LOG_NETDEV is not set +CONFIG_NF_CONNTRACK_MARK=y +# CONFIG_NF_CONNTRACK_ZONES is not set +CONFIG_NF_CONNTRACK_PROCFS=y +# CONFIG_NF_CONNTRACK_EVENTS is not set +# CONFIG_NF_CONNTRACK_TIMEOUT is not set +# CONFIG_NF_CONNTRACK_TIMESTAMP is not set +# CONFIG_NF_CONNTRACK_LABELS is not set +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_GRE=y +CONFIG_NF_CT_PROTO_SCTP=y +# CONFIG_NF_CT_PROTO_UDPLITE is not set +# CONFIG_NF_CONNTRACK_AMANDA is not set +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set +# CONFIG_NF_CONNTRACK_SNMP is not set +CONFIG_NF_CONNTRACK_PPTP=m +# CONFIG_NF_CONNTRACK_SANE is not set +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=y +# CONFIG_NF_CT_NETLINK is not set +CONFIG_NF_NAT=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_SIP=m +CONFIG_NF_NAT_TFTP=y +CONFIG_NF_NAT_REDIRECT=y +CONFIG_NF_NAT_MASQUERADE=y +# CONFIG_NF_TABLES is not set +CONFIG_NETFILTER_XTABLES=y + +# +# Xtables combined modules +# +CONFIG_NETFILTER_XT_MARK=y +CONFIG_NETFILTER_XT_CONNMARK=y + +# +# Xtables targets +# +# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set +# CONFIG_NETFILTER_XT_TARGET_CHECKSUM is not set +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CT=y +CONFIG_NETFILTER_XT_TARGET_DSCP=y +# CONFIG_NETFILTER_XT_TARGET_HL is not set +# CONFIG_NETFILTER_XT_TARGET_HMARK is not set +# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set +# CONFIG_NETFILTER_XT_TARGET_LED is not set +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_NAT=y +# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +CONFIG_NETFILTER_XT_TARGET_REDIRECT=y +CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y +# CONFIG_NETFILTER_XT_TARGET_TEE is not set +CONFIG_NETFILTER_XT_TARGET_TPROXY=y +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set + +# +# Xtables matches +# +# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_BPF is not set +# CONFIG_NETFILTER_XT_MATCH_CGROUP is not set +# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +# CONFIG_NETFILTER_XT_MATCH_CPU is not set +CONFIG_NETFILTER_XT_MATCH_DCCP=y +# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set +CONFIG_NETFILTER_XT_MATCH_DSCP=y +# CONFIG_NETFILTER_XT_MATCH_ECN is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +CONFIG_NETFILTER_XT_MATCH_HL=y +# CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set +# CONFIG_NETFILTER_XT_MATCH_OSF is not set +CONFIG_NETFILTER_XT_MATCH_OWNER=y +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_RECENT is not set +CONFIG_NETFILTER_XT_MATCH_SCTP=y +# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set +CONFIG_NETFILTER_XT_MATCH_STATE=y +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# end of Core Netfilter Configuration + +# CONFIG_IP_SET is not set +# CONFIG_IP_VS is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_FFN=y +CONFIG_IP_FFN_PROCFS=y +CONFIG_NF_DEFRAG_IPV4=y +# CONFIG_NF_SOCKET_IPV4 is not set +CONFIG_NF_TPROXY_IPV4=y +# CONFIG_NF_DUP_IPV4 is not set +# CONFIG_NF_LOG_ARP is not set +CONFIG_NF_LOG_IPV4=y +CONFIG_NF_REJECT_IPV4=y +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_IP_NF_IPTABLES=y +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_RPFILTER is not set +# CONFIG_IP_NF_MATCH_TTL is not set +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +# CONFIG_IP_NF_TARGET_SYNPROXY is not set +CONFIG_IP_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +# CONFIG_IP_NF_TARGET_NETMAP is not set +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +# CONFIG_IP_NF_TARGET_CLUSTERIP is not set +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set +# end of IP: Netfilter Configuration + +# +# IPv6: Netfilter Configuration +# +CONFIG_IPV6_FFN=y +CONFIG_IPV6_FFN_PROCFS=y +# CONFIG_NF_SOCKET_IPV6 is not set +CONFIG_NF_TPROXY_IPV6=y +# CONFIG_NF_DUP_IPV6 is not set +CONFIG_NF_REJECT_IPV6=y +CONFIG_NF_LOG_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_EUI64 is not set +# CONFIG_IP6_NF_MATCH_FRAG is not set +# CONFIG_IP6_NF_MATCH_OPTS is not set +# CONFIG_IP6_NF_MATCH_HL is not set +# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set +# CONFIG_IP6_NF_MATCH_MH is not set +CONFIG_IP6_NF_MATCH_RPFILTER=y +# CONFIG_IP6_NF_MATCH_RT is not set +# CONFIG_IP6_NF_MATCH_SRH is not set +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +# CONFIG_IP6_NF_TARGET_SYNPROXY is not set +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_IP6_NF_NAT=y +CONFIG_IP6_NF_TARGET_MASQUERADE=y +# CONFIG_IP6_NF_TARGET_NPT is not set +# end of IPv6: Netfilter Configuration + +CONFIG_NF_DEFRAG_IPV6=y +# CONFIG_NF_CONNTRACK_BRIDGE is not set +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_BPFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +CONFIG_FBXATM=y +CONFIG_FBXATM_REMOTE=y +CONFIG_FBXATM_STACK=y +# CONFIG_FBXATM_REMOTE_STUB is not set +CONFIG_FBXATM_REMOTE_DRIVER=y +CONFIG_FBXBRIDGE=y +CONFIG_STP=y +CONFIG_BRIDGE=y +# CONFIG_BRIDGE_IGMP_SNOOPING is not set +# CONFIG_BRIDGE_VLAN_FILTERING is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_NET_DSA is not set +CONFIG_VLAN_8021Q=y +# CONFIG_VLAN_8021Q_GVRP is not set +# CONFIG_VLAN_8021Q_MVRP is not set +# CONFIG_DECNET is not set +CONFIG_LLC=y +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_6LOWPAN is not set +# CONFIG_IEEE802154 is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_SCH_MULTIQ=y +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFB is not set +CONFIG_NET_SCH_SFQ=y +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_CBS is not set +# CONFIG_NET_SCH_ETF is not set +# CONFIG_NET_SCH_TAPRIO is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +CONFIG_NET_SCH_DRR=y +# CONFIG_NET_SCH_MQPRIO is not set +# CONFIG_NET_SCH_SKBPRIO is not set +# CONFIG_NET_SCH_CHOKE is not set +# CONFIG_NET_SCH_QFQ is not set +# CONFIG_NET_SCH_CODEL is not set +CONFIG_NET_SCH_FQ_CODEL=y +# CONFIG_NET_SCH_CAKE is not set +# CONFIG_NET_SCH_FQ is not set +# CONFIG_NET_SCH_HHF is not set +# CONFIG_NET_SCH_PIE is not set +CONFIG_NET_SCH_INGRESS=y +# CONFIG_NET_SCH_PLUG is not set +# CONFIG_NET_SCH_DEFAULT is not set + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +CONFIG_NET_CLS_U32=y +# CONFIG_CLS_U32_PERF is not set +CONFIG_CLS_U32_MARK=y +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_CLS_CGROUP is not set +# CONFIG_NET_CLS_BPF is not set +# CONFIG_NET_CLS_FLOWER is not set +# CONFIG_NET_CLS_MATCHALL is not set +# CONFIG_NET_EMATCH is not set +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=y +# CONFIG_NET_ACT_GACT is not set +# CONFIG_NET_ACT_MIRRED is not set +# CONFIG_NET_ACT_SAMPLE is not set +# CONFIG_NET_ACT_IPT is not set +# CONFIG_NET_ACT_NAT is not set +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +CONFIG_NET_ACT_SKBEDIT=y +# CONFIG_NET_ACT_CSUM is not set +# CONFIG_NET_ACT_MPLS is not set +# CONFIG_NET_ACT_VLAN is not set +# CONFIG_NET_ACT_BPF is not set +# CONFIG_NET_ACT_CONNMARK is not set +# CONFIG_NET_ACT_CTINFO is not set +# CONFIG_NET_ACT_SKBMOD is not set +# CONFIG_NET_ACT_IFE is not set +# CONFIG_NET_ACT_TUNNEL_KEY is not set +# CONFIG_NET_ACT_CT is not set +# CONFIG_NET_TC_SKB_EXT is not set +CONFIG_NET_SCH_FIFO=y +# CONFIG_DCB is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +CONFIG_VSOCKETS=y +# CONFIG_VSOCKETS_DIAG is not set +CONFIG_VIRTIO_VSOCKETS_COMMON=y +# CONFIG_NETLINK_DIAG is not set +# CONFIG_MPLS is not set +# CONFIG_NET_NSH is not set +# CONFIG_HSR is not set +# CONFIG_NET_SWITCHDEV is not set +# CONFIG_NET_L3_MASTER_DEV is not set +# CONFIG_NET_NCSI is not set +CONFIG_RPS=y +CONFIG_RFS_ACCEL=y +CONFIG_XPS=y +# CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y +CONFIG_BPF_JIT=y +CONFIG_NET_FLOW_LIMIT=y + +# +# Network testing +# +CONFIG_NET_PKTGEN=y +# end of Network testing +# end of Networking options + +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_AF_KCM is not set +CONFIG_FIB_RULES=y +CONFIG_WIRELESS=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set +CONFIG_CFG80211_CERTIFICATION_ONUS=y +# CONFIG_CFG80211_REQUIRE_SIGNED_REGDB is not set +# CONFIG_CFG80211_REG_CELLULAR_HINTS is not set +# CONFIG_CFG80211_REG_RELAX_NO_IR is not set +CONFIG_CFG80211_DEFAULT_PS=y +# CONFIG_CFG80211_DEBUGFS is not set +CONFIG_CFG80211_CRDA_SUPPORT=y +# CONFIG_CFG80211_WEXT is not set +CONFIG_MAC80211=y +CONFIG_MAC80211_HAS_RC=y +CONFIG_MAC80211_RC_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y +CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_MESSAGE_TRACING is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +# CONFIG_PSAMPLE is not set +# CONFIG_NET_IFE is not set +# CONFIG_LWTUNNEL is not set +CONFIG_DST_CACHE=y +CONFIG_GRO_CELLS=y +# CONFIG_FAILOVER is not set +CONFIG_HAVE_EBPF_JIT=y + +# +# Device Drivers +# +CONFIG_ARM_AMBA=y +CONFIG_HAVE_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIEAER is not set +# CONFIG_PCIEASPM is not set +# CONFIG_PCIE_PTM is not set +# CONFIG_PCIE_BW is not set +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_QUIRKS=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCI_STUB is not set +# CONFIG_PCI_IOV is not set +# CONFIG_PCI_PRI is not set +# CONFIG_PCI_PASID is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# PCI controller drivers +# +# CONFIG_PCI_AARDVARK is not set + +# +# Cadence PCIe controllers support +# +# CONFIG_PCIE_CADENCE_HOST is not set +# end of Cadence PCIe controllers support + +# CONFIG_PCI_FTPCI100 is not set +# CONFIG_PCI_HOST_GENERIC is not set +# CONFIG_PCIE_XILINX is not set +# CONFIG_PCI_XGENE is not set +# CONFIG_PCIE_ALTERA is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set + +# +# DesignWare PCI Core Support +# +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCIE_DW_PLAT_HOST is not set +# CONFIG_PCI_HISI is not set +CONFIG_PCIE_ARMADA_8K=y +# CONFIG_PCIE_KIRIN is not set +# CONFIG_PCI_MESON is not set +# CONFIG_PCIE_AL is not set +# end of DesignWare PCI Core Support +# end of PCI controller drivers + +# +# PCI Endpoint +# +# CONFIG_PCI_ENDPOINT is not set +# end of PCI Endpoint + +# +# PCI switch controller drivers +# +# CONFIG_PCI_SW_SWITCHTEC is not set +# end of PCI switch controller drivers + +# CONFIG_PCCARD is not set +# CONFIG_RAPIDIO is not set + +# +# Generic Driver Options +# +# CONFIG_UEVENT_HELPER is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y + +# +# Firmware loader +# +CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_LOADER_USER_HELPER=y +CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y +# CONFIG_FW_LOADER_COMPRESS is not set +# end of Firmware loader + +CONFIG_WANT_DEV_COREDUMP=y +# CONFIG_ALLOW_DEV_COREDUMP is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +# CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_FENCE_TRACE is not set +CONFIG_GENERIC_ARCH_TOPOLOGY=y +# end of Generic Driver Options + +# +# Bus devices +# +# CONFIG_BRCMSTB_GISB_ARB is not set +# CONFIG_MOXTET is not set +# CONFIG_VEXPRESS_CONFIG is not set +# end of Bus devices + +# CONFIG_CONNECTOR is not set +# CONFIG_GNSS is not set +CONFIG_FREEBOX_PROCFS=y +CONFIG_MTD=y +# CONFIG_MTD_TESTS is not set +CONFIG_MTD_ERASE_PRINTK=y + +# +# Partition parsers +# +# CONFIG_MTD_AR7_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_OF_PARTS_IGNORE_RO is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_FBX6HD_PARTS is not set +# end of Partition parsers + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set +# CONFIG_MTD_PARTITIONED_MASTER is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# end of RAM/ROM/Flash chip drivers + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set +# end of Mapping drivers for chip access + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# end of Self-contained MTD device drivers + +# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_RAW_NAND is not set +# CONFIG_MTD_SPI_NAND is not set + +# +# LPDDR & LPDDR2 PCM memory drivers +# +# CONFIG_MTD_LPDDR is not set +# end of LPDDR & LPDDR2 PCM memory drivers + +CONFIG_MTD_SPI_NOR=y +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set +# CONFIG_SPI_CADENCE_QUADSPI is not set +# CONFIG_SPI_MTK_QUADSPI is not set +# CONFIG_MTD_UBI is not set +# CONFIG_MTD_HYPERBUS is not set +CONFIG_DTC=y +CONFIG_OF=y +# CONFIG_OF_UNITTEST is not set +CONFIG_OF_DTB_BUILTIN_LIST="" +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_KOBJ=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MDIO=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OF_RESOLVE=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_CONFIGFS=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_NULL_BLK is not set +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_DEV_UMEM is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_DRBD is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SKD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=65536 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set + +# +# NVME Support +# +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TARGET is not set +# end of NVME Support + +# +# Misc devices +# +# CONFIG_WINTEGRA_MMAP is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_INTELCE_PIC16PMU is not set +CONFIG_FBXSERIAL_OF=y +# CONFIG_RANDOM_OF is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_PCI_ENDPOINT_TEST is not set +# CONFIG_XILINX_SDFEC is not set +# CONFIG_PVPANIC is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=m +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_EEPROM_93XX46 is not set +# CONFIG_EEPROM_IDT_89HPESX is not set +# CONFIG_EEPROM_EE1004 is not set +CONFIG_EEPROM_EE1004_RAW=y +# end of EEPROM support + +# CONFIG_CB710_CORE is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set +# end of Texas Instruments shared transport line discipline + +# CONFIG_SENSORS_LIS3_SPI is not set +# CONFIG_SENSORS_LIS3_I2C is not set +# CONFIG_ALTERA_STAPL is not set + +# +# Intel MIC & related support +# + +# +# Intel MIC Bus Driver +# + +# +# SCIF Bus Driver +# + +# +# VOP Bus Driver +# +# CONFIG_VOP_BUS is not set + +# +# Intel MIC Host Driver +# + +# +# Intel MIC Card Driver +# + +# +# SCIF Driver +# + +# +# Intel MIC Coprocessor State Management (COSM) Drivers +# + +# +# VOP Driver +# +# end of Intel MIC & related support + +# CONFIG_GENWQE is not set +# CONFIG_ECHO is not set +# CONFIG_MISC_ALCOR_PCI is not set +# CONFIG_MISC_RTSX_PCI is not set +# CONFIG_MISC_RTSX_USB is not set +# CONFIG_HABANA_AI is not set + +# +# RemoTI support +# +# end of RemoTI support + +# +# HDMI CEC support +# +# CONFIG_HDMI_CEC is not set +# end of HDMI CEC support +# end of Misc devices + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +CONFIG_SCSI_SCAN_ASYNC=y + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# end of SCSI Transports + +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_DH is not set +# end of SCSI device support + +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_ATA=y +CONFIG_ATA_VERBOSE_ERROR=y +CONFIG_SATA_PMP=y + +# +# Controllers with non-SFF native interface +# +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_AHCI_PLATFORM is not set +# CONFIG_AHCI_CEVA is not set +CONFIG_AHCI_MVEBU=m +# CONFIG_AHCI_QORIQ is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set +# CONFIG_ATA_SFF is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +# CONFIG_MD_AUTODETECT is not set +# CONFIG_MD_LINEAR is not set +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +CONFIG_MD_RAID10=y +CONFIG_MD_RAID456=y +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set +# CONFIG_BCACHE is not set +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_UNSTRIPED is not set +CONFIG_DM_CRYPT=y +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_THIN_PROVISIONING is not set +# CONFIG_DM_CACHE is not set +# CONFIG_DM_WRITECACHE is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_CLONE is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_RAID is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_DUST is not set +# CONFIG_DM_INIT is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_FLAKEY is not set +# CONFIG_DM_VERITY is not set +# CONFIG_DM_SWITCH is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_DM_INTEGRITY is not set +# CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# end of IEEE 1394 (FireWire) support + +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +CONFIG_DUMMY=y +# CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set +# CONFIG_IFB is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_IPVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_GENEVE is not set +# CONFIG_GTP is not set +# CONFIG_MACSEC is not set +# CONFIG_NETCONSOLE is not set +CONFIG_TUN=y +# CONFIG_TUN_VNET_CROSS_LE is not set +CONFIG_VETH=y +# CONFIG_NLMON is not set +# CONFIG_VSOCKMON is not set +# CONFIG_ARCNET is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# end of Distributed Switch Architecture drivers + +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_VENDOR_ADAPTEC is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ATHEROS is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HP is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_JME is not set +CONFIG_NET_VENDOR_MARVELL=y +CONFIG_MVMDIO=y +# CONFIG_MVNETA is not set +CONFIG_MVPP2=y +CONFIG_MVPP2_FBX_FF=y +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_OCTEONTX2_AF is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_MYRI is not set +# CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETERION is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +# CONFIG_ETHOC is not set +# CONFIG_NET_VENDOR_PACKET_ENGINES is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BCM_UNIMAC is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_MDIO_BUS_MUX_GPIO is not set +# CONFIG_MDIO_BUS_MUX_MMIOREG is not set +# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set +# CONFIG_MDIO_HISI_FEMAC is not set +CONFIG_MDIO_I2C=y +# CONFIG_MDIO_MSCC_MIIM is not set +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_THUNDER is not set +CONFIG_PHYLINK=y +CONFIG_PHYLIB=y +CONFIG_SWPHY=y +# CONFIG_LED_TRIGGER_PHY is not set + +# +# MII PHY device drivers +# +CONFIG_SFP=y +# CONFIG_ADIN_PHY is not set +# CONFIG_AMD_PHY is not set +# CONFIG_AQUANTIA_PHY is not set +# CONFIG_AX88796B_PHY is not set +# CONFIG_AT803X_PHY is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_BCM87XX_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_CORTINA_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_DP83822_PHY is not set +# CONFIG_DP83TC811_PHY is not set +# CONFIG_DP83848_PHY is not set +# CONFIG_DP83867_PHY is not set +CONFIG_FIXED_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_INTEL_XWAY_PHY is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_MARVELL_PHY is not set +# CONFIG_MARVELL_10G_PHY is not set +# CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_PHY is not set +# CONFIG_MICROCHIP_T1_PHY is not set +# CONFIG_MICROSEMI_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_RENESAS_PHY is not set +# CONFIG_ROCKCHIP_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_TERANETICS_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_XILINX_GMII2RGMII is not set +# CONFIG_MICREL_KS8995MA is not set +CONFIG_PPP=y +# CONFIG_PPP_BSDCOMP is not set +# CONFIG_PPP_DEFLATE is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_MPPE=y +# CONFIG_PPP_MULTILINK is not set +CONFIG_PPPOE=y +CONFIG_PPTP=y +# CONFIG_PPP_ASYNC is not set +# CONFIG_PPP_SYNC_TTY is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=y +CONFIG_USB_NET_DRIVERS=y +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_RTL8152 is not set +# CONFIG_USB_LAN78XX is not set +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_AX8817X is not set +# CONFIG_USB_NET_AX88179_178A is not set +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +# CONFIG_USB_NET_CDC_NCM is not set +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +# CONFIG_USB_NET_NET1080 is not set +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +# CONFIG_USB_NET_CX82310_ETH is not set +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set +# CONFIG_USB_NET_AQC111 is not set +CONFIG_WLAN=y +# CONFIG_WIRELESS_WDS is not set +# CONFIG_WLAN_VENDOR_ADMTEK is not set +CONFIG_ATH_COMMON=y +CONFIG_WLAN_VENDOR_ATH=y +# CONFIG_ATH_DEBUG is not set +CONFIG_ATH_REG_IGNORE=y +# CONFIG_ATH_REG_DYNAMIC_USER_REG_HINTS is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +# CONFIG_ATH9K is not set +# CONFIG_ATH9K_HTC is not set +# CONFIG_CARL9170 is not set +# CONFIG_ATH6KL is not set +# CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set +CONFIG_ATH10K=y +CONFIG_ATH10K_CE=y +CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set +# CONFIG_ATH10K_SDIO is not set +# CONFIG_ATH10K_USB is not set +CONFIG_ATH10K_DEBUG=y +CONFIG_ATH10K_DEBUGFS=y +# CONFIG_ATH10K_SPECTRAL is not set +CONFIG_ATH10K_DFS_CERTIFIED=y +# CONFIG_WCN36XX is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set +# CONFIG_WLAN_VENDOR_BROADCOM is not set +# CONFIG_WLAN_VENDOR_CISCO is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +# CONFIG_WLAN_VENDOR_INTERSIL is not set +CONFIG_WLAN_VENDOR_MARVELL=y +# CONFIG_LIBERTAS is not set +# CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_MWIFIEX is not set +CONFIG_MWL8K=m +# CONFIG_MWL8K_NEW is not set +# CONFIG_WLAN_VENDOR_MEDIATEK is not set +# CONFIG_WLAN_VENDOR_RALINK is not set +# CONFIG_WLAN_VENDOR_REALTEK is not set +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +CONFIG_WLAN_VENDOR_QUANTENNA=y +# CONFIG_QTNFMAC_PCIE is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_VIRT_WIFI is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set +# CONFIG_NETDEVSIM is not set +# CONFIG_NET_FAILOVER is not set +# CONFIG_ISDN is not set +# CONFIG_NVM is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_LEDS is not set +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_SPARSEKMAP is not set +# CONFIG_INPUT_MATRIXKMAP is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_AD714X is not set +# CONFIG_INPUT_ATMEL_CAPTOUCH is not set +# CONFIG_INPUT_BMA150 is not set +# CONFIG_INPUT_E3X0_BUTTON is not set +# CONFIG_INPUT_MSM_VIBRATOR is not set +# CONFIG_INPUT_MMA8450 is not set +# CONFIG_INPUT_GP2A is not set +# CONFIG_INPUT_GPIO_BEEPER is not set +# CONFIG_INPUT_GPIO_DECODER is not set +# CONFIG_INPUT_GPIO_VIBRA is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_KXTJ9 is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +# CONFIG_INPUT_UINPUT is not set +# CONFIG_INPUT_PCF8574 is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +# CONFIG_INPUT_ADXL34X is not set +# CONFIG_INPUT_IMS_PCU is not set +# CONFIG_INPUT_CMA3000 is not set +# CONFIG_INPUT_DRV260X_HAPTICS is not set +# CONFIG_INPUT_DRV2665_HAPTICS is not set +# CONFIG_INPUT_DRV2667_HAPTICS is not set +CONFIG_INPUT_SMSC_CAP1066=m +# CONFIG_RMI4_CORE is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set +# end of Hardware I/O ports +# end of Input device support + +# +# Character devices +# +CONFIG_TTY=y +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +# CONFIG_NULL_TTY is not set +CONFIG_LDISC_AUTOLOAD=y +CONFIG_DEVMEM=y +# CONFIG_DEVPHYSMEM is not set + +# +# Serial drivers +# +CONFIG_SERIAL_EARLYCON=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +# CONFIG_SERIAL_8250_FINTEK is not set +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=6 +CONFIG_SERIAL_8250_RUNTIME_UARTS=6 +# CONFIG_SERIAL_8250_EXTENDED is not set +# CONFIG_SERIAL_8250_ASPEED_VUART is not set +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_DW=y +# CONFIG_SERIAL_8250_RT288X is not set +CONFIG_SERIAL_OF_PLATFORM=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +# CONFIG_SERIAL_AMBA_PL011 is not set +# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_SIFIVE is not set +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_FSL_LINFLEXUART is not set +# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set +# CONFIG_SERIAL_MVEBU_UART is not set +# end of Serial drivers + +CONFIG_SERIAL_MCTRL_GPIO=y +# CONFIG_SERIAL_DEV_BUS is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +CONFIG_HW_RANDOM_OMAP=y +# CONFIG_HW_RANDOM_CAVIUM is not set +# CONFIG_HW_RANDOM_OPTEE is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_DEVPORT is not set +# CONFIG_XILLYBUS is not set +# end of Character devices + +# CONFIG_RANDOM_TRUST_BOOTLOADER is not set + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y + +# +# Multiplexer I2C Chip support +# +# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set +CONFIG_I2C_MUX_GPIO=y +# CONFIG_I2C_MUX_GPMUX is not set +# CONFIG_I2C_MUX_LTC4306 is not set +# CONFIG_I2C_MUX_PCA9541 is not set +# CONFIG_I2C_MUX_PCA954x is not set +# CONFIG_I2C_MUX_PINCTRL is not set +# CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set +# CONFIG_I2C_MUX_MLXCPLD is not set +# end of Multiplexer I2C Chip support + +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_NVIDIA_GPU is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CADENCE is not set +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EMEV2 is not set +CONFIG_I2C_GPIO=y +# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set +CONFIG_I2C_MV64XXX=y +# CONFIG_I2C_NOMADIK is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA is not set +# CONFIG_I2C_RK3X is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_THUNDERX is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_ROBOTFUZZ_OSIF is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# end of I2C Hardware Bus support + +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# end of I2C support + +# CONFIG_I3C is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +# CONFIG_SPI_ARMADA_3700 is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_DESIGNWARE is not set +# CONFIG_SPI_NXP_FLEXSPI is not set +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_OC_TINY is not set +CONFIG_SPI_ORION=y +# CONFIG_SPI_PL022 is not set +# CONFIG_SPI_PXA2XX is not set +# CONFIG_SPI_ROCKCHIP is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_SIFIVE is not set +# CONFIG_SPI_MXIC is not set +# CONFIG_SPI_THUNDERX is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI_SLAVE is not set +# CONFIG_SPMI is not set +# CONFIG_HSI is not set +# CONFIG_PPS is not set + +# +# PTP clock support +# +# CONFIG_PTP_1588_CLOCK is not set + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +# end of PTP clock support + +CONFIG_PINCTRL=y +CONFIG_PINMUX=y +CONFIG_PINCONF=y +CONFIG_GENERIC_PINCONF=y +# CONFIG_DEBUG_PINCTRL is not set +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_MCP23S08 is not set +# CONFIG_PINCTRL_SINGLE is not set +# CONFIG_PINCTRL_SX150X is not set +# CONFIG_PINCTRL_STMFX is not set +# CONFIG_PINCTRL_OCELOT is not set +CONFIG_PINCTRL_MVEBU=y +CONFIG_PINCTRL_ARMADA_AP806=y +CONFIG_PINCTRL_ARMADA_CP110=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_FASTPATH_LIMIT=512 +CONFIG_OF_GPIO=y +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_DEBUG_GPIO is not set +CONFIG_GPIO_SYSFS=y + +# +# Memory mapped GPIO drivers +# +# CONFIG_GPIO_74XX_MMIO is not set +# CONFIG_GPIO_ALTERA is not set +# CONFIG_GPIO_CADENCE is not set +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_FTGPIO010 is not set +# CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRGPIO is not set +# CONFIG_GPIO_HLWD is not set +# CONFIG_GPIO_MB86S7X is not set +CONFIG_GPIO_MVEBU=y +# CONFIG_GPIO_PL061 is not set +# CONFIG_GPIO_SAMA5D2_PIOBU is not set +# CONFIG_GPIO_SYSCON is not set +# CONFIG_GPIO_XGENE is not set +# CONFIG_GPIO_XILINX is not set +# CONFIG_GPIO_AMD_FCH is not set +# end of Memory mapped GPIO drivers + +# +# I2C GPIO expanders +# +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set +# CONFIG_GPIO_GW_PLD is not set +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_PCA953X=y +# CONFIG_GPIO_PCA953X_IRQ is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_TPIC2810 is not set +# end of I2C GPIO expanders + +# +# MFD GPIO expanders +# +# end of MFD GPIO expanders + +# +# PCI GPIO expanders +# +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_PCI_IDIO_16 is not set +# CONFIG_GPIO_PCIE_IDIO_24 is not set +# CONFIG_GPIO_RDC321X is not set +# end of PCI GPIO expanders + +# +# SPI GPIO expanders +# +# CONFIG_GPIO_74X164 is not set +# CONFIG_GPIO_MAX3191X is not set +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_XRA1403 is not set +# end of SPI GPIO expanders + +# +# USB GPIO expanders +# +# end of USB GPIO expanders + +# CONFIG_GPIO_MOCKUP is not set +CONFIG_FREEBOX_GPIO=y +CONFIG_FREEBOX_GPIO_DT=y +CONFIG_FREEBOX_JTAG=m +# CONFIG_W1 is not set +# CONFIG_POWER_AVS is not set +CONFIG_POWER_RESET=y +# CONFIG_POWER_RESET_BRCMSTB is not set +# CONFIG_POWER_RESET_GPIO is not set +# CONFIG_POWER_RESET_GPIO_RESTART is not set +# CONFIG_POWER_RESET_LTC2952 is not set +# CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_RESET_XGENE is not set +# CONFIG_POWER_RESET_SYSCON is not set +# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set +# CONFIG_SYSCON_REBOOT_MODE is not set +# CONFIG_NVMEM_REBOOT_MODE is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_POWER_SUPPLY_HWMON is not set +# CONFIG_PDA_POWER is not set +# CONFIG_TEST_POWER is not set +# CONFIG_CHARGER_ADP5061 is not set +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SBS is not set +# CONFIG_CHARGER_SBS is not set +# CONFIG_MANAGER_SBS is not set +# CONFIG_BATTERY_BQ27XXX is not set +# CONFIG_BATTERY_MAX17040 is not set +# CONFIG_BATTERY_MAX17042 is not set +# CONFIG_CHARGER_MAX8903 is not set +# CONFIG_CHARGER_LP8727 is not set +# CONFIG_CHARGER_GPIO is not set +# CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set +# CONFIG_CHARGER_BQ2415X is not set +# CONFIG_CHARGER_BQ24257 is not set +# CONFIG_CHARGER_BQ24735 is not set +# CONFIG_CHARGER_BQ25890 is not set +# CONFIG_CHARGER_SMB347 is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_CHARGER_RT9455 is not set +CONFIG_HWMON=y +CONFIG_HWMON_VID=y +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +CONFIG_SENSORS_ADT7475=y +# CONFIG_SENSORS_AS370 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASPEED is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX31722 is not set +# CONFIG_SENSORS_MAX6621 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SHT3x is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH5627 is not set +# CONFIG_SENSORS_SCH5636 is not set +# CONFIG_SENSORS_STTS751 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_TC74 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_SENSORS_TMP108 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83773G is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_SENSORS_LD6710_FBX is not set +CONFIG_SENSORS_AP806=y +CONFIG_THERMAL=y +# CONFIG_THERMAL_STATISTICS is not set +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +# CONFIG_THERMAL_HWMON is not set +# CONFIG_THERMAL_OF is not set +# CONFIG_THERMAL_WRITABLE_TRIPS is not set +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set +# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set +# CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_GOV_FAIR_SHARE is not set +CONFIG_THERMAL_GOV_STEP_WISE=y +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_THERMAL_GOV_USER_SPACE is not set +# CONFIG_THERMAL_GOV_POWER_ALLOCATOR is not set +# CONFIG_THERMAL_EMULATION is not set +# CONFIG_THERMAL_MMIO is not set +# CONFIG_ARMADA_THERMAL is not set +# CONFIG_FREEBOX_WATCHDOG is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WATCHDOG_NOWAYOUT is not set +CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y +CONFIG_WATCHDOG_OPEN_TIMEOUT=0 +CONFIG_WATCHDOG_SYSFS=y + +# +# Watchdog Pretimeout Governors +# +# CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_GPIO_WATCHDOG is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_ARM_SP805_WATCHDOG is not set +CONFIG_ARM_SBSA_WATCHDOG=m +# CONFIG_ARMADA_37XX_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +# CONFIG_DW_WATCHDOG is not set +# CONFIG_MAX63XX_WATCHDOG is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_MEN_A21_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_AS3722 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_MFD_ATMEL_HLCDC is not set +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_BD9571MWV is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_MADERA is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9062 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_MFD_HI6421_PMIC is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77620 is not set +# CONFIG_MFD_MAX77650 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_CPCAP is not set +# CONFIG_MFD_VIPERBOARD is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_RK808 is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +CONFIG_MFD_SYSCON=y +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP3943 is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_TI_LMU is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65086 is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TI_LP873X is not set +# CONFIG_MFD_TI_LP87565 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TQMX86 is not set +# CONFIG_MFD_VX855 is not set +# CONFIG_MFD_LOCHNAGAR is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_MFD_ROHM_BD718XX is not set +# CONFIG_MFD_ROHM_BD70528 is not set +# CONFIG_MFD_STPMIC1 is not set +# CONFIG_MFD_STMFX is not set +CONFIG_MFD_FBXGW7R_PANEL=y +# end of Multifunction device drivers + +# CONFIG_REGULATOR is not set +CONFIG_RC_CORE=y +# CONFIG_RC_MAP is not set +# CONFIG_LIRC is not set +# CONFIG_RC_DECODERS is not set +# CONFIG_RC_DEVICES is not set +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +# CONFIG_MEDIA_CAMERA_SUPPORT is not set +# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_MEDIA_CEC_SUPPORT is not set +# CONFIG_MEDIA_CONTROLLER is not set +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_DVB_CORE=y +# CONFIG_DVB_NET is not set +CONFIG_DVB_MAX_ADAPTERS=8 +# CONFIG_DVB_DYNAMIC_MINORS is not set +# CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set +# CONFIG_DVB_ULE_DEBUG is not set + +# +# Media drivers +# +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Analog/digital TV USB devices +# + +# +# Digital TV USB devices +# +CONFIG_DVB_USB=y +# CONFIG_DVB_USB_DEBUG is not set +# CONFIG_DVB_USB_A800 is not set +# CONFIG_DVB_USB_DIBUSB_MB is not set +# CONFIG_DVB_USB_DIBUSB_MC is not set +CONFIG_DVB_USB_DIB0700=m +# CONFIG_DVB_USB_UMT_010 is not set +# CONFIG_DVB_USB_CXUSB is not set +# CONFIG_DVB_USB_M920X is not set +# CONFIG_DVB_USB_DIGITV is not set +# CONFIG_DVB_USB_VP7045 is not set +# CONFIG_DVB_USB_VP702X is not set +# CONFIG_DVB_USB_GP8PSK is not set +# CONFIG_DVB_USB_NOVA_T_USB2 is not set +# CONFIG_DVB_USB_TTUSB2 is not set +# CONFIG_DVB_USB_DTT200U is not set +# CONFIG_DVB_USB_OPERA1 is not set +# CONFIG_DVB_USB_AF9005 is not set +# CONFIG_DVB_USB_PCTV452E is not set +# CONFIG_DVB_USB_DW2102 is not set +# CONFIG_DVB_USB_CINERGY_T2 is not set +# CONFIG_DVB_USB_DTV5100 is not set +# CONFIG_DVB_USB_AZ6027 is not set +# CONFIG_DVB_USB_TECHNISAT_USB2 is not set +CONFIG_DVB_USB_V2=y +# CONFIG_DVB_USB_AF9015 is not set +CONFIG_DVB_USB_AF9035=m +# CONFIG_DVB_USB_ANYSEE is not set +# CONFIG_DVB_USB_AU6610 is not set +# CONFIG_DVB_USB_AZ6007 is not set +# CONFIG_DVB_USB_CE6230 is not set +# CONFIG_DVB_USB_EC168 is not set +# CONFIG_DVB_USB_GL861 is not set +# CONFIG_DVB_USB_LME2510 is not set +# CONFIG_DVB_USB_MXL111SF is not set +# CONFIG_DVB_USB_RTL28XXU is not set +# CONFIG_DVB_USB_DVBSKY is not set +# CONFIG_DVB_USB_ZD1301 is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_SMS_USB_DRV is not set +# CONFIG_DVB_B2C2_FLEXCOP_USB is not set +# CONFIG_DVB_AS102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_DVB_PLATFORM_DRIVERS is not set + +# +# Supported MMC/SDIO adapters +# +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_CYPRESS_FIRMWARE is not set + +# +# Media ancillary drivers (tuners, sensors, i2c, spi, frontends) +# +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +CONFIG_MEDIA_ATTACH=y + +# +# Media SPI Adapters +# +# CONFIG_CXD2880_SPI_DRV is not set +# end of Media SPI Adapters + +CONFIG_MEDIA_TUNER=y + +# +# Customize TV tuners +# +# CONFIG_MEDIA_TUNER_SIMPLE is not set +# CONFIG_MEDIA_TUNER_TDA18250 is not set +# CONFIG_MEDIA_TUNER_TDA8290 is not set +# CONFIG_MEDIA_TUNER_TDA827X is not set +# CONFIG_MEDIA_TUNER_TDA18271 is not set +# CONFIG_MEDIA_TUNER_TDA9887 is not set +# CONFIG_MEDIA_TUNER_TEA5761 is not set +# CONFIG_MEDIA_TUNER_TEA5767 is not set +# CONFIG_MEDIA_TUNER_MT20XX is not set +# CONFIG_MEDIA_TUNER_MT2060 is not set +# CONFIG_MEDIA_TUNER_MT2063 is not set +# CONFIG_MEDIA_TUNER_MT2266 is not set +# CONFIG_MEDIA_TUNER_MT2131 is not set +# CONFIG_MEDIA_TUNER_QT1010 is not set +# CONFIG_MEDIA_TUNER_XC2028 is not set +# CONFIG_MEDIA_TUNER_XC5000 is not set +# CONFIG_MEDIA_TUNER_XC4000 is not set +# CONFIG_MEDIA_TUNER_MXL5005S is not set +# CONFIG_MEDIA_TUNER_MXL5007T is not set +# CONFIG_MEDIA_TUNER_MC44S803 is not set +# CONFIG_MEDIA_TUNER_MAX2165 is not set +# CONFIG_MEDIA_TUNER_TDA18218 is not set +# CONFIG_MEDIA_TUNER_FC0011 is not set +# CONFIG_MEDIA_TUNER_FC0012 is not set +# CONFIG_MEDIA_TUNER_FC0013 is not set +# CONFIG_MEDIA_TUNER_TDA18212 is not set +# CONFIG_MEDIA_TUNER_E4000 is not set +# CONFIG_MEDIA_TUNER_FC2580 is not set +# CONFIG_MEDIA_TUNER_M88RS6000T is not set +# CONFIG_MEDIA_TUNER_TUA9001 is not set +# CONFIG_MEDIA_TUNER_SI2157 is not set +CONFIG_MEDIA_TUNER_IT913X=m +# CONFIG_MEDIA_TUNER_R820T is not set +# CONFIG_MEDIA_TUNER_MXL301RF is not set +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set +# end of Customize TV tuners + +# +# Customise DVB Frontends +# + +# +# Multistandard (satellite) frontends +# +# CONFIG_DVB_STB0899 is not set +# CONFIG_DVB_STB6100 is not set +# CONFIG_DVB_STV090x is not set +# CONFIG_DVB_STV0910 is not set +# CONFIG_DVB_STV6110x is not set +# CONFIG_DVB_STV6111 is not set +# CONFIG_DVB_MXL5XX is not set +# CONFIG_DVB_M88DS3103 is not set + +# +# Multistandard (cable + terrestrial) frontends +# +# CONFIG_DVB_DRXK is not set +# CONFIG_DVB_TDA18271C2DD is not set +# CONFIG_DVB_SI2165 is not set +# CONFIG_DVB_MN88472 is not set +# CONFIG_DVB_MN88473 is not set + +# +# DVB-S (satellite) frontends +# +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_ZL10036 is not set +# CONFIG_DVB_ZL10039 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_STV0288 is not set +# CONFIG_DVB_STB6000 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_STV6110 is not set +# CONFIG_DVB_STV0900 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_TDA8261 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_TUNER_CX24113 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TUA6100 is not set +# CONFIG_DVB_CX24116 is not set +# CONFIG_DVB_CX24117 is not set +# CONFIG_DVB_CX24120 is not set +# CONFIG_DVB_SI21XX is not set +# CONFIG_DVB_TS2020 is not set +# CONFIG_DVB_DS3000 is not set +# CONFIG_DVB_MB86A16 is not set +# CONFIG_DVB_TDA10071 is not set + +# +# DVB-T (terrestrial) frontends +# +# CONFIG_DVB_SP8870 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_S5H1432 is not set +# CONFIG_DVB_DRXD is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +# CONFIG_DVB_DIB9000 is not set +# CONFIG_DVB_TDA10048 is not set +# CONFIG_DVB_AF9013 is not set +# CONFIG_DVB_EC100 is not set +# CONFIG_DVB_STV0367 is not set +# CONFIG_DVB_CXD2820R is not set +# CONFIG_DVB_CXD2841ER is not set +# CONFIG_DVB_RTL2830 is not set +# CONFIG_DVB_RTL2832 is not set +# CONFIG_DVB_SI2168 is not set +# CONFIG_DVB_ZD1301_DEMOD is not set +# CONFIG_DVB_CXD2880 is not set + +# +# DVB-C (cable) frontends +# +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_STV0297 is not set + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_LGDT3305 is not set +# CONFIG_DVB_LGDT3306A is not set +# CONFIG_DVB_LG2160 is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_AU8522_DTV is not set +# CONFIG_DVB_S5H1411 is not set + +# +# ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_S921 is not set +# CONFIG_DVB_DIB8000 is not set +# CONFIG_DVB_MB86A20S is not set + +# +# ISDB-S (satellite) & ISDB-T (terrestrial) frontends +# +# CONFIG_DVB_TC90522 is not set +# CONFIG_DVB_MN88443X is not set + +# +# Digital terrestrial only tuners/PLL +# +# CONFIG_DVB_PLL is not set +CONFIG_DVB_TUNER_DIB0070=m +# CONFIG_DVB_TUNER_DIB0090 is not set + +# +# SEC control devices for DVB-S +# +# CONFIG_DVB_DRX39XYJ is not set +# CONFIG_DVB_LNBH25 is not set +# CONFIG_DVB_LNBH29 is not set +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_LNBP22 is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +# CONFIG_DVB_ISL6423 is not set +# CONFIG_DVB_A8293 is not set +# CONFIG_DVB_LGS8GL5 is not set +# CONFIG_DVB_LGS8GXX is not set +# CONFIG_DVB_ATBM8830 is not set +# CONFIG_DVB_TDA665x is not set +# CONFIG_DVB_IX2505V is not set +# CONFIG_DVB_M88RS2000 is not set +CONFIG_DVB_AF9033=m +# CONFIG_DVB_HORUS3A is not set +# CONFIG_DVB_ASCOT2E is not set +# CONFIG_DVB_HELENE is not set + +# +# Common Interface (EN50221) controller drivers +# +# CONFIG_DVB_CXD2099 is not set +# CONFIG_DVB_SP2 is not set + +# +# Tools to develop new frontends +# +# CONFIG_DVB_DUMMY_FE is not set +# end of Customise DVB Frontends + +# +# Graphics support +# +# CONFIG_VGA_ARB is not set +# CONFIG_DRM is not set +# CONFIG_DRM_DP_CEC is not set + +# +# ARM devices +# +# end of ARM devices + +# +# ACP (Audio CoProcessor) Configuration +# +# end of ACP (Audio CoProcessor) Configuration + +CONFIG_DRM_RCAR_WRITEBACK=y + +# +# Frame buffer Devices +# +CONFIG_FB_CMDLINE=y +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_BACKLIGHT=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_ARMCLCD is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +# CONFIG_FB_SSD1320 is not set +CONFIG_FB_SSD1327=y +# end of Frame buffer Devices + +# +# Backlight & LCD device support +# +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +# CONFIG_BACKLIGHT_PM8941_WLED is not set +# CONFIG_BACKLIGHT_ADP8860 is not set +# CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set +# CONFIG_BACKLIGHT_ARCXCNN is not set +# end of Backlight & LCD device support + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +# CONFIG_FRAMEBUFFER_CONSOLE is not set +# end of Console display driver support + +# CONFIG_LOGO is not set +# end of Graphics support + +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_RAWMIDI=y +# CONFIG_SND_OSSEMUL is not set +CONFIG_SND_PCM_TIMER=y +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_PROC_FS=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_ALOOP is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_PCI is not set + +# +# HD-Audio +# +# end of HD-Audio + +CONFIG_SND_HDA_PREALLOC_SIZE=64 +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_CAIAQ is not set +# CONFIG_SND_USB_6FIRE is not set +# CONFIG_SND_USB_HIFACE is not set +# CONFIG_SND_BCD2000 is not set +# CONFIG_SND_USB_POD is not set +# CONFIG_SND_USB_PODHD is not set +# CONFIG_SND_USB_TONEPORT is not set +# CONFIG_SND_USB_VARIAX is not set +# CONFIG_SND_SOC is not set + +# +# HID support +# +CONFIG_HID=y +# CONFIG_HID_BATTERY_STRENGTH is not set +# CONFIG_HIDRAW is not set +# CONFIG_UHID is not set +# CONFIG_HID_GENERIC is not set + +# +# Special HID drivers +# +# CONFIG_HID_A4TECH is not set +# CONFIG_HID_ACRUX is not set +# CONFIG_HID_APPLE is not set +# CONFIG_HID_ASUS is not set +# CONFIG_HID_AUREAL is not set +# CONFIG_HID_BELKIN is not set +# CONFIG_HID_CHERRY is not set +# CONFIG_HID_CHICONY is not set +# CONFIG_HID_CORSAIR is not set +# CONFIG_HID_COUGAR is not set +# CONFIG_HID_MACALLY is not set +# CONFIG_HID_PRODIKEYS is not set +# CONFIG_HID_CMEDIA is not set +# CONFIG_HID_CYPRESS is not set +# CONFIG_HID_DRAGONRISE is not set +# CONFIG_HID_EMS_FF is not set +# CONFIG_HID_ELECOM is not set +# CONFIG_HID_EZKEY is not set +# CONFIG_HID_GEMBIRD is not set +# CONFIG_HID_GFRM is not set +# CONFIG_HID_KEYTOUCH is not set +# CONFIG_HID_KYE is not set +# CONFIG_HID_WALTOP is not set +# CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_FBX_REMOTE_AUDIO is not set +# CONFIG_HID_GYRATION is not set +# CONFIG_HID_ICADE is not set +# CONFIG_HID_ITE is not set +# CONFIG_HID_JABRA is not set +# CONFIG_HID_TWINHAN is not set +# CONFIG_HID_KENSINGTON is not set +# CONFIG_HID_LCPOWER is not set +# CONFIG_HID_LED is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH is not set +# CONFIG_HID_MAGICMOUSE is not set +# CONFIG_HID_MALTRON is not set +# CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_REDRAGON is not set +# CONFIG_HID_MICROSOFT is not set +# CONFIG_HID_MONTEREY is not set +# CONFIG_HID_MULTITOUCH is not set +# CONFIG_HID_NTI is not set +# CONFIG_HID_ORTEK is not set +# CONFIG_HID_PANTHERLORD is not set +# CONFIG_HID_PETALYNX is not set +# CONFIG_HID_PICOLCD is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PRIMAX is not set +# CONFIG_HID_SAITEK is not set +# CONFIG_HID_SAMSUNG is not set +# CONFIG_HID_SPEEDLINK is not set +# CONFIG_HID_STEAM is not set +# CONFIG_HID_STEELSERIES is not set +# CONFIG_HID_SUNPLUS is not set +# CONFIG_HID_RMI is not set +# CONFIG_HID_GREENASIA is not set +# CONFIG_HID_SMARTJOYPLUS is not set +# CONFIG_HID_TIVO is not set +# CONFIG_HID_TOPSEED is not set +# CONFIG_HID_THINGM is not set +# CONFIG_HID_THRUSTMASTER is not set +# CONFIG_HID_UDRAW_PS3 is not set +# CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_XINMO is not set +# CONFIG_HID_ZEROPLUS is not set +# CONFIG_HID_ZYDACRON is not set +# CONFIG_HID_SENSOR_HUB is not set +# CONFIG_HID_ALPS is not set +# end of Special HID drivers + +# +# USB HID support +# +# CONFIG_USB_HID is not set +# CONFIG_HID_PID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# end of USB HID Boot Protocol drivers +# end of USB HID support + +# +# I2C HID support +# +# CONFIG_I2C_HID is not set +# end of I2C HID support +# end of HID support + +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_COMMON=y +# CONFIG_USB_LED_TRIG is not set +# CONFIG_USB_ULPI_BUS is not set +# CONFIG_USB_CONN_GPIO is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB=y +# CONFIG_USB_PCI is not set +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEFAULT_PERSIST=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_LEDS_TRIGGER_USBPORT is not set +CONFIG_USB_AUTOSUSPEND_DELAY=2 +# CONFIG_USB_MON is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_XHCI_HCD=m +# CONFIG_USB_XHCI_DBGCAP is not set +CONFIG_USB_XHCI_PLATFORM=m +CONFIG_USB_XHCI_MVEBU=m +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set +# CONFIG_USB_MAX3421_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_HCD_TEST_MODE is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=y +CONFIG_USB_PRINTER=y +# CONFIG_USB_WDM is not set +# CONFIG_USB_TMC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# + +# +# also be needed; see USB_STORAGE Help for more info +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_REALTEK is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_STORAGE_ENE_UB6250 is not set +# CONFIG_USB_UAS is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_CDNS3 is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_DWC3 is not set +# CONFIG_USB_DWC2 is not set +# CONFIG_USB_ISP1760 is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_SEVSEG is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_EHSET_TEST_FIXTURE is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_YUREX is not set +# CONFIG_USB_EZUSB_FX2 is not set +# CONFIG_USB_HUB_USB251XB is not set +# CONFIG_USB_HSIC_USB3503 is not set +# CONFIG_USB_HSIC_USB4604 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set + +# +# USB Physical Layer drivers +# +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_USB_ISP1301 is not set +# CONFIG_USB_ULPI is not set +# end of USB Physical Layer drivers + +# CONFIG_USB_GADGET is not set +# CONFIG_TYPEC is not set +# CONFIG_USB_ROLE_SWITCH is not set +CONFIG_MMC=y +# CONFIG_PWRSEQ_EMMC is not set +# CONFIG_PWRSEQ_SIMPLE is not set +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_ARMMMCI is not set +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +# CONFIG_MMC_SDHCI_OF_ASPEED is not set +# CONFIG_MMC_SDHCI_OF_AT91 is not set +# CONFIG_MMC_SDHCI_OF_DWCMSHC is not set +# CONFIG_MMC_SDHCI_CADENCE is not set +# CONFIG_MMC_SDHCI_PXAV3 is not set +# CONFIG_MMC_SDHCI_F_SDH30 is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set +# CONFIG_MMC_DW is not set +# CONFIG_MMC_VUB300 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_CQHCI is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_MMC_MTK is not set +CONFIG_MMC_SDHCI_XENON=y +# CONFIG_MMC_SDHCI_OMAP is not set +# CONFIG_MMC_SDHCI_AM654 is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set + +# +# LED drivers +# +# CONFIG_LEDS_AN30259A is not set +# CONFIG_LEDS_BCM6328 is not set +# CONFIG_LEDS_BCM6358 is not set +# CONFIG_LEDS_CR0014114 is not set +# CONFIG_LEDS_LM3530 is not set +# CONFIG_LEDS_LM3532 is not set +# CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_LM3692X is not set +# CONFIG_LEDS_PCA9532 is not set +# CONFIG_LEDS_GPIO is not set +# CONFIG_LEDS_LP3944 is not set +# CONFIG_LEDS_LP3952 is not set +# CONFIG_LEDS_LP5521 is not set +# CONFIG_LEDS_LP5523 is not set +# CONFIG_LEDS_LP5562 is not set +# CONFIG_LEDS_LP8501 is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_LEDS_PCA955X is not set +# CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_DAC124S085 is not set +# CONFIG_LEDS_BD2802 is not set +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TCA6507 is not set +# CONFIG_LEDS_TLC591XX is not set +# CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set +# CONFIG_LEDS_IS31FL32XX is not set + +# +# LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) +# +# CONFIG_LEDS_BLINKM is not set +# CONFIG_LEDS_SYSCON is not set +# CONFIG_LEDS_MLXREG is not set +# CONFIG_LEDS_USER is not set +# CONFIG_LEDS_SPI_BYTE is not set +# CONFIG_LEDS_TI_LMU_COMMON is not set +CONFIG_LEDS_LED1202=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_ONESHOT is not set +# CONFIG_LEDS_TRIGGER_DISK is not set +# CONFIG_LEDS_TRIGGER_MTD is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set +# CONFIG_LEDS_TRIGGER_CPU is not set +# CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set + +# +# iptables trigger is under Netfilter config (LED target) +# +# CONFIG_LEDS_TRIGGER_TRANSIENT is not set +# CONFIG_LEDS_TRIGGER_CAMERA is not set +# CONFIG_LEDS_TRIGGER_PANIC is not set +# CONFIG_LEDS_TRIGGER_NETDEV is not set +# CONFIG_LEDS_TRIGGER_PATTERN is not set +# CONFIG_LEDS_TRIGGER_AUDIO is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set + +# +# DMABUF options +# +# CONFIG_SYNC_FILE is not set +# CONFIG_UDMABUF is not set +# CONFIG_DMABUF_SELFTESTS is not set +# end of DMABUF options + +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set +# CONFIG_VIRT_DRIVERS is not set +# CONFIG_VIRTIO_MENU is not set + +# +# Microsoft Hyper-V guest support +# +# end of Microsoft Hyper-V guest support + +# CONFIG_GREYBUS is not set +# CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +# CONFIG_MFD_CROS_EC is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_MELLANOX_PLATFORM is not set +CONFIG_FBXGW7R_PLATFORM=y +CONFIG_FBXGW7R_SWITCH=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +# CONFIG_COMMON_CLK_VERSATILE is not set +# CONFIG_CLK_HSDK is not set +# CONFIG_COMMON_CLK_MAX9485 is not set +# CONFIG_COMMON_CLK_SI5341 is not set +# CONFIG_COMMON_CLK_SI5351 is not set +# CONFIG_COMMON_CLK_SI514 is not set +# CONFIG_COMMON_CLK_SI544 is not set +# CONFIG_COMMON_CLK_SI570 is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CDCE925 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set +# CONFIG_CLK_QORIQ is not set +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMMON_CLK_VC5 is not set +# CONFIG_COMMON_CLK_FIXED_MMIO is not set +CONFIG_ARMADA_AP_CP_HELPER=y +CONFIG_ARMADA_37XX_CLK=y +CONFIG_ARMADA_AP806_SYSCON=y +CONFIG_ARMADA_CP110_SYSCON=y +# end of Common Clock Framework + +# CONFIG_HWSPINLOCK is not set + +# +# Clock Source drivers +# +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_HISILICON_ERRATUM_161010101=y +CONFIG_ARM64_ERRATUM_858921=y +# end of Clock Source drivers + +# CONFIG_MAILBOX is not set +# CONFIG_IOMMU_SUPPORT is not set + +# +# Remoteproc drivers +# +# CONFIG_REMOTEPROC is not set +# end of Remoteproc drivers + +# +# Rpmsg drivers +# +# CONFIG_RPMSG_VIRTIO is not set +# end of Rpmsg drivers + +# CONFIG_SOUNDWIRE is not set + +# +# SOC (System On Chip) specific Drivers +# + +# +# Amlogic SoC drivers +# +# end of Amlogic SoC drivers + +# +# Aspeed SoC drivers +# +# end of Aspeed SoC drivers + +# +# Broadcom SoC drivers +# +# CONFIG_SOC_BRCMSTB is not set +# CONFIG_SOC_BCM63XX is not set +# end of Broadcom SoC drivers + +# +# NXP/Freescale QorIQ SoC drivers +# +# end of NXP/Freescale QorIQ SoC drivers + +# +# i.MX SoC drivers +# +# end of i.MX SoC drivers + +# +# Qualcomm SoC drivers +# +# end of Qualcomm SoC drivers + +# CONFIG_SOC_TI is not set + +# +# Xilinx SoC drivers +# +# CONFIG_XILINX_VCU is not set +# end of Xilinx SoC drivers +# end of SOC (System On Chip) specific Drivers + +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +# CONFIG_IIO is not set +# CONFIG_NTB is not set +# CONFIG_VME_BUS is not set +# CONFIG_PWM is not set + +# +# IRQ chip support +# +CONFIG_IRQCHIP=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_MAX_NR=1 +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_AL_FIC is not set +CONFIG_MVEBU_GICP=y +CONFIG_MVEBU_ICU=y +CONFIG_MVEBU_ODMI=y +CONFIG_MVEBU_PIC=y +CONFIG_MVEBU_SEI=y +CONFIG_PARTITION_PERCPU=y +# end of IRQ chip support + +# CONFIG_IPACK_BUS is not set +CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_TI_SYSCON is not set + +# +# PHY Subsystem +# +CONFIG_GENERIC_PHY=y +# CONFIG_PHY_XGENE is not set +# CONFIG_XDSL_PHY_API is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_PHY_CADENCE_DP is not set +# CONFIG_PHY_CADENCE_DPHY is not set +# CONFIG_PHY_CADENCE_SIERRA is not set +# CONFIG_PHY_FSL_IMX8MQ_USB is not set +# CONFIG_PHY_MIXEL_MIPI_DPHY is not set +# CONFIG_PHY_MVEBU_A3700_COMPHY is not set +# CONFIG_PHY_MVEBU_A3700_UTMI is not set +# CONFIG_PHY_MVEBU_A38X_COMPHY is not set +CONFIG_PHY_MVEBU_CP110_COMPHY=y +# CONFIG_PHY_PXA_28NM_HSIC is not set +# CONFIG_PHY_PXA_28NM_USB2 is not set +CONFIG_PHY_UTMI_CP110=y +# CONFIG_PHY_MAPPHONE_MDM6600 is not set +# CONFIG_PHY_OCELOT_SERDES is not set +# end of PHY Subsystem + +# CONFIG_POWERCAP is not set +# CONFIG_MCB is not set + +# +# Performance monitor support +# +# CONFIG_ARM_CCI_PMU is not set +# CONFIG_ARM_CCN is not set +CONFIG_ARM_PMU=y +# CONFIG_ARM_DSU_PMU is not set +# CONFIG_ARM_SPE_PMU is not set +# end of Performance monitor support + +CONFIG_RAS=y + +# +# Android +# +# CONFIG_ANDROID is not set +# end of Android + +# CONFIG_LIBNVDIMM is not set +CONFIG_DAX=y +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +# CONFIG_NVMEM_IGNORE_RO is not set + +# +# HW tracing support +# +# CONFIG_STM is not set +# CONFIG_INTEL_TH is not set +# end of HW tracing support + +# CONFIG_FPGA is not set +# CONFIG_FSI is not set +CONFIG_TEE=y + +# +# TEE drivers +# +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +# end of TEE drivers + +# CONFIG_SIOX is not set +# CONFIG_SLIMBUS is not set +# CONFIG_INTERCONNECT is not set +# CONFIG_COUNTER is not set +# end of Device Drivers + +# +# File systems +# +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_VALIDATE_FS_PARSER is not set +CONFIG_FS_IOMAP=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +# CONFIG_EXT4_FS_SECURITY is not set +# CONFIG_EXT4_DEBUG is not set +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_XFS_FS=y +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_ONLINE_SCRUB is not set +# CONFIG_XFS_WARN is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_EXPORTFS=y +# CONFIG_EXPORTFS_BLOCK_OPS is not set +CONFIG_FILE_LOCKING=y +CONFIG_MANDATORY_FILE_LOCKING=y +# CONFIG_FS_ENCRYPTION is not set +# CONFIG_FS_VERITY is not set +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_FANOTIFY=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_FUSE_FS=y +# CONFIG_CUSE is not set +# CONFIG_VIRTIO_FS is not set +CONFIG_OVERLAY_FS=y +# CONFIG_OVERLAY_FS_REDIRECT_DIR is not set +CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y +# CONFIG_OVERLAY_FS_INDEX is not set +# CONFIG_OVERLAY_FS_XINO_AUTO is not set +# CONFIG_OVERLAY_FS_METACOPY is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set +# end of Caches + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set +# end of CD-ROM/DVD Filesystems + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=850 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_FAT_DEFAULT_UTF8 is not set +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set +CONFIG_EXFAT_FS_FBX=y +# end of DOS/FAT/NT Filesystems + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROC_CHILDREN is not set +CONFIG_KERNFS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_TMPFS_XATTR is not set +# CONFIG_HUGETLBFS is not set +CONFIG_MEMFD_CREATE=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_CONFIGFS_FS=y +# end of Pseudo filesystems + +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ORANGEFS_FS is not set +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +CONFIG_HFS_FS=y +CONFIG_HFSPLUS_FS=y +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=y +CONFIG_CRAMFS_BLOCKDEV=y +# CONFIG_CRAMFS_MTD is not set +CONFIG_SQUASHFS=y +# CONFIG_SQUASHFS_FILE_CACHE is not set +CONFIG_SQUASHFS_FILE_DIRECT=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set +# CONFIG_SQUASHFS_XATTR is not set +# CONFIG_SQUASHFS_ZLIB is not set +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_SQUASHFS_LZO is not set +CONFIG_SQUASHFS_XZ=y +# CONFIG_SQUASHFS_ZSTD is not set +# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_PSTORE=y +CONFIG_PSTORE_DEFLATE_COMPRESS=y +# CONFIG_PSTORE_LZO_COMPRESS is not set +# CONFIG_PSTORE_LZ4_COMPRESS is not set +# CONFIG_PSTORE_LZ4HC_COMPRESS is not set +# CONFIG_PSTORE_842_COMPRESS is not set +# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_COMPRESS=y +CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y +CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" +# CONFIG_PSTORE_CONSOLE is not set +# CONFIG_PSTORE_PMSG is not set +CONFIG_PSTORE_RAM=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_EROFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_ROOT_NFS=y +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +# CONFIG_NFSD_BLOCKLAYOUT is not set +# CONFIG_NFSD_SCSILAYOUT is not set +# CONFIG_NFSD_FLEXFILELAYOUT is not set +# CONFIG_SMB_SERVER is not set +CONFIG_GRACE_PERIOD=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_DEBUG is not set +# CONFIG_CEPH_FS is not set +# CONFIG_CIFS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_MAC_ROMAN is not set +# CONFIG_NLS_MAC_CELTIC is not set +# CONFIG_NLS_MAC_CENTEURO is not set +# CONFIG_NLS_MAC_CROATIAN is not set +# CONFIG_NLS_MAC_CYRILLIC is not set +# CONFIG_NLS_MAC_GAELIC is not set +# CONFIG_NLS_MAC_GREEK is not set +# CONFIG_NLS_MAC_ICELAND is not set +# CONFIG_NLS_MAC_INUIT is not set +# CONFIG_NLS_MAC_ROMANIAN is not set +# CONFIG_NLS_MAC_TURKISH is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set +# CONFIG_UNICODE is not set +# end of File systems + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y +# CONFIG_HARDENED_USERCOPY is not set +# CONFIG_FORTIFY_SOURCE is not set +# CONFIG_STATIC_USERMODEHELPER is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity" + +# +# Kernel hardening options +# + +# +# Memory initialization +# +CONFIG_INIT_STACK_NONE=y +# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set +# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set +# CONFIG_GCC_PLUGIN_STACKLEAK is not set +# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set +# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set +# end of Memory initialization +# end of Kernel hardening options +# end of Security options + +CONFIG_XOR_BLOCKS=y +CONFIG_ASYNC_CORE=y +CONFIG_ASYNC_MEMCPY=y +CONFIG_ASYNC_XOR=y +CONFIG_ASYNC_PQ=y +CONFIG_ASYNC_RAID6_RECOV=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_KPP=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_USER is not set +CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +# CONFIG_CRYPTO_PCRYPT is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set + +# +# Public-key cryptography +# +# CONFIG_CRYPTO_RSA is not set +# CONFIG_CRYPTO_DH is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECRDSA is not set + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_GCM=y +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=y + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_ADIANTUM is not set +CONFIG_CRYPTO_ESSIV=y + +# +# Hash modes +# +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_XXHASH is not set +# CONFIG_CRYPTO_CRCT10DIF is not set +CONFIG_CRYPTO_GHASH=y +# CONFIG_CRYPTO_POLY1305 is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_SHA256=y +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_SHA3 is not set +# CONFIG_CRYPTO_SM3 is not set +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_TI is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_LIB_ARC4=y +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_CHACHA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set +# CONFIG_CRYPTO_ZSTD is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +# CONFIG_CRYPTO_DRBG_HASH is not set +# CONFIG_CRYPTO_DRBG_CTR is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_USER_API_AEAD is not set +# CONFIG_CRYPTO_HW is not set + +# +# Certificates for signature checking +# +# end of Certificates for signature checking + +# +# Library routines +# +CONFIG_RAID6_PQ=y +# CONFIG_RAID6_PQ_BENCHMARK is not set +# CONFIG_PACKING is not set +CONFIG_BITREVERSE=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +# CONFIG_CORDIC is not set +CONFIG_RATIONAL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +# CONFIG_INDIRECT_PIO is not set +# CONFIG_CRC_CCITT is not set +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +# CONFIG_CRC64 is not set +# CONFIG_CRC4 is not set +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +# CONFIG_CRC8 is not set +CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +# CONFIG_RANDOM32_SELFTEST is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_XZ_DEC=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +# CONFIG_XZ_DEC_SPARC is not set +CONFIG_XZ_DEC_BCJ=y +# CONFIG_XZ_DEC_TEST is not set +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_DMA=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_DMA_DECLARE_COHERENT=y +CONFIG_ARCH_HAS_SETUP_DMA_OPS=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y +CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y +CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y +CONFIG_SWIOTLB=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_DIRECT_REMAP=y +# CONFIG_DMA_API_DEBUG is not set +CONFIG_SGL_ALLOC=y +CONFIG_CPU_RMAP=y +CONFIG_DQL=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_NLATTR=y +# CONFIG_IRQ_POLL is not set +CONFIG_LIBFDT=y +CONFIG_OID_REGISTRY=y +CONFIG_HAVE_GENERIC_VDSO=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_FONT_SUPPORT=y +CONFIG_FONT_8x16=y +CONFIG_FONT_AUTOSELECT=y +CONFIG_SG_POOL=y +CONFIG_SBITMAP=y +# CONFIG_STRING_SELFTEST is not set +CONFIG_ARCH_HAS_FBXSERIAL=y +CONFIG_FBXSERIAL=y +# end of Library routines + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +# CONFIG_PRINTK_CALLER is not set +CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 +CONFIG_CONSOLE_LOGLEVEL_QUIET=4 +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set +# end of printk and dmesg options + +# +# Compile-time checks and compiler options +# +# CONFIG_DEBUG_INFO is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=2048 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_INSTALL is not set +CONFIG_OPTIMIZE_INLINING=y +# CONFIG_DEBUG_SECTION_MISMATCH is not set +CONFIG_SECTION_MISMATCH_WARN_ONLY=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# end of Compile-time checks and compiler options + +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_MISC is not set + +# +# Memory Debugging +# +CONFIG_PAGE_EXTENSION=y +CONFIG_DEBUG_PAGEALLOC=y +CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT=y +# CONFIG_PAGE_OWNER is not set +CONFIG_PAGE_POISONING=y +CONFIG_PAGE_POISONING_NO_SANITY=y +# CONFIG_PAGE_POISONING_ZERO is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_DEBUG_OBJECTS=y +CONFIG_DEBUG_OBJECTS_SELFTEST=y +CONFIG_DEBUG_OBJECTS_FREE=y +CONFIG_DEBUG_OBJECTS_TIMERS=y +CONFIG_DEBUG_OBJECTS_WORK=y +CONFIG_DEBUG_OBJECTS_RCU_HEAD=y +CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y +CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1 +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK=y +CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE=16000 +# CONFIG_DEBUG_KMEMLEAK_TEST is not set +# CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF is not set +# CONFIG_DEBUG_KMEMLEAK_AUTO_SCAN is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_VM=y +# CONFIG_DEBUG_VM_VMACACHE is not set +CONFIG_DEBUG_VM_RB=y +CONFIG_DEBUG_VM_PGFLAGS=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +# CONFIG_DEBUG_VIRTUAL is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y +CONFIG_CC_HAS_KASAN_GENERIC=y +# CONFIG_KASAN is not set +CONFIG_KASAN_STACK=1 +# end of Memory Debugging + +CONFIG_ARCH_HAS_KCOV=y +CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set +CONFIG_DEBUG_SHIRQ=y + +# +# Debug Lockups and Hangs +# +# CONFIG_SOFTLOCKUP_DETECTOR is not set +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 +# CONFIG_WQ_WATCHDOG is not set +# end of Debug Lockups and Hangs + +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +CONFIG_PANIC_TIMEOUT=10 +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_SCHED_STACK_END_CHECK is not set +CONFIG_DEBUG_TIMEKEEPING=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +CONFIG_DEBUG_ATOMIC_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_WW_MUTEX_SELFTEST is not set +# end of Lock Debugging (spinlocks, mutexes, etc...) + +CONFIG_STACKTRACE=y +# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_KOBJECT_RELEASE is not set +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_LIST=y +# CONFIG_DEBUG_PLIST is not set +CONFIG_DEBUG_SG=y +CONFIG_DEBUG_NOTIFIERS=y +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_RCU_PERF_TEST is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +# CONFIG_RCU_TRACE is not set +# CONFIG_RCU_EQS_DEBUG is not set +# end of RCU Debugging + +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_RUNTIME_TESTING_MENU is not set +CONFIG_MEMTEST=y +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +# CONFIG_UBSAN is not set +CONFIG_UBSAN_ALIGNMENT=y +CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y +# CONFIG_STRICT_DEVMEM is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set +# CONFIG_PID_IN_CONTEXTIDR is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_DEBUG_WX is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set +# CONFIG_ARM64_RELOC_TEST is not set +# CONFIG_CORESIGHT is not set +# end of Kernel hacking diff -Nruw linux-5.4.60-fbx/drivers/fbxgpio./fbxgpio_core.c linux-5.4.60-fbx/drivers/fbxgpio/fbxgpio_core.c --- linux-5.4.60-fbx/drivers/fbxgpio./fbxgpio_core.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxgpio/fbxgpio_core.c 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1,361 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +#define PFX "fbxgpio_core: " + +/* #define DEBUG */ +#ifdef DEBUG +#define dprint(Fmt, Arg...) printk(PFX Fmt, Arg) +#else +#define dprint(Fmt, Arg...) do { } while (0) +#endif + +static struct class *fbxgpio_class; + +/* + * retrieval of a struct fbxgpio_pin from a phandle in the device + * tree. + */ +struct fbxgpio_of_mach_data { + struct fbxgpio_pin *match; + struct device_node *np; +}; + +static int match_fbxgpio_of_node(struct device *dev, void *data) +{ + struct fbxgpio_of_mach_data *md = data; + struct fbxgpio_pin *pin = dev_get_drvdata(dev); + + if (pin->of_node == md->np) { + md->match = pin; + return 1; + } + return 0; +} + +struct fbxgpio_pin *fbxgpio_of_get(struct device_node *np, const char *propname, + int index) +{ + struct fbxgpio_of_mach_data md; + + /* + * get the pin device_node. + */ + md.match = NULL; + md.np = of_parse_phandle(np, propname, index); + if (!md.np) + return ERR_PTR(-ENOENT); + + /* + * find the struct fbxgpio_pin behind that device_node. + */ + class_for_each_device(fbxgpio_class, NULL, &md, + match_fbxgpio_of_node); + + return md.match ? md.match : ERR_PTR(-ENOENT); +} +EXPORT_SYMBOL(fbxgpio_of_get); + +/* + * show direction in for gpio associated with class_device dev. + */ +static ssize_t show_direction(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fbxgpio_pin *p; + int dir, ret = 0; + + p = dev_get_drvdata(dev); + + if (p->ops->get_direction) + dir = p->ops->get_direction(p->pin_num); + else + dir = p->direction; + + switch (dir) { + case GPIO_DIR_IN: + ret += sprintf(buf, "input\n"); + break; + case GPIO_DIR_OUT: + ret += sprintf(buf, "output\n"); + break; + default: + ret += sprintf(buf, "unknown\n"); + break; + } + return ret; +} + +/* + * store direction. return -EINVAL if direction string is bad. return + * -EPERM if flag FBXGPIO_PIN_DIR_RW is set in flags. + */ +static ssize_t store_direction(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + int dir; + struct fbxgpio_pin *p; + int match_len = 0; + int i, ret; + static const char *word_match[] = { + [GPIO_DIR_IN] = "input", + [GPIO_DIR_OUT] = "output", + }; + + if (*buf == ' ' || *buf == '\t' || *buf == '\r' || *buf == '\n') + /* silently eat any spaces/tab/linefeed/carriagereturn */ + return 1; + + p = dev_get_drvdata(dev); + if (!(p->flags & FBXGPIO_PIN_DIR_RW)) { + dprint("pin %s direction is read only.\n", p->pin_name); + return -EPERM; + } + dir = 0; + for (i = 0; i < 2; ++i) { + if (size >= strlen(word_match[i]) && + !strncmp(buf, word_match[i], strlen(word_match[i]))) { + dir = i; + match_len = strlen(word_match[i]); + break ; + } + } + if (i == 2) + return -EINVAL; + + ret = p->ops->set_direction(p->pin_num, dir); + if (ret) + return ret; + p->direction = dir; + + return match_len; +} + +/* + * show input data for input gpio pins. + */ +static ssize_t show_datain(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int val; + struct fbxgpio_pin *p; + + p = dev_get_drvdata(dev); + if (p->direction == GPIO_DIR_OUT) + return -EINVAL; + val = p->ops->get_datain(p->pin_num); + + if (p->flags & FBXGPIO_PIN_REVERSE_POL) + val = 1 - val; + return sprintf(buf, "%i\n", val); +} + +/* + * show output data for output gpio pins. + */ +static ssize_t show_dataout(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int val; + struct fbxgpio_pin *p; + + p = dev_get_drvdata(dev); + if (p->direction == GPIO_DIR_IN) + return -EINVAL; + if (p->ops->get_dataout) + val = p->ops->get_dataout(p->pin_num); + else + val = p->cur_dataout; + + if (p->flags & FBXGPIO_PIN_REVERSE_POL) + val = 1 - val; + return sprintf(buf, "%i\n", val); +} + +/* + * store new dataout value for output gpio pins. + */ +static ssize_t store_dataout(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + int val; + struct fbxgpio_pin *p; + + if (*buf == ' ' || *buf == '\t' || *buf == '\r' || *buf == '\n') + /* silently eat any spaces/tab/linefeed/carriagereturn */ + return 1; + + p = dev_get_drvdata(dev); + + if (p->direction != GPIO_DIR_OUT) + return -EINVAL; + + switch (*buf) { + case '0': + val = 0; + break ; + case '1': + val = 1; + break ; + default: + return -EINVAL; + } + + p->cur_dataout = val; + + if (p->flags & FBXGPIO_PIN_REVERSE_POL) + val = 1 - val; + p->ops->set_dataout(p->pin_num, val); + return 1; +} + +/* + * show pin number associated with gpio pin. + */ +static ssize_t show_pinnum(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fbxgpio_pin *p; + + p = dev_get_drvdata(dev); + return sprintf(buf, "%i\n", p->pin_num); +} + +/* + * attribute list associated with each class device. + */ +static struct device_attribute gpio_attributes[] = { + __ATTR(direction, 0600, show_direction, store_direction), + __ATTR(data_in, 0400, show_datain, NULL), + __ATTR(data_out, 0600, show_dataout, store_dataout), + __ATTR(pin_num, 0400, show_pinnum, NULL), +}; + +static int fbxgpio_register_pin(struct platform_device *ppdev, + struct fbxgpio_pin *pin) +{ + struct device *dev; + int i, ret; + + dprint("registering pin %s\n", pin->pin_name); + + /* ensure ops is valid */ + if (!pin->ops) { + printk(KERN_ERR PFX "no operation set for pin %s\n", + pin->pin_name); + return -EINVAL; + } + + dev = device_create(fbxgpio_class, &ppdev->dev, 0, pin, + "%s", pin->pin_name); + if (IS_ERR(dev)) + return PTR_ERR(dev); + + for (i = 0; i < ARRAY_SIZE(gpio_attributes); i++) { + ret = device_create_file(dev, &gpio_attributes[i]); + if (ret) + goto err_out; + } + + /* ensure pin direction matches hardware state */ + if (pin->ops->get_direction && + pin->direction != pin->ops->get_direction(pin->pin_num)) { + printk(KERN_WARNING PFX "pin %s default direction does not " + "match current hardware state, fixing.\n", + pin->pin_name); + pin->ops->set_direction(pin->pin_num, pin->direction); + } + pin->dev = dev; + return 0; + +err_out: + for (; i >= 0; i--) + device_remove_file(dev, &gpio_attributes[i]); + device_unregister(dev); + return ret; +} + +static void fbxgpio_unregister_pin(struct fbxgpio_pin *pin) +{ + struct device *dev; + int i; + + dprint("unregistering pin %s\n", pin->pin_name); + dev = pin->dev; + pin->dev = NULL; + + for (i = 0; i < ARRAY_SIZE(gpio_attributes); i++) + device_remove_file(dev, &gpio_attributes[i]); + device_unregister(dev); +} + +static int fbxgpio_platform_probe(struct platform_device *pdev) +{ + struct fbxgpio_pin *p; + int err = 0; + + p = pdev->dev.platform_data; + while (p->pin_name) { + err = fbxgpio_register_pin(pdev, p); + if (err) + return err; + ++p; + } + return 0; +} + +static int fbxgpio_platform_remove(struct platform_device *pdev) +{ + struct fbxgpio_pin *p; + + p = pdev->dev.platform_data; + while (p->pin_name) { + fbxgpio_unregister_pin(p); + ++p; + } + return 0; +} + +static struct platform_driver fbxgpio_platform_driver = +{ + .probe = fbxgpio_platform_probe, + .remove = fbxgpio_platform_remove, + .driver = { + .name = "fbxgpio", + } +}; + +static int __init fbxgpio_init(void) +{ + int ret; + + fbxgpio_class = class_create(THIS_MODULE, "fbxgpio"); + if (IS_ERR(fbxgpio_class)) + return PTR_ERR(fbxgpio_class); + + ret = platform_driver_register(&fbxgpio_platform_driver); + if (ret) { + printk(KERN_ERR PFX "unable to register fbxgpio driver.\n"); + class_destroy(fbxgpio_class); + return ret; + } + return 0; +} + +static void __exit fbxgpio_exit(void) +{ + platform_driver_unregister(&fbxgpio_platform_driver); + class_destroy(fbxgpio_class); +} + +subsys_initcall(fbxgpio_init); +module_exit(fbxgpio_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nicolas Schichan "); diff -Nruw linux-5.4.60-fbx/drivers/fbxgpio./fbxgpio_dt.c linux-5.4.60-fbx/drivers/fbxgpio/fbxgpio_dt.c --- linux-5.4.60-fbx/drivers/fbxgpio./fbxgpio_dt.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxgpio/fbxgpio_dt.c 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1,264 @@ +/* + * fbxgpio_dt.c for fbxgpio + * Created by on Tue Aug 1 14:01:01 2017 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static atomic_t last_id = ATOMIC_INIT(0); + +/* + * fbxgpio driver fetching gpios names and configuration from + * device-tree. + */ + +struct fbxgpio_dt_priv { + struct fbxgpio_pin *pins; + unsigned int npins; + + /* dynamically created platform_device for fbxgpio_core */ + struct platform_device *top_pdev; +}; + + +/* + * small shim layer for gpiolib <-> fbxgpio_operations. + * + * gpio direction change is unsupported, does userspace really need + * it? + */ +static int fbxgpio_dt_get_data(int gpio) +{ + return gpio_get_value_cansleep(gpio); +} + +static void fbxgpio_dt_set_dataout(int gpio, int value) +{ + gpio_set_value_cansleep(gpio, value); +} + +static int fbxgpio_dt_set_direction(int gpio, int dir) +{ + if (dir == GPIO_DIR_OUT) + return gpio_direction_output(gpio, 0); + else + return gpio_direction_input(gpio); +} + +static const struct fbxgpio_operations fbxgpio_dt_ops = { + .get_datain = fbxgpio_dt_get_data, + .get_dataout = fbxgpio_dt_get_data, + .set_dataout = fbxgpio_dt_set_dataout, + .set_direction = fbxgpio_dt_set_direction, +}; + +/* + * fill an fbxgpio_pin with the configuration found in a device tree + * node. + * + * required properties are: + * - gpio: a phandle to a standard linux gpio. + * + * - the name of the node: the name of the gpio as it will appear under + * /sys/class/fbxgpio/ + * + * - //: how to declare gpio and + * actually setup it unless no-claim is given + * + * - : just declare gpio, but don't request & setup it + */ +static int fbxgpio_dt_fill_gpio(struct platform_device *pdev, + struct device_node *np, + struct fbxgpio_pin *pin) +{ + enum of_gpio_flags flags; + int error; + + error = of_property_read_string(np, "name", &pin->pin_name); + if (error) { + dev_err(&pdev->dev, "gpio has no name.\n"); + return error; + } + + pin->pin_num = of_get_named_gpio_flags(np, "gpio", 0, &flags); + if (pin->pin_num < 0) { + if (pin->pin_num != -EPROBE_DEFER) + dev_err(&pdev->dev, + "unable to get gpio desc for %s: %d.\n", + pin->pin_name, pin->pin_num); + return pin->pin_num; + } + + if (of_property_read_bool(np, "input")) { + pin->direction = GPIO_DIR_IN; + } else if (of_property_read_bool(np, "output-low")) { + pin->direction = GPIO_DIR_OUT; + pin->cur_dataout = 0; + } else if (of_property_read_bool(np, "output-high")) { + pin->direction = GPIO_DIR_OUT; + pin->cur_dataout = 1; + } else { + dev_err(&pdev->dev, + "no state specified for %s\n", + pin->pin_name); + return -EINVAL; + } + + if (flags & OF_GPIO_ACTIVE_LOW) { + pin->flags |= FBXGPIO_PIN_REVERSE_POL; + if (pin->direction == GPIO_DIR_OUT) + pin->cur_dataout = 1 - pin->cur_dataout; + } + + if (!of_property_read_bool(np, "no-claim")) { + error = gpio_request(pin->pin_num, "fbxgpio-dt"); + if (error) { + dev_err(&pdev->dev, "unable to request gpio%d (%s): %d\n", + pin->pin_num, pin->pin_name, error); + return error; + } + pin->claimed = true; + + if (pin->direction == GPIO_DIR_OUT) + gpio_direction_output(pin->pin_num, pin->cur_dataout); + else + gpio_direction_input(pin->pin_num); + } + + if (of_property_read_bool(np, "bidir")) + pin->flags = FBXGPIO_PIN_DIR_RW; + + pin->of_node = np; + pin->ops = &fbxgpio_dt_ops; + return 0; +} + +static int fbxgpio_dt_probe(struct platform_device *pdev) +{ + struct fbxgpio_dt_priv *priv; + struct device_node *fbxgpio_node; + u32 cur_gpio; + int error = 0; + size_t priv_alloc_size; + int i; + + priv = devm_kzalloc(&pdev->dev, sizeof (*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + dev_set_drvdata(&pdev->dev, priv); + + /* + * first pass to get the number of struct fbxgpio_pin to + * allocate. + */ + for_each_available_child_of_node(pdev->dev.of_node, fbxgpio_node) { + ++priv->npins; + } + + /* + * allocate pins: use npins + 1 for zeroed end sentinel. + */ + priv_alloc_size = (priv->npins + 1) * sizeof (struct fbxgpio_pin); + priv->pins = devm_kzalloc(&pdev->dev, priv_alloc_size, GFP_KERNEL); + if (!priv->pins) + return -ENOMEM; + + /* + * second pass to fill the priv->pins array. + */ + cur_gpio = 0; + for_each_available_child_of_node(pdev->dev.of_node, fbxgpio_node) { + error = fbxgpio_dt_fill_gpio(pdev, fbxgpio_node, + &priv->pins[cur_gpio]); + if (error) + goto out_free_gpios; + ++cur_gpio; + } + + dev_info(&pdev->dev, "%u gpios.\n", priv->npins); + + /* + * create and register a platform device for fbxgpio_core. + */ + priv->top_pdev = platform_device_register_data(&pdev->dev, + "fbxgpio", + atomic_inc_return(&last_id), + priv->pins, + priv_alloc_size); + + if (IS_ERR(priv->top_pdev)) { + dev_err(&pdev->dev, "unable to register fbxgpio platform " + "device: %ld\n", PTR_ERR(priv->top_pdev)); + return PTR_ERR(priv->top_pdev); + } + + for (i = 0; i < priv->npins; i++) { + struct fbxgpio_pin *pin = &priv->pins[i]; + + if (pin->direction == GPIO_DIR_OUT) + dev_dbg(&pdev->dev, + "%sgpio %d (%s) is output, default %d\n", + pin->claimed ? "unclaimed " : "", + pin->pin_num, pin->pin_name, pin->cur_dataout); + else + dev_dbg(&pdev->dev, + "%sgpio %d (%s) is input\n", + pin->claimed ? "unclaimed " : "", + pin->pin_num, pin->pin_name); + } + + return 0; + +out_free_gpios: + while (cur_gpio) { + --cur_gpio; + if (priv->pins[cur_gpio].claimed) + gpio_free(priv->pins[cur_gpio].pin_num); + } + return error; +} + +static int fbxgpio_dt_remove(struct platform_device *pdev) +{ + struct fbxgpio_dt_priv *priv = dev_get_drvdata(&pdev->dev); + unsigned int i; + + platform_device_unregister(priv->top_pdev); + + for (i = 0; i < priv->npins; ++i) { + if (priv->pins[i].claimed) + gpio_free(priv->pins[i].pin_num); + } + + return 0; +} + +static const struct of_device_id fbxgpio_dt_of_match_table[] = { + { .compatible = "fbx,fbxgpio" }, + { }, +}; +MODULE_DEVICE_TABLE(of, fbxgpio_dt_of_match_table); + +static struct platform_driver fbxgpio_dt_platform_driver = { + .probe = fbxgpio_dt_probe, + .remove = fbxgpio_dt_remove, + .driver = { + .name = "fbxgpio-dt", + .of_match_table = fbxgpio_dt_of_match_table, + }, +}; + +module_platform_driver(fbxgpio_dt_platform_driver); + +MODULE_AUTHOR("Nicolas Schichan "); +MODULE_DESCRIPTION("DT Freebox GPIO Driver"); +MODULE_LICENSE("GPL v2"); diff -Nruw linux-5.4.60-fbx/drivers/fbxgpio./Kconfig linux-5.4.60-fbx/drivers/fbxgpio/Kconfig --- linux-5.4.60-fbx/drivers/fbxgpio./Kconfig 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxgpio/Kconfig 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1,7 @@ +config FREEBOX_GPIO + tristate "Freebox GPIO control interface" + default n + +config FREEBOX_GPIO_DT + tristate "Freebox GPIO DT binding." + default n diff -Nruw linux-5.4.60-fbx/drivers/fbxgpio./Makefile linux-5.4.60-fbx/drivers/fbxgpio/Makefile --- linux-5.4.60-fbx/drivers/fbxgpio./Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxgpio/Makefile 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1,2 @@ +obj-$(CONFIG_FREEBOX_GPIO) += fbxgpio_core.o +obj-$(CONFIG_FREEBOX_GPIO_DT) += fbxgpio_dt.o diff -Nruw linux-5.4.60-fbx/drivers/fbxjtag./fbxjtag.c linux-5.4.60-fbx/drivers/fbxjtag/fbxjtag.c --- linux-5.4.60-fbx/drivers/fbxjtag./fbxjtag.c 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxjtag/fbxjtag.c 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1,1115 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PFX "fbxjtag: " + +static struct class *fbxjtag_class; + +static enum jtag_state jtag_transitions[][2] = { + [JTAG_STATE_UNDEF] = { JTAG_STATE_UNDEF , JTAG_STATE_UNDEF }, + [JTAG_STATE_TEST_LOGIC_RESET] = { JTAG_STATE_RUN_TEST_IDLE , JTAG_STATE_TEST_LOGIC_RESET }, + [JTAG_STATE_RUN_TEST_IDLE] = { JTAG_STATE_RUN_TEST_IDLE , JTAG_STATE_SELECT_DR }, + + [JTAG_STATE_SELECT_DR] = { JTAG_STATE_CAPTURE_DR , JTAG_STATE_SELECT_IR }, + [JTAG_STATE_CAPTURE_DR] = { JTAG_STATE_SHIFT_DR , JTAG_STATE_EXIT1_DR }, + [JTAG_STATE_SHIFT_DR] = { JTAG_STATE_SHIFT_DR , JTAG_STATE_EXIT1_DR }, + [JTAG_STATE_EXIT1_DR] = { JTAG_STATE_PAUSE_DR , JTAG_STATE_UPDATE_DR }, + [JTAG_STATE_PAUSE_DR] = { JTAG_STATE_PAUSE_DR , JTAG_STATE_EXIT2_DR }, + [JTAG_STATE_EXIT2_DR] = { JTAG_STATE_SHIFT_DR , JTAG_STATE_UPDATE_DR }, + [JTAG_STATE_UPDATE_DR] = { JTAG_STATE_RUN_TEST_IDLE , JTAG_STATE_SELECT_DR }, + + [JTAG_STATE_SELECT_IR] = { JTAG_STATE_CAPTURE_IR , JTAG_STATE_TEST_LOGIC_RESET }, + [JTAG_STATE_CAPTURE_IR] = { JTAG_STATE_SHIFT_IR , JTAG_STATE_EXIT1_IR }, + [JTAG_STATE_SHIFT_IR] = { JTAG_STATE_SHIFT_IR , JTAG_STATE_EXIT1_IR }, + [JTAG_STATE_EXIT1_IR] = { JTAG_STATE_PAUSE_IR , JTAG_STATE_UPDATE_IR }, + [JTAG_STATE_PAUSE_IR] = { JTAG_STATE_PAUSE_IR , JTAG_STATE_EXIT2_IR }, + [JTAG_STATE_EXIT2_IR] = { JTAG_STATE_SHIFT_IR , JTAG_STATE_UPDATE_IR }, + [JTAG_STATE_UPDATE_IR] = { JTAG_STATE_RUN_TEST_IDLE , JTAG_STATE_SELECT_DR }, +}; + + +static char *debug_state_str[] = { + [JTAG_STATE_UNDEF] = "undef", + [JTAG_STATE_TEST_LOGIC_RESET] = "Test logic reset", + [JTAG_STATE_RUN_TEST_IDLE] = "Run test idle", + [JTAG_STATE_SELECT_DR] = "Select DR", + [JTAG_STATE_CAPTURE_DR] = "Capture DR", + [JTAG_STATE_SHIFT_DR] = "Shift DR", + [JTAG_STATE_EXIT1_DR] = "Exit 1 DR", + [JTAG_STATE_PAUSE_DR] = "Pause DR", + [JTAG_STATE_EXIT2_DR] = "Exit 2 DR", + [JTAG_STATE_UPDATE_DR] = "Update DR", + [JTAG_STATE_SELECT_IR] = "Select IR", + [JTAG_STATE_CAPTURE_IR] = "Capture IR", + [JTAG_STATE_SHIFT_IR] = "Shift IR", + [JTAG_STATE_EXIT1_IR] = "Exit 1 IR", + [JTAG_STATE_PAUSE_IR] = "Pause IR", + [JTAG_STATE_EXIT2_IR] = "Exit 2 IR", + [JTAG_STATE_UPDATE_IR] = "Update IR", +}; + +static char *jtag_state_str(enum jtag_state state) { + if (state < JTAG_STATE_UNDEF || state >= JTAG_STATE_MAX) + return "invalid"; + + return debug_state_str[state]; +} + +#define DEBUG_STATE(jtag) printk(KERN_INFO PFX "new state: %s\n", jtag_state_str((jtag)->state)) + +static void set_tms(struct fbxjtag_data *jtag, int val) +{ + struct fbxgpio_pin *tms; + + tms = jtag->gpios.tms; + tms->ops->set_dataout(tms->pin_num, val); + jtag->last_tms_dataout = val; +} + +static void set_tdi(struct fbxjtag_data *jtag, int val) +{ + struct fbxgpio_pin *tdi; + + tdi = jtag->gpios.tdi; + tdi->ops->set_dataout(tdi->pin_num, val); +} + +static int get_tdo(struct fbxjtag_data *jtag) +{ + struct fbxgpio_pin *tdo; + + tdo = jtag->gpios.tdo; + return tdo->ops->get_datain(tdo->pin_num); +} + +static void tck_pulse(struct fbxjtag_data *jtag) +{ + struct fbxgpio_pin *tck; + struct fbxgpio_pin *tms; + int tms_val, tdo_val; + + tms = jtag->gpios.tms; + tck = jtag->gpios.tck; + + + // rising edge + tck->ops->set_dataout(tck->pin_num, 1); + ndelay(jtag->clock_delay); + + // update state + tms_val = jtag->last_tms_dataout; + + // read tdo + if (jtag->state == JTAG_STATE_SHIFT_DR) { + tdo_val = get_tdo(jtag); + jtag->dr_buf[jtag->dr_w] = tdo_val + '0'; + jtag->dr_w = (jtag->dr_w + 1) % JTAG_BUF_SIZE; + } + + if (jtag->state == JTAG_STATE_UNDEF) { + if (tms_val == 1) { + jtag->nb_reset++; + if (jtag->nb_reset >= 5) { + jtag->state = JTAG_STATE_TEST_LOGIC_RESET; + } + } else { + jtag->nb_reset = 0; + } + } else { + jtag->state = jtag_transitions[jtag->state][tms_val]; + } + + // falling edge + tck->ops->set_dataout(tck->pin_num, 0); + ndelay(jtag->clock_delay); +} + +static void set_tms_pulse(struct fbxjtag_data *jtag, int tms) +{ + set_tms(jtag, tms); + tck_pulse(jtag); +} + +static void set_tms_tdi_pulse(struct fbxjtag_data *jtag, int tms, int tdi) +{ + set_tms(jtag, tms); + set_tdi(jtag, tdi); + tck_pulse(jtag); +} + +static void reset_state(struct fbxjtag_data *jtag) +{ + int i; + + for (i = 0; i < JTAG_RESET_STEPS; ++i) + set_tms_pulse(jtag, 1); + jtag->state = JTAG_STATE_TEST_LOGIC_RESET; +} + +static void goto_sub_state(struct fbxjtag_data *jtag, + enum jtag_state new_state) { + + enum jtag_sub_state cur_sub = jtag->state & JTAG_SUB_STATE_MASK; + enum jtag_sub_state new_sub = new_state & JTAG_SUB_STATE_MASK; + + switch(cur_sub) { + case JTAG_SUB_STATE_SELECT: + switch(new_sub) { + case JTAG_SUB_STATE_CAPTURE: + set_tms_pulse(jtag, 0); + // now in CAPTURE + break; + case JTAG_SUB_STATE_SHIFT: + set_tms_pulse(jtag, 0); + // now in CAPTURE + set_tms_pulse(jtag, 0); + // now in SHIFT + break; + case JTAG_SUB_STATE_EXIT1: + set_tms_pulse(jtag, 0); + // now in CAPTURE + set_tms_pulse(jtag, 1); + // now in EXIT1 + break; + case JTAG_SUB_STATE_PAUSE: + set_tms_pulse(jtag, 0); + // now in CAPTURE + set_tms_pulse(jtag, 1); + // now in EXIT1 + set_tms_pulse(jtag, 0); + // now in PAUSE + break; + case JTAG_SUB_STATE_EXIT2: + set_tms_pulse(jtag, 0); + // now in CAPTURE + set_tms_pulse(jtag, 1); + // now in EXIT1 + set_tms_pulse(jtag, 0); + // now in PAUSE + set_tms_pulse(jtag, 1); + // now in EXIT2 + break; + case JTAG_SUB_STATE_UPDATE: + set_tms_pulse(jtag, 0); + // now in CAPTURE + set_tms_pulse(jtag, 1); + // now in EXIT1 + set_tms_pulse(jtag, 1); + // now in UPDATE + break; + case JTAG_SUB_STATE_SELECT: + default: + // stay in SELECT + break; + } + break; + + case JTAG_SUB_STATE_CAPTURE: + case JTAG_SUB_STATE_SHIFT: + switch(new_sub) { + case JTAG_SUB_STATE_SELECT: + set_tms_pulse(jtag, 1); + // now in EXIT1 + set_tms_pulse(jtag, 1); + // now in UPDATE + set_tms_pulse(jtag, 1); + // now in SELECT-DR + if (JTAG_STATE_IN_IR(new_state)) { + // on more 1 to go to select IR + set_tms_pulse(jtag, 1); + // now in SELECT-IR + } + break; + case JTAG_SUB_STATE_SHIFT: + set_tms_pulse(jtag, 0); + // now in SHIFT + break; + case JTAG_SUB_STATE_EXIT1: + set_tms_pulse(jtag, 1); + // now in EXIT1 + break; + case JTAG_SUB_STATE_PAUSE: + set_tms_pulse(jtag, 1); + // now in EXIT1 + set_tms_pulse(jtag, 0); + // now in PAUSE + break; + case JTAG_SUB_STATE_EXIT2: + set_tms_pulse(jtag, 1); + // now in EXIT1 + set_tms_pulse(jtag, 0); + // now in PAUSE + set_tms_pulse(jtag, 1); + // now in EXIT2 + break; + case JTAG_SUB_STATE_UPDATE: + set_tms_pulse(jtag, 1); + // now in EXIT1 + set_tms_pulse(jtag, 1); + // now in UPDATE + break; + case JTAG_SUB_STATE_CAPTURE: + if (cur_sub == JTAG_SUB_STATE_SHIFT) { + goto_sub_state(jtag, + (new_state & JTAG_STATE_MASK) | JTAG_SUB_STATE_SELECT); + goto_sub_state(jtag, new_state); + } + break; + default: + // stay in current state + break; + } + break; + + case JTAG_SUB_STATE_EXIT1: + switch(new_sub) { + case JTAG_SUB_STATE_SELECT: + set_tms_pulse(jtag, 1); + // now in UPDATE + set_tms_pulse(jtag, 1); + // now in SELECT-DR + if (JTAG_STATE_IN_IR(new_state)) { + // on more 1 to go to select IR + set_tms_pulse(jtag, 1); + // now in SELECT-IR + } + break; + case JTAG_SUB_STATE_SHIFT: + set_tms_pulse(jtag, 0); + // now in PAUSE + set_tms_pulse(jtag, 1); + // now in EXIT2 + set_tms_pulse(jtag, 0); + // now in SHIFT + break; + case JTAG_SUB_STATE_PAUSE: + set_tms_pulse(jtag, 0); + // now in PAUSE + break; + case JTAG_SUB_STATE_EXIT2: + set_tms_pulse(jtag, 0); + // now in PAUSE + set_tms_pulse(jtag, 1); + // now in EXIT2 + break; + case JTAG_SUB_STATE_UPDATE: + set_tms_pulse(jtag, 1); + // now in UPDATE + break; + case JTAG_SUB_STATE_CAPTURE: + goto_sub_state(jtag, + (new_state & JTAG_STATE_MASK) | JTAG_SUB_STATE_SELECT); + goto_sub_state(jtag, new_state); + break; + default: + // stay in current state + break; + } + break; + + case JTAG_SUB_STATE_PAUSE: + switch(new_sub) { + case JTAG_SUB_STATE_SELECT: + set_tms_pulse(jtag, 1); + // now in EXIT2 + set_tms_pulse(jtag, 1); + // now in UPDATE + set_tms_pulse(jtag, 1); + // now in SELECT-DR + if (JTAG_STATE_IN_IR(new_state)) { + // on more 1 to go to select IR + set_tms_pulse(jtag, 1); + // now in SELECT-IR + } + break; + case JTAG_SUB_STATE_SHIFT: + set_tms_pulse(jtag, 1); + // now in EXIT2 + set_tms_pulse(jtag, 0); + // now in SHIFT + break; + case JTAG_SUB_STATE_PAUSE: + set_tms_pulse(jtag, 0); + // now in PAUSE + break; + case JTAG_SUB_STATE_EXIT2: + set_tms_pulse(jtag, 1); + // now in EXIT2 + break; + case JTAG_SUB_STATE_UPDATE: + set_tms_pulse(jtag, 1); + // now in EXIT2 + set_tms_pulse(jtag, 1); + // now in UPDATE + break; + case JTAG_SUB_STATE_CAPTURE: + goto_sub_state(jtag, + (new_state & JTAG_STATE_MASK) | JTAG_SUB_STATE_SELECT); + goto_sub_state(jtag, new_state); + break; + default: + // stay in current state + break; + } + break; + + case JTAG_SUB_STATE_EXIT2: + switch(new_sub) { + case JTAG_SUB_STATE_SELECT: + set_tms_pulse(jtag, 1); + // now in UPDATE + set_tms_pulse(jtag, 1); + // now in SELECT-DR + if (JTAG_STATE_IN_IR(new_state)) { + // on more 1 to go to select IR + set_tms_pulse(jtag, 1); + // now in SELECT-IR + } + break; + case JTAG_SUB_STATE_SHIFT: + set_tms_pulse(jtag, 0); + // now in SHIFT + break; + case JTAG_SUB_STATE_PAUSE: + set_tms_pulse(jtag, 0); + // now in SHIFT + set_tms_pulse(jtag, 1); + // now in EXIT 1 + set_tms_pulse(jtag, 0); + // now in PAUSE + break; + case JTAG_SUB_STATE_UPDATE: + set_tms_pulse(jtag, 1); + // now in UPDATE + break; + case JTAG_SUB_STATE_CAPTURE: + goto_sub_state(jtag, + (new_state & JTAG_STATE_MASK) | JTAG_SUB_STATE_SELECT); + goto_sub_state(jtag, new_state); + break; + default: + // stay in current state + break; + } + break; + + case JTAG_SUB_STATE_UPDATE: + switch(new_sub) { + case JTAG_SUB_STATE_SELECT: + set_tms_pulse(jtag, 1); + // now in SELECT-DR + if (JTAG_STATE_IN_IR(new_state)) { + // on more 1 to go to select IR + set_tms_pulse(jtag, 1); + // now in SELECT-IR + } + break; + case JTAG_SUB_STATE_UPDATE: + // stay in current state + break; + default: + goto_sub_state(jtag, + (new_state & JTAG_STATE_MASK) | JTAG_SUB_STATE_SELECT); + goto_sub_state(jtag, new_state); + break; + } + break; + + default: + BUG(); + break; + } +} + +static void goto_state(struct fbxjtag_data *jtag, enum jtag_state new_state) { + + enum jtag_main_state main_state, cur_main_state; + + if (jtag->state == JTAG_STATE_UNDEF) { + reset_state(jtag); + } + + main_state = new_state & JTAG_STATE_MASK; + cur_main_state = jtag->state & JTAG_STATE_MASK; + + if (main_state != cur_main_state) { + switch(cur_main_state) { + case JTAG_STATE_DR_MASK: + case JTAG_STATE_IR_MASK: + goto_state(jtag, (jtag->state & JTAG_STATE_MASK) | JTAG_SUB_STATE_UPDATE); + // now in UPDATE_DR or UPDATE_IR + + switch(main_state) { + case JTAG_STATE_TEST_MASK: + set_tms_pulse(jtag, 1); + // now in SELECT_DR + set_tms_pulse(jtag, 1); + // now in SELECT_IR + set_tms_pulse(jtag, 1); + // now in TEST_LOGIC_RESET + break; + + case JTAG_STATE_RUN_MASK: + set_tms_pulse(jtag, 0); + // now in RUN_TEST_IDLE + break; + + case JTAG_STATE_IR_MASK: + set_tms_pulse(jtag, 1); + // now in SELECT_DR + set_tms_pulse(jtag, 1); + // now in SELECT_IR + break; + + case JTAG_STATE_DR_MASK: + set_tms_pulse(jtag, 1); + // now in SELECT_DR + break; + } + break; + + case JTAG_STATE_TEST_MASK: + switch(main_state) { + case JTAG_STATE_RUN_MASK: + set_tms_pulse(jtag, 0); + // now in RUN_TEST_IDLE + break; + + case JTAG_STATE_DR_MASK: + set_tms_pulse(jtag, 0); + // now in RUN_TEST_IDLE + set_tms_pulse(jtag, 1); + // now in SELECT_DR + break; + + case JTAG_STATE_IR_MASK: + set_tms_pulse(jtag, 0); + // now in RUN_TEST_IDLE + set_tms_pulse(jtag, 1); + // now in SELECT_DR + set_tms_pulse(jtag, 1); + // now in SELECT_IR + break; + default: + BUG(); + break; + } + break; + + case JTAG_STATE_RUN_MASK: + switch(main_state) { + case JTAG_STATE_DR_MASK: + set_tms_pulse(jtag, 1); + // now in SELECT_DR + break; + + case JTAG_STATE_IR_MASK: + set_tms_pulse(jtag, 1); + // now in SELECT_DR + set_tms_pulse(jtag, 1); + // now in SELECT_IR + break; + + case JTAG_STATE_TEST_MASK: + set_tms_pulse(jtag, 1); + // now in SELECT_DR + set_tms_pulse(jtag, 1); + // now in SELECT_IR + set_tms_pulse(jtag, 1); + // now in TEST_LOGIC_RESET + break; + default: + printk(KERN_ERR PFX "JTAG TRANSITION ERROR :'( %s:%d", __FILE__, __LINE__); + BUG(); + break; + } + break; + + default: + printk(KERN_ERR PFX "JTAG TRANSITION ERROR :'( %s:%d", __FILE__, __LINE__); + BUG(); + break; + } + + if ((jtag->state & JTAG_STATE_MASK) != main_state) { + printk(KERN_ERR PFX "JTAG error : state %x != %x", + (jtag->state & JTAG_STATE_MASK), + main_state); + } + BUG_ON((jtag->state & JTAG_STATE_MASK) != main_state); + + if (new_state == JTAG_STATE_TEST_LOGIC_RESET + || new_state == JTAG_STATE_RUN_TEST_IDLE) + return; // we're done + } + + // now main_state == cur_main_state + + switch(new_state) { + case JTAG_STATE_TEST_LOGIC_RESET: + // stay in TEST_LOGIC_RESET + set_tms_pulse(jtag, 1); + return; + case JTAG_STATE_RUN_TEST_IDLE: + // stay in JTAG_STATE_RUN_TEST_IDLE + set_tms_pulse(jtag, 0); + return; + default: + break; + } + + // move inside IR or DR + goto_sub_state(jtag, new_state); + if (jtag->state != new_state) { + printk(KERN_ERR PFX "JTAG Error: state is %s instead of %s", + jtag_state_str(jtag->state), + jtag_state_str(new_state)); + } + BUG_ON(jtag->state != new_state); +} + +static ssize_t show_state(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct fbxjtag_data *jtag; + jtag = dev_get_drvdata(dev); + return sprintf(buf, "%s\n", jtag_state_str(jtag->state)); +} + +static ssize_t write_state(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + unsigned long new_state = simple_strtoul(buf, NULL, 10); + jtag = dev_get_drvdata(dev); + + switch(new_state) { + case JTAG_STATE_TEST_LOGIC_RESET: + case JTAG_STATE_RUN_TEST_IDLE: + case JTAG_STATE_SELECT_DR: + case JTAG_STATE_CAPTURE_DR: + case JTAG_STATE_SHIFT_DR: + case JTAG_STATE_EXIT1_DR: + case JTAG_STATE_PAUSE_DR: + case JTAG_STATE_EXIT2_DR: + case JTAG_STATE_UPDATE_DR: + case JTAG_STATE_SELECT_IR: + case JTAG_STATE_CAPTURE_IR: + case JTAG_STATE_SHIFT_IR: + case JTAG_STATE_EXIT1_IR: + case JTAG_STATE_PAUSE_IR: + case JTAG_STATE_EXIT2_IR: + case JTAG_STATE_UPDATE_IR: + goto_state(jtag, new_state); + return size; + + default: + printk(KERN_ERR PFX "Trying to set an invalid state: %lx\n", new_state); + return -EINVAL; + } +} + + +static ssize_t show_tck(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + return sprintf(buf, "%i\n", jtag->gpios.tck->pin_num); +} + +static ssize_t show_tms(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + return sprintf(buf, "%i\n", jtag->gpios.tms->pin_num); +} + +static ssize_t show_tdi(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + return sprintf(buf, "%i\n", jtag->gpios.tdi->pin_num); +} + +static ssize_t show_tdo(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + return sprintf(buf, "%i\n", jtag->gpios.tdo->pin_num); +} + +static ssize_t write_reset(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + reset_state(jtag); + + return size; +} + +static ssize_t read_data(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fbxjtag_data *jtag; + size_t len; + + jtag = dev_get_drvdata(dev); + len = jtag->dr_w - jtag->dr_r; + if (len < 0) + len += JTAG_BUF_SIZE; + + memcpy(buf, jtag->dr_buf, len); + buf[len] = '\0'; + return len + 1; +} + +static ssize_t write_data(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + size_t real_size = 0; + int i; + + if (!size) + return size; + + for (i = 0; i < size; ++i) + if ((buf[i] == '0') || (buf[i] == '1')) + real_size++; + + if (!real_size) + return size; + + jtag = dev_get_drvdata(dev); + + // reset read buffer + jtag->dr_r = 0; + jtag->dr_w = 0; + goto_state(jtag, JTAG_STATE_SHIFT_DR); + for (i = 0; real_size > 0; ++i) { + if ((buf[i] == '0') || (buf[i] == '1')) { + if (real_size-- > 1) + /* stay in shift */ + set_tms_tdi_pulse(jtag, 0, buf[i] - '0'); + else + /* exit */ + set_tms_tdi_pulse(jtag, 1, buf[i] - '0'); + } + } + BUG_ON(jtag->state != JTAG_STATE_EXIT1_DR); + goto_state(jtag, JTAG_STATE_UPDATE_DR); + + return size; +} + +static ssize_t read_instruction(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fbxjtag_data *jtag; + size_t len; + + jtag = dev_get_drvdata(dev); + len = jtag->ir_w - jtag->ir_r; + if (len < 0) + len += JTAG_BUF_SIZE; + + memcpy(buf, jtag->ir_buf, len); + buf[len] = '\0'; + return len + 1; +} + +static ssize_t write_instruction(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + size_t real_size = 0; + int i; + + if (!size) + return size; + + for (i = 0; i < size; ++i) + if ((buf[i] == '0') || (buf[i] == '1')) + real_size++; + + if (!real_size) + return size; + + jtag = dev_get_drvdata(dev); + + // reset read buffer + jtag->ir_r = 0; + jtag->ir_w = 0; + goto_state(jtag, JTAG_STATE_SHIFT_IR); + for (i = 0; real_size > 0; ++i) { + if ((buf[i] == '0') || (buf[i] == '1')) { + if (real_size-- > 1) + /* stay in shift */ + set_tms_tdi_pulse(jtag, 0, buf[i] - '0'); + else + /* exit */ + set_tms_tdi_pulse(jtag, 1, buf[i] - '0'); + } + } + BUG_ON(jtag->state != JTAG_STATE_EXIT1_IR); + goto_state(jtag, JTAG_STATE_UPDATE_IR); + + return size; +} + +static ssize_t show_clock_delay(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + + return sprintf(buf, "%u\n", jtag->clock_delay); +} + +static ssize_t write_clock_delay(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + + jtag->clock_delay = simple_strtoul(buf, NULL, 10); + + return size; +} + +static ssize_t show_wait_tms(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + + return sprintf(buf, "%u\n", jtag->wait_tms); +} + +static ssize_t write_wait_tms(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + + if (!size) + return size; + + jtag = dev_get_drvdata(dev); + + switch (*buf) { + case '0': + jtag->wait_tms = 0; + break ; + case '1': + jtag->wait_tms = 1; + break ; + default: + return -EINVAL; + } + + return size; +} + +static ssize_t write_wait_time(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + int i; + unsigned long val; + + val = simple_strtoul(buf, NULL, 10); + + if (!val) + return -EINVAL; + + jtag = dev_get_drvdata(dev); + + for (i = 0; i < val; ++i) { + set_tms_pulse(jtag, jtag->wait_tms); + } + + return size; +} + +static ssize_t show_data_read_size(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + + return sprintf(buf, "%u\n", jtag->data_read_size); +} + +static ssize_t write_data_read_size(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + unsigned long val; + + val = simple_strtoul(buf, NULL, 10); + + if (!val) + return -EINVAL; + + jtag = dev_get_drvdata(dev); + jtag->data_read_size = val; + + return size; +} + +static ssize_t show_instruction_read_size(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct fbxjtag_data *jtag; + + jtag = dev_get_drvdata(dev); + + return sprintf(buf, "%u\n", jtag->instruction_read_size); +} + +static ssize_t write_instruction_read_size(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct fbxjtag_data *jtag; + unsigned long val; + + val = simple_strtoul(buf, NULL, 10); + + if (!val) + return -EINVAL; + + jtag = dev_get_drvdata(dev); + jtag->instruction_read_size = val; + + return size; +} + +static struct device_attribute jtag_attributes[] = { + __ATTR(tck, 0400, show_tck, NULL), + __ATTR(tms, 0400, show_tms, NULL), + __ATTR(tdi, 0400, show_tdi, NULL), + __ATTR(tdo, 0400, show_tdo, NULL), + __ATTR(clock_delay, 0600, show_clock_delay, write_clock_delay), + __ATTR(wait_tms, 0600, show_wait_tms, write_wait_tms), + __ATTR(wait_time, 0200, NULL, write_wait_time), + __ATTR(data_read_size, 0600, show_data_read_size, write_data_read_size), + __ATTR(instruction_read_size, 0600, show_instruction_read_size, + write_instruction_read_size), + __ATTR(data, 0600, read_data, write_data), + __ATTR(instruction, 0600, read_instruction, write_instruction), + __ATTR(reset, 0200, NULL, write_reset), + __ATTR(state, 0600, show_state, write_state), +}; + +static int fbxjtag_register_jtag(struct platform_device *ppdev, + struct fbxjtag_data *jtag) +{ + struct device *dev; + int i, ret; + + printk(KERN_INFO PFX "registering jtag %s\n", jtag->name); + + if (!jtag->gpios.tck || !jtag->gpios.tms || + !jtag->gpios.tdi || !jtag->gpios.tdo) { + printk(KERN_ERR PFX "a gpio is not set\n"); + return -ENODEV; + } + + dev = device_create(fbxjtag_class, &ppdev->dev, 0, jtag, + "%s", jtag->name); + + if (IS_ERR(dev)) + return PTR_ERR(dev); + + for (i = 0; i < ARRAY_SIZE(jtag_attributes); ++i) { + ret = device_create_file(dev, &jtag_attributes[i]); + if (ret) + goto err_out; + } + + jtag->dev = dev; + jtag->nb_reset = 0; + jtag->state = JTAG_STATE_UNDEF; + jtag->dr_r = 0; + jtag->dr_w = 0; + jtag->ir_r = 0; + jtag->ir_w = 0; + return 0; + +err_out: + for (; i >= 0; --i) + device_remove_file(dev, &jtag_attributes[i]); + device_unregister(dev); + return ret; +} + +static void fbxjtag_unregister_jtag(struct fbxjtag_data *jtag) +{ + struct device *dev; + int i; + + printk(KERN_INFO PFX "unregistering jtag %s\n", jtag->name); + dev = jtag->dev; + jtag->dev = NULL; + + for (i = 0; i < ARRAY_SIZE(jtag_attributes); ++i) + device_remove_file(dev, &jtag_attributes[i]); + device_unregister(dev); +} + +static int fbxjtag_from_of(struct fbxjtag_data *jtag, + struct platform_device *pdev) +{ + int error; + + error = of_property_read_string(pdev->dev.of_node, "name", + &jtag->name); + if (error) + return error; + + error = of_property_read_u32(pdev->dev.of_node, "clock-delay", + &jtag->clock_delay); + if (error) + return error; + + error = of_property_read_u32(pdev->dev.of_node, "wait-tms", + &jtag->wait_tms); + if (error) + return error; + + error = of_property_read_u32(pdev->dev.of_node, "data-read-size", + &jtag->data_read_size); + if (error) + return error; + + error = of_property_read_u32(pdev->dev.of_node, "inst-read-size", + &jtag->instruction_read_size); + if (error) + return error; + + jtag->gpios.tck = fbxgpio_of_get(pdev->dev.of_node, "fbxgpio-tck", 0); + if (IS_ERR(jtag->gpios.tck)) + return PTR_ERR(jtag->gpios.tck); + + jtag->gpios.tdi = fbxgpio_of_get(pdev->dev.of_node, "fbxgpio-tdi", 0); + if (IS_ERR(jtag->gpios.tdi)) + return PTR_ERR(jtag->gpios.tdi); + + jtag->gpios.tdo = fbxgpio_of_get(pdev->dev.of_node, "fbxgpio-tdo", 0); + if (IS_ERR(jtag->gpios.tdo)) + return PTR_ERR(jtag->gpios.tdo); + + jtag->gpios.tms = fbxgpio_of_get(pdev->dev.of_node, "fbxgpio-tms", 0); + if (IS_ERR(jtag->gpios.tms)) + return PTR_ERR(jtag->gpios.tms); + + return 0; +} + +static int fbxjtag_platform_probe(struct platform_device *pdev) +{ + struct fbxjtag_data *jtag; + + jtag = pdev->dev.platform_data; + if (!jtag) { + int error; + jtag = devm_kzalloc(&pdev->dev, sizeof (*jtag), GFP_KERNEL); + if (!jtag) + return -ENOMEM; + error = fbxjtag_from_of(jtag, pdev); + if (error) + return error; + + dev_set_drvdata(&pdev->dev, jtag); + } + if (jtag && jtag->name) + return fbxjtag_register_jtag(pdev, jtag); + + return -EINVAL; +} + +static int fbxjtag_platform_remove(struct platform_device *pdev) +{ + struct fbxjtag_data *jtag; + + jtag = pdev->dev.platform_data; + if (!jtag) + jtag = dev_get_drvdata(&pdev->dev); + if (jtag->name) + fbxjtag_unregister_jtag(jtag); + + return 0; +} + +static const struct of_device_id fbxjtag_of_match_table[] = { + { .compatible = "fbx,fbxjtag" }, + { }, +}; +MODULE_DEVICE_TABLE(of, fbxjtag_of_match_table); + +static struct platform_driver fbxjtag_platform_driver = +{ + .probe = fbxjtag_platform_probe, + .remove = fbxjtag_platform_remove, + .driver = { + .name = "fbxjtag", + .of_match_table = fbxjtag_of_match_table, + }, +}; + +static int __init fbxjtag_init(void) +{ + int ret; + + fbxjtag_class = class_create(THIS_MODULE, "fbxjtag"); + if (IS_ERR(fbxjtag_class)) + return PTR_ERR(fbxjtag_class); + + ret = platform_driver_register(&fbxjtag_platform_driver); + if (ret) { + printk(KERN_ERR PFX "unable to register fbxjtag driver.\n"); + class_destroy(fbxjtag_class); + } + + return ret; +} + +static void __exit fbxjtag_exit(void) +{ + printk(KERN_DEBUG PFX "exit fbxjtag\n"); + platform_driver_unregister(&fbxjtag_platform_driver); + class_destroy(fbxjtag_class); +} + +module_init(fbxjtag_init); +module_exit(fbxjtag_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Arnaud de Turckheim +#include +#include +#include +#include +#include +#include +#include + +#include + +#define PFX "fbxprocfs: " + + +static struct list_head clients; +static struct mutex clients_mutex; + +static struct proc_dir_entry *root; + +/* + * register a fbxprocfs client with given dirname, caller should + * consider returned struct opaque + */ +struct fbxprocfs_client *fbxprocfs_add_client(const char *dirname, + struct module *owner) +{ + struct fbxprocfs_client *ret, *p; + + ret = NULL; + mutex_lock(&clients_mutex); + + /* check for duplicate */ + list_for_each_entry(p, &clients, list) { + if (!strcmp(dirname, p->dirname)) + goto out; + } + + if (!(ret = kmalloc(sizeof (*ret), GFP_KERNEL))) { + printk(KERN_ERR PFX "kmalloc failed\n"); + goto out; + } + + /* try to create client directory */ + if (!(ret->dir = proc_mkdir(dirname, root))) { + printk(KERN_ERR PFX "can't create %s dir\n", dirname); + kfree(ret); + ret = NULL; + goto out; + } + + atomic_set(&ret->refcount, 1); + ret->dirname = dirname; + list_add(&ret->list, &clients); + +out: + mutex_unlock(&clients_mutex); + return ret; +} + +/* + * unregister a fbxprocfs client, make sure usage count is zero + */ +int fbxprocfs_remove_client(struct fbxprocfs_client *client) +{ + int ret; + + mutex_lock(&clients_mutex); + + ret = 0; + if (atomic_read(&client->refcount) > 1) { + ret = -EBUSY; + goto out; + } + + remove_proc_entry(client->dirname, root); + list_del(&client->list); + kfree(client); + +out: + mutex_unlock(&clients_mutex); + return ret; +} + +/* + * remove given entries from client directory + */ +static int +__remove_entries(struct fbxprocfs_client *client, + const struct fbxprocfs_desc *ro_desc, + const struct fbxprocfs_desc *rw_desc) +{ + int i; + + for (i = 0; ro_desc && ro_desc[i].name; i++) { + remove_proc_entry(ro_desc[i].name, client->dir); + atomic_dec(&client->refcount); + } + + for (i = 0; rw_desc && rw_desc[i].name; i++) { + remove_proc_entry(rw_desc[i].name, client->dir); + atomic_dec(&client->refcount); + } + + return 0; +} + +/* + * replacement for NULL rfunc. + */ +static int bad_rfunc(struct seq_file *m, void *ptr) +{ + return -EACCES; +} + +/* + * fbxprocfs write path is now handled by seq_file code. this + * simplifies client code greatly. + */ +static int fbxprocfs_open(struct inode *inode, struct file *file) +{ + const struct fbxprocfs_desc *desc = PDE_DATA(inode); + + return single_open(file, desc->rfunc ? desc->rfunc : bad_rfunc, + (void*)desc->id); +} + +/* + * no particular help from kernel in the write path, fetch user buffer + * in a kernel buffer and call write func. + */ +static ssize_t fbxprocfs_write(struct file *file, const char __user *ubuf, + size_t len, loff_t *off) +{ + /* + * get fbxprocfs desc via the proc_dir_entry in file inode + */ + struct fbxprocfs_desc *d = PDE_DATA(file_inode(file)); + char *kbuf; + int ret; + + /* + * must have a wfunc callback. + */ + if (!d->wfunc) + return -EACCES; + + /* + * allow up to SZ_4K bytes to be written. + */ + if (len > SZ_4K) + return -EOVERFLOW; + + /* + * alloc and fetch kernel buffer containing user data. + */ + kbuf = kmalloc(SZ_4K, GFP_KERNEL); + if (!kbuf) + return -ENOMEM; + + ret = -EFAULT; + if (copy_from_user(kbuf, ubuf, len)) + goto kfree; + + ret = d->wfunc(file, kbuf, len, (void*)d->id); + +kfree: + kfree(kbuf); + return ret; +} + +/* + * fbxprocfs file operations, read stuff is handled by seq_file code. + */ +static const struct file_operations fbxprocfs_fops = { + .open = fbxprocfs_open, + .llseek = seq_lseek, + .read = seq_read, + .release = single_release, + .write = fbxprocfs_write, +}; + +/* + * replaces create_proc_read_entry removed in latest kernels. + */ +static struct proc_dir_entry *__create_proc_read_entry( + const struct fbxprocfs_desc *desc, + struct proc_dir_entry *base) +{ + return proc_create_data(desc->name, 0, base, &fbxprocfs_fops, + (void*)desc); +} + +/* + * replaces create_proc_entry removed in latest kernels. + */ +static struct proc_dir_entry *__create_proc_entry( + const struct fbxprocfs_desc *desc, + struct proc_dir_entry *base) +{ + return proc_create_data(desc->name, S_IFREG | S_IWUSR | S_IRUGO, + base, &fbxprocfs_fops, (void*)desc); +} + +/* + * create given entries in client directory + */ +static int +__create_entries(struct fbxprocfs_client *client, + const struct fbxprocfs_desc *ro_desc, + const struct fbxprocfs_desc *rw_desc) +{ + struct proc_dir_entry *proc; + int i; + + for (i = 0; ro_desc && ro_desc[i].name; i++) { + if (!(proc = __create_proc_read_entry(&ro_desc[i], + client->dir))) { + printk(KERN_ERR PFX "can't create %s/%s entry\n", + client->dirname, ro_desc[i].name); + goto err; + } + atomic_inc(&client->refcount); + } + + for (i = 0; rw_desc && rw_desc[i].name; i++) { + if (!(proc = __create_proc_entry(&rw_desc[i], client->dir))) { + printk(KERN_ERR PFX "can't create %s/%s entry\n", + client->dirname, ro_desc[i].name); + goto err; + } + atomic_inc(&client->refcount); + } + + return 0; + +err: + __remove_entries(client, ro_desc, rw_desc); + return -1; +} + +int +fbxprocfs_create_entries(struct fbxprocfs_client *client, + const struct fbxprocfs_desc *ro_desc, + const struct fbxprocfs_desc *rw_desc) +{ + int ret; + + ret = __create_entries(client, ro_desc, rw_desc); + return ret; +} + +int +fbxprocfs_remove_entries(struct fbxprocfs_client *client, + const struct fbxprocfs_desc *ro_desc, + const struct fbxprocfs_desc *rw_desc) +{ + int ret; + + ret = __remove_entries(client, ro_desc, rw_desc); + return ret; +} + + +static int __init +fbxprocfs_init(void) +{ + INIT_LIST_HEAD(&clients); + mutex_init(&clients_mutex); + + /* create freebox directory */ + if (!(root = proc_mkdir("freebox", NULL))) { + printk(KERN_ERR PFX "can't create freebox/ dir\n"); + return -EIO; + } + return 0; +} + +static void __exit +fbxprocfs_exit(void) +{ + remove_proc_entry("freebox", NULL); +} + +module_init(fbxprocfs_init); +module_exit(fbxprocfs_exit); + +EXPORT_SYMBOL(fbxprocfs_create_entries); +EXPORT_SYMBOL(fbxprocfs_remove_entries); +EXPORT_SYMBOL(fbxprocfs_add_client); +EXPORT_SYMBOL(fbxprocfs_remove_client); + +MODULE_LICENSE("GPL"); +MODULE_VERSION("1.0"); +MODULE_AUTHOR("Maxime Bizon "); + diff -Nruw linux-5.4.60-fbx/drivers/fbxprocfs./Kconfig linux-5.4.60-fbx/drivers/fbxprocfs/Kconfig --- linux-5.4.60-fbx/drivers/fbxprocfs./Kconfig 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxprocfs/Kconfig 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1,2 @@ +config FREEBOX_PROCFS + tristate "Freebox procfs interface" diff -Nruw linux-5.4.60-fbx/drivers/fbxprocfs./Makefile linux-5.4.60-fbx/drivers/fbxprocfs/Makefile --- linux-5.4.60-fbx/drivers/fbxprocfs./Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxprocfs/Makefile 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1 @@ +obj-$(CONFIG_FREEBOX_PROCFS) += fbxprocfs.o diff -Nruw linux-5.4.60-fbx/drivers/fbxwatchdog./Kconfig linux-5.4.60-fbx/drivers/fbxwatchdog/Kconfig --- linux-5.4.60-fbx/drivers/fbxwatchdog./Kconfig 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxwatchdog/Kconfig 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1,24 @@ +menuconfig FREEBOX_WATCHDOG + tristate "Freebox Watchdog" + default n + +if FREEBOX_WATCHDOG + +config FREEBOX_WATCHDOG_CHAR + bool "Freebox Watchdog char device interface." + default n + +config FREEBOX_WATCHDOG_ORION + tristate "Marvell Orion support" + depends on PLAT_ORION + +config FREEBOX_WATCHDOG_BCM63XX + tristate "Broadcom 63xx Freebox Watchdog support" + depends on BCM63XX + default n + +config FREEBOX_WATCHDOG_BCM63XX_OF + tristate "Broadcom 63xx Freebox Watchdog support (generic)" + depends on OF && !FREEBOX_WATCHDOG_BCM63XX + +endif diff -Nruw linux-5.4.60-fbx/drivers/fbxwatchdog./Makefile linux-5.4.60-fbx/drivers/fbxwatchdog/Makefile --- linux-5.4.60-fbx/drivers/fbxwatchdog./Makefile 1970-01-01 01:00:00.000000000 +0100 +++ linux-5.4.60-fbx/drivers/fbxwatchdog/Makefile 2021-03-04 13:20:57.760838887 +0100 @@ -0,0 +1,10 @@ +obj-$(CONFIG_FREEBOX_WATCHDOG) += fbxwatchdog.o + +fbxwatchdog-objs = fbxwatchdog_core.o +ifeq ($(CONFIG_FREEBOX_WATCHDOG_CHAR),y) +fbxwatchdog-objs += fbxwatchdog_char.o +endif + +obj-$(CONFIG_FREEBOX_WATCHDOG_ORION) += fbxwatchdog_orion.o +obj-$(CONFIG_FREEBOX_WATCHDOG_BCM63XX) += fbxwatchdog_bcm63xx.o +obj-$(CONFIG_FREEBOX_WATCHDOG_BCM63XX_OF) += fbxwatchdog_bcm63xx_of.o --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/drivers/hwmon/ap806-hwmon.c 2021-03-04 13:20:58.450838918 +0100 @@ -0,0 +1,284 @@ +/* + * ap806.c for ap806-hwmon + * Created by on Tue Oct 3 15:43:07 2017 + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define AP806_SENSOR_CTRL 0x0 +# define AP806_SENSOR_CTRL_START BIT(0) +# define AP806_SENSOR_CTRL_RESET BIT(1) +# define AP806_SENSOR_CTRL_ENABLE BIT(2) + +#define CP110_TSEN_CONTROL 0x4 +# define CP110_TSEN_CONTROL_HW_RESET BIT(8) + +#define AP806_SENSOR_STATUS 0x8 +# define AP806_SENSOR_STATUS_READOUT_MASK (0x3ff) + +#define CP110_SENSOR_VALID_BIT 10 +#define AP806_SENSOR_VALID_BIT 16 + +#define SENSOR_READ_SMC ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_OEM, 0) + +#define SENSOR_WRITE_SMC ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_64, \ + ARM_SMCCC_OWNER_OEM, 1) + +struct ap806_hwmon_priv { + void __iomem *regs; + struct device *hwmon_dev; + const struct sensor_data *data; + + bool requires_smc; + unsigned long io_phys_base; + struct device *dev; + +}; + +struct sensor_data { + u32 readout_valid_bit; + bool two_complement; + unsigned long coef_b; + unsigned long coef_m; + unsigned long coef_div; + int (*init_sensor)(struct ap806_hwmon_priv *priv); +}; + +/* + * SMC/IO accessors for sensors. on A8K, sensors registers lie in the + * DFX space which may have to be configured to reject non secure + * accesses (fuses block are on the DFX space). + * + * Freebox ATF implements IO accessors for sensor registers via SMC + * call to the secure monitor. + * + * Ideally we should put these details in a regmap but this will do + * for now. + */ +static int sensor_read(u32 *v, struct ap806_hwmon_priv *priv, u32 reg_off) +{ + if (!priv->requires_smc) { + *v = readl(priv->regs + reg_off); + return 0; + } else { + struct arm_smccc_res smc_res; + + arm_smccc_smc(SENSOR_READ_SMC, priv->io_phys_base + reg_off, + 0, 0, 0, 0, 0, 0, &smc_res); + if (smc_res.a0) { + dev_err(priv->dev, "read SMC failed.\n"); + return -ENXIO; + } else { + *v = smc_res.a1; + return 0; + } + } +} + +static int sensor_write(u32 value, struct ap806_hwmon_priv *priv, u32 reg_off) +{ + if (!priv->requires_smc) { + writel(value, priv->regs + reg_off); + return 0; + } else { + struct arm_smccc_res smc_res; + + arm_smccc_smc(SENSOR_WRITE_SMC, value, + priv->io_phys_base + reg_off, + 0, 0, 0, 0, 0, &smc_res); + + if (smc_res.a0) { + dev_err(priv->dev, "write SMC failed.\n"); + return -ENXIO; + } + return 0; + } +} + +static int ap806_init_sensor(struct ap806_hwmon_priv *priv) +{ + u32 reg; + int error; + + /* + * dereset and start sensor. + */ + error = sensor_read(®, priv, AP806_SENSOR_CTRL); + if (error) + return error; + + reg &= ~AP806_SENSOR_CTRL_RESET; + reg |= AP806_SENSOR_CTRL_ENABLE; + reg |= AP806_SENSOR_CTRL_START; + + return sensor_write(reg, priv, AP806_SENSOR_CTRL); +} + +static int cp110_init_sensor(struct ap806_hwmon_priv *priv) +{ + u32 reg; + int error; + /* + * dereset sensor. + */ + error = sensor_read(®, priv, CP110_TSEN_CONTROL); + if (error) + return error; + + reg |= CP110_TSEN_CONTROL_HW_RESET; + + return sensor_write(reg, priv, CP110_TSEN_CONTROL); +} + +static const struct sensor_data ap806_sensor_data = { + .readout_valid_bit = AP806_SENSOR_VALID_BIT, + .coef_b = 153400, + .coef_m = 425, + .coef_div = 1, + .two_complement = true, + .init_sensor = ap806_init_sensor, +}; + +static const struct sensor_data cp110_sensor_data = { + .readout_valid_bit = CP110_SENSOR_VALID_BIT, + .coef_b = -2791000UL, + .coef_m = 4761UL, + .coef_div = 10, + .two_complement = false, + .init_sensor = cp110_init_sensor, +}; + +static ssize_t ap806_show_temp(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ap806_hwmon_priv *priv = dev_get_drvdata(dev); + const struct sensor_data *data = priv->data; + u32 reg; + int value; + int error; + + error = sensor_read(®, priv, AP806_SENSOR_STATUS); + if (error) + return -ENXIO; + + if ((reg & (1 << data->readout_valid_bit)) == 0) + return -EIO; + + reg &= AP806_SENSOR_STATUS_READOUT_MASK; + + if (data->two_complement && reg >= 512) + reg = reg - 1024; + + value = (data->coef_m * (long)reg + data->coef_b) / + data->coef_div; + return sprintf(buf, "%d\n", value); +} + +static SENSOR_DEVICE_ATTR_2(temp0_input, S_IRUGO, ap806_show_temp, NULL, 0, 0); + +static struct attribute *temp_attrs[] = { + &sensor_dev_attr_temp0_input.dev_attr.attr, + NULL +}; + +static const struct attribute_group ap806_temperature_attr_group = { + .attrs = temp_attrs, +}; + +static const struct of_device_id ap806_hwmon_of_match[] = { + { .compatible = "marvell,ap806-hwmon", .data = &ap806_sensor_data }, + { .compatible = "marvell,cp110-hwmon", .data = &cp110_sensor_data }, + { }, +}; +MODULE_DEVICE_TABLE(of, ap806_hwmon_of_match); + +static int ap806_hwmon_probe(struct platform_device *pdev) +{ + struct ap806_hwmon_priv *priv; + struct resource *reg_resource; + int error; + const struct of_device_id *match; + + match = of_match_device(ap806_hwmon_of_match, &pdev->dev); + if (!match) + return -ENODEV; + + priv = devm_kzalloc(&pdev->dev, sizeof (*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + dev_set_drvdata(&pdev->dev, priv); + priv->dev = &pdev->dev; + + reg_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!reg_resource) + return -EINVAL; + + if (of_property_read_bool(pdev->dev.of_node, "fbx,requires-smc")) { + dev_info(&pdev->dev, "using SMC to access registers.\n"); + priv->requires_smc = true; + priv->io_phys_base = reg_resource->start; + } else { + priv->regs = devm_ioremap_resource(&pdev->dev, reg_resource); + if (!priv->regs) + return -ENOMEM; + } + + priv->data = match->data; + + error = priv->data->init_sensor(priv); + if (error) + return error; + + error = sysfs_create_group(&pdev->dev.kobj, &ap806_temperature_attr_group); + if (error) + return error; + + priv->hwmon_dev = hwmon_device_register(&pdev->dev); + if (IS_ERR(priv->hwmon_dev)) { + error = PTR_ERR(priv->hwmon_dev); + goto sysfs_remove_group; + } + + return 0; + +sysfs_remove_group: + sysfs_remove_group(&pdev->dev.kobj, &ap806_temperature_attr_group); + return error; +} + +static int ap806_hwmon_remove(struct platform_device *pdev) +{ + struct ap806_hwmon_priv *priv = dev_get_drvdata(&pdev->dev); + + hwmon_device_unregister(priv->hwmon_dev); + sysfs_remove_group(&pdev->dev.kobj, &ap806_temperature_attr_group); + return 0; +} + +struct platform_driver ap806_hwmon_driver = { + .probe = ap806_hwmon_probe, + .remove = ap806_hwmon_remove, + .driver = { + .name = "ap806-hwmon", + .owner = THIS_MODULE, + .of_match_table = ap806_hwmon_of_match, + }, +}; + +module_platform_driver(ap806_hwmon_driver); + +MODULE_AUTHOR("Nicolas Schichan "); +MODULE_LICENSE("GPL"); --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/drivers/input/misc/smsc_cap1066.c 2021-03-04 13:20:58.607505592 +0100 @@ -0,0 +1,1117 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PFX "cap1066: " + +/* + * list of registers + */ +#define SMSC_REG_MAIN_CTRL 0x00 +#define SMSC_REG_BTN_STATUS1 0x03 +#define SMSC_REG_DATA_SENSITIVITY 0x1f +#define SMSC_REG_CFG 0x20 +#define SMSC_REG_SENS_CFG 0x22 +#define SMSC_REG_MTOUCH_CFG_REG 0x2a +#define SMSC_REG_CFG2 0x44 +#define SMSC_REG_LED_OUT_TYPE 0x71 +#define SMSC_REG_LED_LINK 0x72 +#define SMSC_REG_LED_OUTPUT_CTL 0x74 +#define SMSC_REG_LED_BEHAVIOUR1 0x81 +#define SMSC_REG_LED_BEHAVIOUR2 0x82 +#define SMSC_REG_LED_DIRECT_DCYCLE 0x93 +#define SMSC_REG_LED_DIRECT_RAMP_RATE 0x94 +#define SMSC_REG_LED_OFF_DELAY 0x95 +#define SMSC_REG_DID 0xfd +#define SMSC_REG_VID 0xfe + +/* + * used in cap1066_init_hw and during priv initialization. + */ +#define DEFAULT_DUTY_CYCLE_MIN 0x4 +#define DEFAULT_DUTY_CYCLE_MAX 0xf +#define DEFAULT_RAMP_TIME_FALL 0x1 +#define DEFAULT_RAMP_TIME_RISE 0x2 + +/* + * vendor id / device id + */ +#define SMSC_CAP1066_VID 0x5d +#define SMSC_CAP1066_DID 0x41 +#define SMSC_CAP1166_DID 0x51 + +static const unsigned short normal_i2c[] = { 0x28, I2C_CLIENT_END }; + +static const struct i2c_device_id cap1066_id[] = { + { "cap1066", 0 }, + { } +}; + +/* + * private context + */ +static u32 default_map[CAP1066_MAX_BTNS] = { + BTN_0, + BTN_1, + BTN_2, + BTN_3, + BTN_4, + BTN_5, +}; + +struct led_btn_name +{ + int code; + const char *name; +}; + +/* + * whenever possible symlinks will be created from led_btn_X to + * led_key_y, depending on user provided keymap. add entries here as + * you see fit. + */ +static const struct led_btn_name led_btn_names[] = { + { KEY_UP, "led_key_up", }, + { KEY_DOWN, "led_key_down", }, + { KEY_LEFT, "led_key_left", }, + { KEY_RIGHT, "led_key_right", }, + { KEY_ENTER, "led_key_enter", }, +}; + +enum { + E_SMSC_CAP1066_LED_MODE_AUTO, + E_SMSC_CAP1066_LED_MODE_ON, + E_SMSC_CAP1066_LED_MODE_OFF, +}; + +struct cap1066_led_dev +{ + struct cap1066_priv *parent_priv; + struct device dev; + int led_mode; + int led_index; + const char *btn_link; +}; + +struct cap1066_priv { + struct input_polled_dev *poll_dev; + struct i2c_client *client; + u32 keymap[CAP1066_MAX_BTNS]; + struct cap1066_led_dev *led_devices[CAP1066_MAX_BTNS]; + + u8 duty_cycle_min; + u8 duty_cycle_max; + u8 raw_ramp_time_fall; + u8 raw_ramp_time_rise; + + struct gpio_desc *irq_gpio; +}; + +static const char *get_keycode_btn_name(int key_code) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(led_btn_names); ++i) { + if (key_code == led_btn_names[i].code) + return led_btn_names[i].name; + } + return NULL; +} + +/* + * single register read + */ +static int cap1066_read_reg(struct i2c_client *client, u8 reg, u8 *val) +{ + int ret; + + ret = i2c_smbus_read_byte_data(client, reg); + if (ret < 0) { + printk(KERN_ERR PFX "read failed: %d\n", ret); + return ret; + } + + *val = (u8)ret; + return 0; +} + +/* + * single register write + */ +static int cap1066_write_reg(struct i2c_client *client, u8 reg, u8 val) +{ + int ret; + + ret = i2c_smbus_write_byte_data(client, reg, val); + if (ret < 0) { + printk(KERN_ERR PFX "write failed: %d\n", ret); + return ret; + } + return 0; +} + +/* + * called when an smbus device is detected, make sure it's a cap1066 + */ +static int cap1066_detect(struct i2c_client *client, + struct i2c_board_info *info) + +{ + int ret; + u8 vid, did; + const char *name = NULL; + + ret = cap1066_read_reg(client, SMSC_REG_VID, &vid); + if (ret) + return ret; + + ret = cap1066_read_reg(client, SMSC_REG_DID, &did); + if (ret) + return ret; + + if (vid != SMSC_CAP1066_VID) + goto no_dev; + + switch (did) { + case SMSC_CAP1066_DID: + name = "cap1066"; + break; + case SMSC_CAP1166_DID: + name = "cap1166"; + break; + default: + goto no_dev; + } + + printk(KERN_INFO PFX "detected SMSC %s chip\n", name); + if (info) + strlcpy(info->type, name, I2C_NAME_SIZE); + return 0; + +no_dev: + printk(KERN_ERR PFX "bad vid/did: 0x%04x/0x%04x\n", vid, did); + return -ENODEV; +} + +/* + * reset registers value + */ +static int cap1066_init_hw(struct i2c_client *client) +{ + unsigned int i; + u8 did; + int ret; + + static const u8 init_regs[] = { + /* power on */ + SMSC_REG_MAIN_CTRL, 0x0, + + /* default sensitivity */ + SMSC_REG_DATA_SENSITIVITY, 0x2f, + + /* max duration */ + SMSC_REG_SENS_CFG, 0xf4, + + /* default configuration */ + SMSC_REG_CFG, 0x38, + + /* open drain output on all gpios */ + SMSC_REG_LED_OUT_TYPE, 0x00, + + /* link leds with sensors */ + SMSC_REG_LED_LINK, 0x3f, + + /* setup direct mode */ + SMSC_REG_LED_BEHAVIOUR1, 0x00, + SMSC_REG_LED_BEHAVIOUR2, 0x00, + + /* set led duty cycle min/max to 10% => 100% */ + SMSC_REG_LED_DIRECT_DCYCLE, + (DEFAULT_DUTY_CYCLE_MAX << 4) | + (DEFAULT_DUTY_CYCLE_MIN), + + /* set ramp rate time to 500ms/250ms */ + SMSC_REG_LED_DIRECT_RAMP_RATE, + (DEFAULT_RAMP_TIME_RISE << 3) | + (DEFAULT_RAMP_TIME_FALL), + }; + + static const u8 init_cap11_regs[] = { + /* default configuration2 */ + SMSC_REG_CFG2, 0x44, + }; + + for (i = 0; i < ARRAY_SIZE(init_regs); i += 2) { + int ret; + + ret = cap1066_write_reg(client, + init_regs[i], init_regs[i + 1]); + if (ret) + return ret; + } + + ret = cap1066_read_reg(client, SMSC_REG_DID, &did); + if (ret) + return ret; + + if (did != SMSC_CAP1166_DID) + return 0; + + for (i = 0; i < ARRAY_SIZE(init_cap11_regs); i += 2) { + int ret; + + ret = cap1066_write_reg(client, + init_cap11_regs[i], + init_cap11_regs[i + 1]); + if (ret) + return ret; + } + + return 0; +} + +/* + * input core poll callback + */ +static void cap1066_input_poll(struct input_polled_dev *dev) +{ + struct cap1066_priv *priv = dev->private; + struct input_dev *input = dev->input; + unsigned int i; + int ret; + u8 stat; + + if (priv->irq_gpio && gpiod_get_value(priv->irq_gpio)) + return; + + /* clear interrupt flag */ + cap1066_write_reg(priv->client, SMSC_REG_MAIN_CTRL, 0); + + ret = cap1066_read_reg(priv->client, SMSC_REG_BTN_STATUS1, &stat); + if (ret) { + printk(KERN_ERR PFX "unable to read status\n"); + return; + } + + for (i = 0; i < CAP1066_MAX_BTNS; i++) + input_report_key(input, priv->keymap[i], + (stat & (1 << i)) ? 1 : 0); + input_sync(input); +} + +#define to_cap1066_led_dev(Dev) container_of(Dev, struct cap1066_led_dev, dev) + +/* + * called when all sysfs references to the cap1066_led_dev are gone. + */ +static void cap1066_led_dev_release(struct device *dev) +{ + struct cap1066_led_dev *led_dev; + + led_dev = to_cap1066_led_dev(dev); + kfree(led_dev); +} + +static int is_white(int c) +{ + return c == '\0' || c == ' ' || c == '\t' || c == '\n' || c == '\r'; +} + +/* + * store a new control value for a given cap1066_led_dev: + * - auto means that the led is linked to the capacitive keys + * - on means that the led is always on + * - off means that the led is always off + */ +static ssize_t store_control(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct cap1066_led_dev *led_dev; + int new_mode; + int read_len = 0; + const char *end; + int key; + u8 reg; + struct i2c_client *client; + static const char *valid_keys[] = { + [E_SMSC_CAP1066_LED_MODE_AUTO] = "auto", + [E_SMSC_CAP1066_LED_MODE_ON] = "on", + [E_SMSC_CAP1066_LED_MODE_OFF] = "off", + }; + + + led_dev = to_cap1066_led_dev(dev); + client = led_dev->parent_priv->client; + + if (is_white(*buf)) + /* + * eat white spaces silently, upper layer will call us + * again. + */ + return 1; + + for (key = 0; key < ARRAY_SIZE(valid_keys); ++key) { + if (count < strlen(valid_keys[key])) + continue ; + if (!strncmp(buf, valid_keys[key], strlen(valid_keys[key]))) { + break; + } + } + + if (key == ARRAY_SIZE(valid_keys)) { + /* + * end of valid_keys array reached and nothing valid + * was recognized. + */ + printk(KERN_ERR PFX "invalid control value.\n"); + return -EINVAL; + } + new_mode = key; + read_len = strlen(valid_keys[key]); + + /* + * check that no garbage is present at end of input. + */ + end = buf + read_len; + if (end < buf + count && !is_white(*end)) { + /* + * garbage at end of input. + */ + printk(KERN_ERR PFX "garbage at end of value for led " + "control.\n"); + return -EINVAL; + } + + if (new_mode == led_dev->led_mode) + return read_len; + + if (new_mode == E_SMSC_CAP1066_LED_MODE_AUTO) { + cap1066_read_reg(client, SMSC_REG_LED_LINK, ®); + reg |= (1 << led_dev->led_index); + cap1066_write_reg(client, SMSC_REG_LED_LINK, reg); + } else { + cap1066_read_reg(client, SMSC_REG_LED_LINK, ®); + reg &= ~(1 << led_dev->led_index); + cap1066_write_reg(client, SMSC_REG_LED_LINK, reg); + + cap1066_read_reg(client, SMSC_REG_LED_OUTPUT_CTL, ®); + if (new_mode == E_SMSC_CAP1066_LED_MODE_ON) + reg |= (1 << led_dev->led_index); + else + reg &= ~(1 << led_dev->led_index); + cap1066_write_reg(client, SMSC_REG_LED_OUTPUT_CTL, reg); + } + led_dev->led_mode = new_mode; + + return read_len; +} + +static ssize_t show_control(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct cap1066_led_dev *led_dev; + const char *str; + + led_dev = to_cap1066_led_dev(dev); + switch (led_dev->led_mode) { + case E_SMSC_CAP1066_LED_MODE_AUTO: + str = "auto"; + break; + + case E_SMSC_CAP1066_LED_MODE_ON: + str = "on"; + break; + + case E_SMSC_CAP1066_LED_MODE_OFF: + str = "off"; + break; + + default: + str = "invalid"; + break; + } + + return sprintf(buf, "%s\n", str); +} + +static DEVICE_ATTR(control, S_IWUSR | S_IRUSR, show_control, store_control); + +static struct device_attribute *cap1066_led_dev_attrs[] = { + &dev_attr_control, +}; + +/* + * helper used to create all attributes given in the attr array. + * + * if something goes wrong during creation, remove attributes that + * have already been created. + */ +static int create_sysfs_files(struct device *dev, + struct device_attribute **attrs, + size_t count) +{ + int created; + int error = 0; + + for (created = 0; created < count; ++created) { + error = device_create_file(dev, attrs[created]); + if (error) + break; + } + + if (!error) + /* + * no errors, can return. + */ + return 0; + + /* + * errors during creation, remove already created + * files. + */ + while (--created >= 0) + device_remove_file(dev, attrs[created]); + + return error; +} + +/* + * create a led device. This will create a new directory in the sysfs + * base of the parent. a symlink will be created if a button name is + * found via get_keycode_btn_name(). + */ +static struct cap1066_led_dev *cap1066_create_led_dev(struct device *parent, + struct cap1066_priv *priv, + int index, int key_code) +{ + struct cap1066_led_dev *dev; + int error = 0; + + dev = kzalloc(sizeof (*dev), GFP_KERNEL); + if (!dev) + return NULL; + + dev->led_index = index; + dev->parent_priv = priv; + dev_set_name(&dev->dev, "led_btn_%i", index); + dev->dev.release = cap1066_led_dev_release; + dev->dev.parent = parent; + if (device_register(&dev->dev) < 0) { + kfree(dev); + return NULL; + } + + /* + * create sysfs attributes. + */ + error = create_sysfs_files(&dev->dev, cap1066_led_dev_attrs, + ARRAY_SIZE(cap1066_led_dev_attrs)); + if (error) { + device_unregister(&dev->dev); + return NULL; + } + + /* + * create sysfs symlinks to friendly names, wherever possible. + */ + dev->btn_link = get_keycode_btn_name(key_code); + if (dev->btn_link) { + error = sysfs_create_link(&parent->kobj, &dev->dev.kobj, + dev->btn_link); + if (error) + dev->btn_link = NULL; + } + return dev; +} + +static void cap1066_remove_led_dev(struct cap1066_led_dev *dev) +{ + int i; + + if (dev->btn_link) + sysfs_remove_link(&dev->dev.parent->kobj, dev->btn_link); + + for (i = 0; i < ARRAY_SIZE(cap1066_led_dev_attrs); ++i) + device_remove_file(&dev->dev, cap1066_led_dev_attrs[i]); + device_unregister(&dev->dev); + + /* + * dev->release() kfree the cap1066_led_dev struct + */ +} + +/* + * helper to exctract an unsigned long from the buffer given in + * parameter. + * + * first store buf in a zero terminated string and strtoul() it. + */ +static int get_ulong(const char *buf, size_t count, unsigned long *ret) +{ + char local_buf[32]; + unsigned long val; + const char *end; + + strncpy(local_buf, buf, min(count , sizeof (local_buf))); + local_buf[min(count, sizeof (local_buf) - 1)] = 0; + + val = simple_strtoul(local_buf, (char**)&end, 0); + if (!is_white(*end)) + /* + * garbage after end of input. + */ + return -EINVAL; + + *ret = val; + + return 0; +} + +/* + * duty cycle sysfs callbacks: things may not work as expected if + * duty_cycle_min is >= duty_cycle_max. + * + * values that can be written in duty_cycle_max/duty_cycle_min + * attributes can be on the range [0, 16 [. + * + * 0 means the lowest possible pwm duty cycle. + * 1 means the highest possible pwm duty cycle. + */ + +static ssize_t store_duty_cycle_min(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long val; + struct i2c_client *client; + struct cap1066_priv *priv; + int error; + u8 reg; + + client = to_i2c_client(dev); + priv = i2c_get_clientdata(client); + + if (is_white(*buf)) + return 1; + + error = get_ulong(buf, count, &val); + if (error) + return error; + + if (val > 0xf) + return -ERANGE; + + cap1066_read_reg(client, SMSC_REG_LED_DIRECT_DCYCLE, ®); + reg &= ~0xf; + reg |= val; + cap1066_write_reg(client, SMSC_REG_LED_DIRECT_DCYCLE, reg); + + priv->duty_cycle_min = val; + + pr_debug(PFX "store_duty_cycle_min: reg = 0x%02x\n", reg); + return count; +} + +static ssize_t show_duty_cycle_min(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct i2c_client *client; + struct cap1066_priv *priv; + + client = to_i2c_client(dev); + priv = i2c_get_clientdata(client); + + return sprintf(buf, "%u\n", priv->duty_cycle_min); +} + +static ssize_t store_duty_cycle_max(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long val; + struct i2c_client *client; + struct cap1066_priv *priv; + int error; + u8 reg; + + client = to_i2c_client(dev); + priv = i2c_get_clientdata(client); + + if (is_white(*buf)) + return 1; + + error = get_ulong(buf, count, &val); + if (error) + return error; + + if (val > 0xf) + return -ERANGE; + + cap1066_read_reg(client, SMSC_REG_LED_DIRECT_DCYCLE, ®); + reg &= ~0xf0; + reg |= val << 4; + cap1066_write_reg(client, SMSC_REG_LED_DIRECT_DCYCLE, reg); + + priv->duty_cycle_max = val; + + pr_debug(PFX "store_duty_cycle_max: reg = 0x%02x\n", reg); + return count; +} + +static ssize_t show_duty_cycle_max(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct i2c_client *client; + struct cap1066_priv *priv; + + client = to_i2c_client(dev); + priv = i2c_get_clientdata(client); + + return sprintf(buf, "%u\n", priv->duty_cycle_max); +} + +/* + * convert millisecond value to a "raw" value ready to be written to + * the register. + */ +static u8 msec_to_raw_ramp_time(unsigned long msec) +{ + u8 ret; + + if (msec <= 1500) + /* + * register handles 250 msec increments if below 1500 + * msec. + */ + ret = msec / 250; + else + /* + * there is no 1750 msec step, and 2000 msec is + * encoded as 0x7. + */ + ret = 0x7; + + return ret; +} + +/* + * convert raw register value to a millisecond value. + */ +static unsigned long raw_ramp_time_to_msec(u8 raw) +{ + unsigned long ret; + + if (raw < 7) + ret = 250 * raw; + else + ret = 2000; + + return ret; +} + +/* + * ramp time sysfs callbacks. delays are not reliable if programmed + * want time is higher than 1000 msec. + * + * values that can be written are on the range [0, 2000] and are given + * in milliseconds. Values higher than 2000 are clamped to 2000. shown + * values are rounded up to the next value supported by the hardware. + */ + +static ssize_t store_ramp_time_rise(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long val; + u8 raw_val; + struct i2c_client *client; + struct cap1066_priv *priv; + int error; + u8 reg; + + client = to_i2c_client(dev); + priv = i2c_get_clientdata(client); + + if (is_white(*buf)) + return 1; + + error = get_ulong(buf, count, &val); + if (error) + return error; + + raw_val = msec_to_raw_ramp_time(val); + + cap1066_read_reg(client, SMSC_REG_LED_DIRECT_RAMP_RATE, ®); + reg &= ~(0x7 << 3); + reg |= raw_val << 3; + cap1066_write_reg(client, SMSC_REG_LED_DIRECT_RAMP_RATE, reg); + + priv->raw_ramp_time_rise = raw_val; + + pr_debug(PFX "store_ramp_time_rise: reg = %02x\n", reg); + return count; +} + +static ssize_t show_ramp_time_rise(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct i2c_client *client; + struct cap1066_priv *priv; + unsigned long msec; + + client = to_i2c_client(dev); + priv = i2c_get_clientdata(client); + + msec = raw_ramp_time_to_msec(priv->raw_ramp_time_rise); + + return sprintf(buf, "%lu\n", msec); +} + +static ssize_t store_ramp_time_fall(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + unsigned long val; + u8 raw_val; + struct i2c_client *client; + struct cap1066_priv *priv; + int error; + u8 reg; + + client = to_i2c_client(dev); + priv = i2c_get_clientdata(client); + + if (is_white(*buf)) + return 1; + + error = get_ulong(buf, count, &val); + if (error) + return error; + + raw_val = msec_to_raw_ramp_time(val); + + cap1066_read_reg(client, SMSC_REG_LED_DIRECT_RAMP_RATE, ®); + reg &= ~0x7; + reg |= raw_val; + cap1066_write_reg(client, SMSC_REG_LED_DIRECT_RAMP_RATE, reg); + + priv->raw_ramp_time_fall = raw_val; + + pr_debug(PFX "store_ramp_time_rise: reg = %02x\n", reg); + return count; +} + +static ssize_t show_ramp_time_fall(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct i2c_client *client; + struct cap1066_priv *priv; + unsigned long msec; + + client = to_i2c_client(dev); + priv = i2c_get_clientdata(client); + + msec = raw_ramp_time_to_msec(priv->raw_ramp_time_fall); + + return sprintf(buf, "%lu\n", msec); +} + +#define MTOUCH_ENABLE (1 << 7) +#define MTOUCH_COUNT_MASK (3 << 2) +#define MTOUCH_COUNT_SHIFT (2) + +/* + * touch limit handling: the hardware can report at most 1 to 4 key + * press event or no limit at all. + * + * Accepted values in touch_limit attribte: + * 0 -> no limit + * [1, 4] -> limit to the indicated count + * [4, +inf [ -> invalid + */ +static ssize_t store_touch_limit(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + struct i2c_client *client; + unsigned long limit; + int err; + u8 mtouch_reg; + + client = to_i2c_client(dev); + + if (is_white(*buf)) + return 1; + + err = get_ulong(buf, count, &limit); + if (err) + return err; + + if (limit > 4) + return -EINVAL; + + if (limit == 0) { + mtouch_reg = 0; + } else { + mtouch_reg = MTOUCH_ENABLE | + ((limit - 1) << MTOUCH_COUNT_SHIFT); + } + cap1066_write_reg(client, SMSC_REG_MTOUCH_CFG_REG, mtouch_reg); + + return count; +} + +static ssize_t show_touch_limit(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct i2c_client *client; + u8 mtouch_reg; + + client = to_i2c_client(dev); + + cap1066_read_reg(client, SMSC_REG_MTOUCH_CFG_REG, &mtouch_reg); + + if (mtouch_reg & MTOUCH_ENABLE) { + u8 count = (mtouch_reg & MTOUCH_COUNT_MASK) >> + MTOUCH_COUNT_SHIFT; + return sprintf(buf, "%d\n", count + 1); + } else { + return sprintf(buf, "0\n"); + } +} + +static DEVICE_ATTR(duty_cycle_min, S_IRUSR | S_IWUSR, show_duty_cycle_min, + store_duty_cycle_min); + +static DEVICE_ATTR(duty_cycle_max, S_IRUSR | S_IWUSR, show_duty_cycle_max, + store_duty_cycle_max); + +static DEVICE_ATTR(ramp_time_rise, S_IRUSR | S_IWUSR, show_ramp_time_rise, + store_ramp_time_rise); + +static DEVICE_ATTR(ramp_time_fall, S_IRUSR | S_IWUSR, show_ramp_time_fall, + store_ramp_time_fall); + +static DEVICE_ATTR(touch_limit, S_IWUSR | S_IRUSR, show_touch_limit, + store_touch_limit); + +static struct device_attribute *cap1066_base_attributes[] = { + &dev_attr_duty_cycle_min, + &dev_attr_duty_cycle_max, + &dev_attr_ramp_time_rise, + &dev_attr_ramp_time_fall, + &dev_attr_touch_limit, +}; + +/* + * i2c core probe callback, called after sucessful detect + */ +static int cap1066_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct device_node *np = client->dev.of_node; + struct input_polled_dev *poll_dev; + struct input_dev *input; + struct cap1066_priv *priv; + struct reset_control *reset; + int ret, i; + + priv = devm_kzalloc(&client->dev, sizeof (*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->irq_gpio = devm_gpiod_get_optional(&client->dev, + "irq", + GPIOD_IN); + if (IS_ERR(priv->irq_gpio)) { + ret = PTR_ERR(priv->irq_gpio); + if (ret != -EPROBE_DEFER) + dev_err(&client->dev, + "failed to get irq gpio :%d", ret); + return ret; + } + + if (np) { + ret = of_property_read_u32_array(np, + "keymap", + priv->keymap, + ARRAY_SIZE(priv->keymap)); + if (ret < 0) { + dev_err(&client->dev, + "bad/missing keymap property: %d", ret); + return ret; + } + } else + memcpy(priv->keymap, default_map, sizeof (priv->keymap)); + + /* un-reset if needed */ + reset = devm_reset_control_get_shared_by_index(&client->dev, 0); + if (IS_ERR(reset)) { + ret = PTR_ERR(reset); + if (ret == -ENOENT) + reset = NULL; + else if (ret != -EPROBE_DEFER){ + dev_err(&client->dev, "failed to get reset: %d\n", + ret); + return ret; + } + } + + if (reset && reset_control_status(reset)) { + reset_control_deassert(reset); + msleep(10); + } + + ret = cap1066_detect(client, NULL); + if (ret) { + if (ret != -ENODEV) + return ret; + + dev_warn(&client->dev, "unknown cap1x66 device, try anyway.\n"); + } + + /* initialize controller */ + ret = cap1066_init_hw(client); + if (ret) + return ret; + + /* allocate context */ + poll_dev = input_allocate_polled_device(); + if (!priv || !poll_dev) { + ret = -ENOMEM; + goto out_fail; + } + + /* + * must match what has been setup in cap1066_init_hw(). + */ + priv->duty_cycle_min = DEFAULT_DUTY_CYCLE_MIN; + priv->duty_cycle_max = DEFAULT_DUTY_CYCLE_MAX; + priv->raw_ramp_time_rise = DEFAULT_RAMP_TIME_RISE; + priv->raw_ramp_time_fall = DEFAULT_RAMP_TIME_FALL; + + priv->poll_dev = poll_dev; + priv->client = client; + + poll_dev->private = priv; + poll_dev->poll = cap1066_input_poll; + poll_dev->poll_interval = 50 /* ms */; + + input = poll_dev->input; + input->name = "smsc_cap1066"; + input->phys = "smsc_cap1066/input0"; + input->id.bustype = BUS_I2C; + input->dev.parent = &client->dev; + + input->keycode = priv->keymap; + input->keycodemax = ARRAY_SIZE(priv->keymap); + input->keycodesize = sizeof (unsigned short); + + set_bit(EV_REP, input->evbit); + set_bit(EV_KEY, input->evbit); + for (i = 0; i < ARRAY_SIZE(priv->keymap); i++) + set_bit(priv->keymap[i], input->keybit); + + i2c_set_clientdata(client, priv); + + ret = input_register_polled_device(poll_dev); + if (ret) + goto out_fail; + + for (i = 0; i < ARRAY_SIZE(priv->keymap); ++i) { + if (!priv->keymap[i]) + continue; + priv->led_devices[i] = + cap1066_create_led_dev(&client->dev, + priv, i, priv->keymap[i]); + } + + if (create_sysfs_files(&client->dev, cap1066_base_attributes, + ARRAY_SIZE(cap1066_base_attributes)) < 0) + goto out_free_led_devs; + + return 0; + +out_free_led_devs: + for (i = 0; i < ARRAY_SIZE(priv->keymap); ++i) + if (priv->led_devices[i]) + cap1066_remove_led_dev(priv->led_devices[i]); +out_fail: + input_free_polled_device(poll_dev); + i2c_set_clientdata(client, NULL); + return ret; +} + +/* + * i2c core remove callback + */ +static int cap1066_remove(struct i2c_client *client) +{ + int i; + struct cap1066_priv *priv = i2c_get_clientdata(client); + + for (i = 0; i < ARRAY_SIZE(cap1066_base_attributes); ++i) + device_remove_file(&client->dev, cap1066_base_attributes[i]); + + for (i = 0; i < ARRAY_SIZE(priv->keymap); ++i) { + if (priv->led_devices[i]) + cap1066_remove_led_dev(priv->led_devices[i]); + } + + input_unregister_polled_device(priv->poll_dev); + input_free_polled_device(priv->poll_dev); + + return 0; +} + +static const struct of_device_id cap1066_of_table[] = { + { .compatible = "smsc,smsc_cap1066" }, + { } +}; +MODULE_DEVICE_TABLE(of, cap1066_of_table); + +static struct i2c_driver cap1066_driver = { + .driver = { + .name = "cap1066", + .of_match_table = of_match_ptr(cap1066_of_table), + }, + .probe = cap1066_probe, + .remove = cap1066_remove, + .id_table = cap1066_id, + + .detect = cap1066_detect, + .class = I2C_CLASS_HWMON, + .address_list = normal_i2c, +}; + +static int __init cap1066_init(void) +{ + return i2c_add_driver(&cap1066_driver); +} + +static void __exit cap1066_exit(void) +{ + i2c_del_driver(&cap1066_driver); +} + + +MODULE_AUTHOR("Maxime Bizon "); +MODULE_DESCRIPTION("SMSC CAP1066 driver"); +MODULE_LICENSE("GPL"); + +module_init(cap1066_init); +module_exit(cap1066_exit); --- /dev/null 2021-03-25 15:17:26.552434351 +0100 +++ linux-5.4.60-fbx/drivers/leds/leds-led1202.c 2021-03-04 13:20:58.650838927 +0100 @@ -0,0 +1,909 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * LED driver : leds-led1202.c + * + * Copyright (C) 2019 Freebox SAS + * Henri Buyse + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/** + * @brief Maximal number of LEDs that can be driven by the LED1202 + * + */ +#define LED1202_MAX_LEDS 12 +#define LED1202_FORM_DEVICE_ID(prod_id, rev_id) \ + ((unsigned int)(((prod_id) << 4) | (rev_id))) + +/** + * @brief Register addresses + */ +#define LED1202_REG_DEVICE_ID 0x00 +#define LED1202_REG_DEVICE_ENABLE 0x01 +#define LED1202_REG_DEVICE_ENABLE_ENABLE_MASK 1 +#define LED1202_REG_DEVICE_ENABLE_RESET_MASK (1 << 7) +#define LED1202_REG_CHANNEL_ENABLE_LOW 0x02 +#define LED1202_REG_CHANNEL_ENABLE_HIGH 0x03 +#define LED1202_REG_CONFIGURATION 0x04 +#define LED1202_REG_CONFIGURATION_PATSR_MASK (1 << 6) +#define LED1202_REG_CONFIGURATION_PATS_MASK (1 << 7) +#define LED1202_REG_FAULT_STATUS_MASK 0x05 +#define LED1202_REG_FAULT_STATUS_INTERRUPT 0x06 +#define LED1202_REG_OPEN_LED_LOW 0x07 +#define LED1202_REG_OPEN_LED_HIGH 0x08 +#define LED1202_REG_CSX_LED_CURRENT(led_no) (0x09 + (led_no)) // 0x09 -> 0x14 +#define LED1202_REG_PATTERN_SEQUENCE_REPETITION 0x15 +#define LED1202_REG_PATTERN_Y_DURATION_TIME(pattern) \ + (0x16 + (pattern)) // 0x16 -> 0x1d +// 0x1e -> 0xdd +#define LED1202_REG_PATTERN_Y_CSX_PWM_LOW(led_no, pattern) \ + (0x1e + (2 * (led_no)) + \ + (0x18 * (pattern))) // See table 22 in led1202 datasheet +#define LED1202_REG_PATTERN_Y_CSX_PWM_HIGH(led_no, pattern) \ + (0x1e + 0x01 + (2 * (led_no)) + \ + (0x18 * (pattern))) // See table 23 in led1202 datasheet +// 0xde ? +// 0xdf ? +#define LED1202_REG_CLOCK_CONFIGURATION 0xe0 + +#define LED1202_MAX_PATTERNS 8 +#define LED1202_DELTA_T_MIN 23 // 22.2ms +#define LED1202_DELTA_T_MAX 5660 // 255 * 22.2 +#define LED1202_MAX_INTERRUPTS_NB \ + 15 // Overtemperature + all open led (12) + pattern finished + start of pwm frame + +#define LED1202_INTERRUPT_CHIP_OVER_TEMPERATURE 0x000001 +#define LED1202_INTERRUPT_OPEN_LED_DETECTION 0x000002 +#define LED1202_INTERRUPT_PATTERN_SEQUENCE_FINISHED 0x000004 +#define LED1202_INTERRUPT_START_OF_PWM_FRAME 0x000008 + +#define LED1202_INTERRUPT_OPEN_LED_CS0 0x00010000 +#define LED1202_INTERRUPT_OPEN_LED_CS1 0x00020000 +#define LED1202_INTERRUPT_OPEN_LED_CS2 0x00040000 +#define LED1202_INTERRUPT_OPEN_LED_CS3 0x00080000 +#define LED1202_INTERRUPT_OPEN_LED_CS4 0x00100000 +#define LED1202_INTERRUPT_OPEN_LED_CS5 0x00200000 +#define LED1202_INTERRUPT_OPEN_LED_CS6 0x00400000 +#define LED1202_INTERRUPT_OPEN_LED_CS7 0x00800000 +#define LED1202_INTERRUPT_OPEN_LED_CS8 0x01000000 +#define LED1202_INTERRUPT_OPEN_LED_CS9 0x02000000 +#define LED1202_INTERRUPT_OPEN_LED_CS10 0x04000000 +#define LED1202_INTERRUPT_OPEN_LED_CS11 0x08000000 + +#define ldev_to_led(class) container_of(class, struct led1202_led, ldev) + +struct led1202_led { + // bool active; + bool enable; + unsigned int led_no; + unsigned int reg; + struct led_classdev ldev; + struct led1202_priv *priv; +}; + +struct led1202_priv { + struct i2c_client *client; + struct regmap *regmap; + struct input_dev *idev; + + const struct led1202_hw_model *model; + + struct led1202_led *leds; + unsigned int num_leds; +}; + +struct led1202_hw_model { + unsigned int max_leds; + unsigned int product_id; + unsigned int revision_id; +}; + +static const struct led1202_hw_model led1202_models[] = { + { .max_leds = 12, .product_id = 0x01, .revision_id = 0x02 }, +}; + +static const struct regmap_config led1202_regmap_config = { + .reg_bits = 8, // Number of bits in a register address, mandatory. + .val_bits = 8, // Number of bits in a register value, mandatory. + .max_register = + LED1202_REG_CLOCK_CONFIGURATION, // Maximal register addr: Clock configuration register + .can_multi_write = true, // to write multiple values in one row +}; + +/** + * @brief Enable / disable the LED1202 device. + * + * @param priv LED1202 structure handling the regmap. + * + * @return A value of zero will be returned on success, a negative errno will + * be returned in error cases. + */ +static int led1202_activate_device(struct led1202_priv *priv, bool activation) +{ + int err = -1; + struct device *dev = &priv->client->dev; + + // activate/deactivate device + err = regmap_update_bits(priv->regmap, LED1202_REG_DEVICE_ENABLE, + LED1202_REG_DEVICE_ENABLE_ENABLE_MASK, + (activation) ? + LED1202_REG_DEVICE_ENABLE_ENABLE_MASK : + 0); + + if (err < 0) + dev_err(dev, "can't %s the device (reg: 0x%02x)\n", + (activation) ? "enable" : "disable", + LED1202_REG_DEVICE_ENABLE); + else + dev_dbg(dev, "device %s\n", (activation) ? "enabled" : "disabled"); + + return err; +} + +/** + * @brief Reset the LED1202 device. + * + * @param priv LED1202 structure handling the regmap. + * + * @return A value of zero will be returned on success, a negative errno will + * be returned in error cases. + */ +static int led1202_reset_device(struct led1202_priv *priv) +{ + int err = -1; + struct device *dev = &priv->client->dev; + + // reset the device + err = regmap_update_bits(priv->regmap, LED1202_REG_DEVICE_ENABLE, + LED1202_REG_DEVICE_ENABLE_RESET_MASK, + LED1202_REG_DEVICE_ENABLE_RESET_MASK); + + if (err < 0) + dev_err(dev, "can't reset the device (reg: 0x%02x)\n", + LED1202_REG_DEVICE_ENABLE); + else + dev_dbg(dev, "device resetted\n"); + + return err; +} + +/** + * @brief Enable a LED. + * + * @param led Structure handling a led + * + * @return On success, returns 0. On error, returns -1. + */ +static int led1202_channel_enable(struct led1202_led *led, bool state) +{ + int ret = -1; + struct led1202_priv *priv = led->priv; + struct device *dev = &priv->client->dev; + const char *led_name = led->ldev.name; + unsigned int led_no = led->led_no; + unsigned int reg = led->reg; + unsigned int addr = 0; + unsigned int mask = 0; + unsigned int val = 0; + + if (led_no >= priv->num_leds) { + return -EINVAL; // Invalid argument + } + + // Check if the LED is already enable/disabled + if (led->enable == state) { + dev_dbg(dev, "led %s is already %s\n", led->ldev.name, (state) ? "enabled":"disabled"); + return 0; + } + + addr = (reg < 8) ? LED1202_REG_CHANNEL_ENABLE_LOW : + LED1202_REG_CHANNEL_ENABLE_HIGH; + mask = (reg < 8) ? (1 << reg) : (1 << (reg - 8)); + val = (reg < 8) ? (state << reg) : (state << (reg - 8)); + + if ((ret = regmap_update_bits(led->priv->regmap, addr, mask, val)) < 0) { + dev_err(dev, + "can't enable %s led (#%d, reg: 0x%02x, mask: 0x%02x)\n", + led_name, reg, addr, mask); + } else { + led->enable = state; + dev_dbg(dev, "channel %s %s\n", led_name, (state) ? "enabled":"disabled"); + } + + return ret; +} + +/** + * @brief Callback that set the brightness of a led. + * @details To modify the brightness of a led, we have to pass throught the + * /sys/class/leds/